AESIMC AES inverse mix columns AES inverse mix columns. If PSTATE.DIT is 1: The execution time of this instruction is independent of: The values of the data supplied in any of its registers. The values of the NZCV flags. The response of this instruction to asynchronous exceptions does not vary based on: The values of the data supplied in any of its registers. The values of the NZCV flags. 0 1 0 0 1 1 1 0 0 0 1 0 1 0 0 0 0 1 1 1 1 0 AESIMC <Vd>.16B, <Vn>.16B if !IsFeatureImplemented(FEAT_AES) then UNDEFINED; constant integer d = UInt(Rd); constant integer n = UInt(Rn); <Vd> Is the name of the SIMD&FP destination register, encoded in the "Rd" field. <Vn> Is the name of the SIMD&FP source register, encoded in the "Rn" field. AArch64.CheckFPAdvSIMDEnabled(); constant bits(128) operand = V[n, 128]; V[d, 128] = AESInvMixColumns(operand);