BFMLSLT (indexed) BFloat16 floating-point multiply-subtract long from single-precision (top, indexed) This BFloat16 floating-point multiply-subtract long instruction widens the odd-numbered BFloat16 elements in the first source vector and the indexed element from the corresponding 128-bit segment in the second source vector to single-precision format and then destructively multiplies and subtracts these values without intermediate rounding from the single-precision elements of the destination vector that overlap with the corresponding BFloat16 elements in the first source vector. This instruction is unpredicated. Green False True 0 1 1 0 0 1 0 0 1 1 1 0 1 1 0 1 BFMLSLT <Zda>.S, <Zn>.H, <Zm>.H[<imm>] if !IsFeatureImplemented(FEAT_SME2) && !IsFeatureImplemented(FEAT_SVE2p1) then UNDEFINED; constant integer n = UInt(Zn); constant integer m = UInt(Zm); constant integer da = UInt(Zda); constant integer index = UInt(i3h:i3l); constant boolean op1_neg = TRUE; <Zda> Is the name of the third source and destination scalable vector register, encoded in the "Zda" field. <Zn> Is the name of the first source scalable vector register, encoded in the "Zn" field. <Zm> Is the name of the second source scalable vector register Z0-Z7, encoded in the "Zm" field. <imm> Is the immediate index, in the range 0 to 7, encoded in the "i3h:i3l" fields. CheckSVEEnabled(); constant integer VL = CurrentVL; constant integer PL = VL DIV 8; constant integer elements = VL DIV 32; constant integer eltspersegment = 128 DIV 32; constant bits(VL) op1 = Z[n, VL]; constant bits(VL) op2 = Z[m, VL]; constant bits(VL) op3 = Z[da, VL]; bits(VL) result; for e = 0 to elements-1 constant integer segmentbase = e - (e MOD eltspersegment); constant integer s = 2 * segmentbase + index; constant bits(16) elem1 = (if op1_neg then BFNeg(Elem[op1, 2*e + 1, 16]) else Elem[op1, 2*e + 1, 16]); constant bits(16) elem2 = Elem[op2, s, 16]; constant bits(32) elem3 = Elem[op3, e, 32]; Elem[result, e, 32] = BFMulAddH(elem3, elem1, elem2, FPCR); Z[da, VL] = result;