DC Data cache operation For more information, see op0==0b01, cache maintenance, TLB maintenance, and address translation instructions. SYS 1 1 0 1 0 1 0 1 0 0 0 0 1 0 1 1 1 DC <dc_op>, <Xt> SYS #<op1>, C7, <Cm>, #<op2>, <Xt> SysOp(op1, '0111', CRm, op2) == Sys_DC <dc_op> Is a DC operation name, as listed for the DC system instruction group, op1 CRm op2 <dc_op> Architectural Feature 000 0110 001 IVAC 000 0110 010 ISW 000 0110 011 IGVAC 000 0110 100 IGSW 000 0110 101 IGDVAC 000 0110 110 IGDSW 000 1010 010 CSW 000 1010 100 CGSW 000 1010 110 CGDSW 000 1110 010 CISW 000 1110 100 CIGSW 000 1110 110 CIGDSW 011 0100 001 ZVA 011 0100 011 GVA 011 0100 100 GZVA 011 1010 001 CVAC 011 1010 011 CGVAC 011 1010 101 CGDVAC 011 1011 001 CVAU 011 1100 001 CVAP 011 1100 011 CGVAP 011 1100 101 CGDVAP 011 1101 001 CVADP 011 1101 011 CGVADP 011 1101 101 CGDVADP 011 1110 001 CIVAC 011 1110 011 CIGVAC 011 1110 101 CIGDVAC 100 1110 000 CIPAE 100 1110 111 CIGDPAE 110 1110 001 CIPAPA 110 1110 101 CIGDPAPA <Xt> Is the 64-bit name of the general-purpose source register, encoded in the "Rt" field.