FAC<cc> Floating-point absolute compare vectors Compare active absolute values of floating-point elements in the first source vector with corresponding absolute values of elements in the second source vector, and place the boolean results of the specified comparison in the corresponding elements of the destination predicate. Inactive elements in the destination predicate register are set to zero. Does not set the condition flags. <cc> Comparison GE greater than or equal GT greater than LE less than or equal LT less than Green True This instruction is used by the aliases FACLE Never FACLT Never See below for details of when each alias is preferred. It has encodings from 2 classes: Greater than and Greater than or equal 0 1 1 0 0 1 0 1 0 1 1 1 1 FACGT <Pd>.<T>, <Pg>/Z, <Zn>.<T>, <Zm>.<T> if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; if size == '00' then UNDEFINED; constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer m = UInt(Zm); constant integer d = UInt(Pd); constant SVECmp cmp_op = Cmp_GT; 0 1 1 0 0 1 0 1 0 1 1 0 1 FACGE <Pd>.<T>, <Pg>/Z, <Zn>.<T>, <Zm>.<T> if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; if size == '00' then UNDEFINED; constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer m = UInt(Zm); constant integer d = UInt(Pd); constant SVECmp cmp_op = Cmp_GE; <Pd> Is the name of the destination scalable predicate register, encoded in the "Pd" field. <T> Is the size specifier, size <T> 00 RESERVED 01 H 10 S 11 D <Pg> Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field. <Zn> Is the name of the first source scalable vector register, encoded in the "Zn" field. <Zm> Is the name of the second source scalable vector register, encoded in the "Zm" field. Alias Conditions CheckSVEEnabled(); constant integer VL = CurrentVL; constant integer PL = VL DIV 8; constant integer elements = VL DIV esize; constant bits(PL) mask = P[g, PL]; constant bits(VL) operand1 = if AnyActiveElement(mask, esize) then Z[n, VL] else Zeros(VL); constant bits(VL) operand2 = if AnyActiveElement(mask, esize) then Z[m, VL] else Zeros(VL); bits(PL) result; constant integer psize = esize DIV 8; for e = 0 to elements-1 if ActivePredicateElement(mask, e, esize) then constant bits(esize) element1 = Elem[operand1, e, esize]; constant bits(esize) element2 = Elem[operand2, e, esize]; boolean res; case cmp_op of when Cmp_GE res = FPCompareGE(FPAbs(element1, FPCR), FPAbs(element2, FPCR), FPCR); when Cmp_GT res = FPCompareGT(FPAbs(element1, FPCR), FPAbs(element2, FPCR), FPCR); constant bit pbit = if res then '1' else '0'; Elem[result, e, psize] = ZeroExtend(pbit, psize); else Elem[result, e, psize] = ZeroExtend('0', psize); P[d, PL] = result;