FCVT (narrowing, FP32 to FP16) Multi-vector floating-point convert from single-precision to packed half-precision Convert to half-precision from single-precision, each element of the two source vectors, and place the results in the half-width destination elements. This instruction follows SME2 floating-point numerical behaviors corresponding to instructions that place their results in one or more SVE Z vectors. This instruction is unpredicated. Green False SM_1_only 1 1 0 0 0 0 0 1 0 0 1 0 0 0 0 0 1 1 1 0 0 0 0 FCVT <Zd>.H, { <Zn1>.S-<Zn2>.S } if !IsFeatureImplemented(FEAT_SME2) then UNDEFINED; constant integer n = UInt(Zn:'0'); constant integer d = UInt(Zd); <Zd> Is the name of the destination scalable vector register, encoded in the "Zd" field. <Zn1> Is the name of the first scalable vector register of the source multi-vector group, encoded as "Zn" times 2. <Zn2> Is the name of the second scalable vector register of the source multi-vector group, encoded as "Zn" times 2 plus 1. CheckStreamingSVEEnabled(); constant integer VL = CurrentVL; constant integer elements = VL DIV 32; bits(VL) result; constant bits(VL) operand1 = Z[n+0, VL]; constant bits(VL) operand2 = Z[n+1, VL]; for e = 0 to elements-1 constant bits(32) element1 = Elem[operand1, e, 32]; constant bits(32) element2 = Elem[operand2, e, 32]; constant bits(16) res1 = FPConvertSVE(element1, FPCR, 16); constant bits(16) res2 = FPConvertSVE(element2, FPCR, 16); Elem[result, e, 16] = res1; Elem[result, elements+e, 16] = res2; Z[d, VL] = result;