FCVTNB
Single-precision convert, narrow and interleave to 8-bit floating-point (bottom)
Convert each single-precision element of the group of two source vectors to 8-bit floating-point while scaling the value by 2SInt(FPMR.NSCALE), and place the two-way interleaved results in the corresponding even-numbered 8-bit elements of the destination vector, zeroing the odd-numbered elements. The 8-bit floating-point encoding format is selected by FPMR.F8D.
This instruction is unpredicated.
Green
False
0
1
1
0
0
1
0
1
0
0
0
0
1
0
1
0
0
0
1
1
0
1
0
FCVTNB <Zd>.B, { <Zn1>.S-<Zn2>.S }
if ((!IsFeatureImplemented(FEAT_SVE2) && !IsFeatureImplemented(FEAT_SME2)) ||
!IsFeatureImplemented(FEAT_FP8)) then UNDEFINED;
constant integer n = UInt(Zn:'0');
constant integer d = UInt(Zd);
<Zd>
Is the name of the destination scalable vector register, encoded in the "Zd" field.
<Zn1>
Is the name of the first scalable vector register of the source multi-vector group, encoded as "Zn" times 2.
<Zn2>
Is the name of the second scalable vector register of the source multi-vector group, encoded as "Zn" times 2 plus 1.
CheckFPMREnabled();
CheckSVEEnabled();
constant integer VL = CurrentVL;
constant integer elements = VL DIV 32;
bits(VL) result;
constant bits(VL) operand1 = Z[n+0, VL];
constant bits(VL) operand2 = Z[n+1, VL];
for e = 0 to elements-1
constant bits(32) element1 = Elem[operand1, e, 32];
constant bits(32) element2 = Elem[operand2, e, 32];
constant bits(8) res1 = FPConvertFP8(element1, FPCR, FPMR, 8);
constant bits(8) res2 = FPConvertFP8(element2, FPCR, FPMR, 8);
Elem[result, 2*e + 0, 16] = ZeroExtend(res1, 16);
Elem[result, 2*e + 1, 16] = ZeroExtend(res2, 16);
Z[d, VL] = result;