FMINNM (immediate)
Floating-point minimum number with immediate (predicated)
Determine the minimum number value of an immediate and each active floating-point element of the source vector, and destructively place the results in the corresponding elements of the source vector. The immediate may take the value +0.0 or +1.0 only.
Regardless of the value of FPCR.AH, the behavior is as follows:
Negative zero compares less than positive zero.
If the element is a quiet NaN, the result is the immediate value.
When FPCR.DN is 0, if the element is a signaling NaN, the result is a quiet NaN.
When FPCR.DN is 1, if the element is a signaling NaN, the result is Default NaN.
Inactive elements in the destination vector register remain unmodified.
Green
True
True
True
0
1
1
0
0
1
0
1
0
1
1
1
0
1
1
0
0
0
0
0
0
FMINNM <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <const>
if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED;
if size == '00' then UNDEFINED;
constant integer esize = 8 << UInt(size);
constant integer g = UInt(Pg);
constant integer dn = UInt(Zdn);
constant bits(esize) imm = if i1 == '0' then Zeros(esize) else FPOne('0', esize);
<Zdn>
Is the name of the source and destination scalable vector register, encoded in the "Zdn" field.
<T>
Is the size specifier,
size
<T>
00
RESERVED
01
H
10
S
11
D
<Pg>
Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field.
<const>
Is the floating-point immediate value,
CheckSVEEnabled();
constant integer VL = CurrentVL;
constant integer PL = VL DIV 8;
constant integer elements = VL DIV esize;
constant bits(PL) mask = P[g, PL];
constant bits(VL) operand1 = Z[dn, VL];
bits(VL) result;
for e = 0 to elements-1
constant bits(esize) element1 = Elem[operand1, e, esize];
if ActivePredicateElement(mask, e, esize) then
Elem[result, e, esize] = FPMinNum(element1, imm, FPCR);
else
Elem[result, e, esize] = element1;
Z[dn, VL] = result;