INSR (scalar)
Insert general-purpose register in shifted vector
Shift the destination vector left by one element, and then place a copy of the least-significant bits of the general-purpose register in element 0 of the destination vector. This instruction is unpredicated.
Green
False
True
True
0
0
0
0
0
1
0
1
1
0
0
1
0
0
0
0
1
1
1
0
INSR <Zdn>.<T>, <R><m>
if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED;
constant integer esize = 8 << UInt(size);
constant integer dn = UInt(Zdn);
constant integer m = UInt(Rm);
<Zdn>
Is the name of the source and destination scalable vector register, encoded in the "Zdn" field.
<T>
Is the size specifier,
size
<T>
00
B
01
H
10
S
11
D
<R>
Is a width specifier,
<m>
Is the number [0-30] of the source general-purpose register or the name ZR (31), encoded in the "Rm" field.
CheckSVEEnabled();
constant integer VL = CurrentVL;
constant integer PL = VL DIV 8;
constant bits(VL) dest = Z[dn, VL];
constant bits(esize) src = X[m, esize];
Z[dn, VL] = dest<(VL-esize)-1:0> : src;