LDR (literal, SIMD&FP) Load SIMD&FP register (PC-relative literal) This instruction loads a SIMD&FP register from memory. The address that is used for the load is calculated from the PC value and an immediate offset. Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped. If PSTATE.DIT is 1, the timing of this instruction is insensitive to the value of the data being loaded or stored. 0 1 1 1 0 0 0 0 LDR <St>, <label> 0 1 LDR <Dt>, <label> 1 0 LDR <Qt>, <label> constant integer t = UInt(Rt); if opc == '11' then UNDEFINED; constant integer size = 4 << (UInt(opc)); constant boolean nontemporal = FALSE; constant boolean tagchecked = FALSE; constant bits(64) offset = SignExtend(imm19:'00', 64); <St> Is the 32-bit name of the SIMD&FP register to be loaded, encoded in the "Rt" field. <label> Is the program label from which the data is to be loaded. Its offset from the address of this instruction, in the range +/-1MB, is encoded as "imm19" times 4. <Dt> Is the 64-bit name of the SIMD&FP register to be loaded, encoded in the "Rt" field. <Qt> Is the 128-bit name of the SIMD&FP register to be loaded, encoded in the "Rt" field. constant bits(64) address = PC64 + offset; CheckFPEnabled64(); constant boolean privileged = PSTATE.EL != EL0; constant AccessDescriptor accdesc = CreateAccDescASIMD(MemOp_LOAD, nontemporal, tagchecked, privileged); constant bits(size*8) data = Mem[address, size, accdesc]; V[t, size*8] = data;