MOV (vector to tile, single) Move vector register to ZA tile slice The instruction operates on individual horizontal or vertical slices within a named ZA tile of the specified element size. The slice number within the tile is selected by the sum of the slice index register and immediate offset, modulo the number of such elements in a vector. The immediate offset is in the range 0 to the number of elements in a 128-bit vector segment minus 1. Inactive elements in the destination slice remain unmodified. Green True True SM_1_only MOVA (vector to tile, single) It has encodings from 5 classes: 8-bit , 16-bit , 32-bit , 64-bit and 128-bit 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MOV ZA0<HV>.B[<Ws>, <offs>], <Pg>/M, <Zn>.B MOVA ZA0<HV>.B[<Ws>, <offs>], <Pg>/M, <Zn>.B Unconditionally 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 MOV <ZAd><HV>.H[<Ws>, <offs>], <Pg>/M, <Zn>.H MOVA <ZAd><HV>.H[<Ws>, <offs>], <Pg>/M, <Zn>.H Unconditionally 1 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 MOV <ZAd><HV>.S[<Ws>, <offs>], <Pg>/M, <Zn>.S MOVA <ZAd><HV>.S[<Ws>, <offs>], <Pg>/M, <Zn>.S Unconditionally 1 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 MOV <ZAd><HV>.D[<Ws>, <offs>], <Pg>/M, <Zn>.D MOVA <ZAd><HV>.D[<Ws>, <offs>], <Pg>/M, <Zn>.D Unconditionally 1 1 0 0 0 0 0 0 1 1 0 0 0 0 0 1 0 MOV <ZAd><HV>.Q[<Ws>, <offs>], <Pg>/M, <Zn>.Q MOVA <ZAd><HV>.Q[<Ws>, <offs>], <Pg>/M, <Zn>.Q Unconditionally <ZAd> For the 16-bit variant: is the name of the ZA tile ZA0-ZA1 to be accessed, encoded in the "ZAd" field. <ZAd> For the 32-bit variant: is the name of the ZA tile ZA0-ZA3 to be accessed, encoded in the "ZAd" field. <ZAd> For the 64-bit variant: is the name of the ZA tile ZA0-ZA7 to be accessed, encoded in the "ZAd" field. <ZAd> For the 128-bit variant: is the name of the ZA tile ZA0-ZA15 to be accessed, encoded in the "ZAd" field. <HV> Is the horizontal or vertical slice indicator, V <HV> 0 H 1 V
<Ws> Is the 32-bit name of the slice index register W12-W15, encoded in the "Rs" field. <offs> For the 8-bit variant: is the slice index offset, in the range 0 to 15, encoded in the "off4" field. <offs> For the 16-bit variant: is the slice index offset, in the range 0 to 7, encoded in the "off3" field. <offs> For the 32-bit variant: is the slice index offset, in the range 0 to 3, encoded in the "off2" field. <offs> For the 64-bit variant: is the slice index offset, in the range 0 to 1, encoded in the "o1" field. <offs> For the 128-bit variant: is the slice index offset, with implicit value 0. <Pg> Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field. <Zn> Is the name of the source scalable vector register, encoded in the "Zn" field.