MSRR
Move two adjacent general-purpose registers to System register
This instruction allows the PE
to write an AArch64 128-bit System register from two adjacent 64-bit general-purpose
registers.
1
1
0
1
0
1
0
1
0
1
0
1
MSRR (<systemreg>|S<op0>_<op1>_<Cn>_<Cm>_<op2>), <Xt>, <Xt+1>
if !IsFeatureImplemented(FEAT_SYSREG128) then UNDEFINED;
if Rt<0> == '1' then UNDEFINED;
AArch64.CheckSystemAccess('1':o0, op1, CRn, CRm, op2, Rt, L);
constant integer t = UInt(Rt);
constant integer t2 = UInt(Rt+1);
constant integer sys_op0 = 2 + UInt(o0);
constant integer sys_op1 = UInt(op1);
constant integer sys_op2 = UInt(op2);
constant integer sys_crn = UInt(CRn);
constant integer sys_crm = UInt(CRm);
<systemreg>
Is a System register name, encoded in "o0:op1:CRn:CRm:op2".
<op0>
Is an unsigned immediate,
<op1>
Is a 3-bit unsigned immediate, in the range 0 to 7, encoded in the "op1" field.
<Cn>
Is a name 'Cn', with 'n' in the range 0 to 15, encoded in the "CRn" field.
<Cm>
Is a name 'Cm', with 'm' in the range 0 to 15, encoded in the "CRm" field.
<op2>
Is a 3-bit unsigned immediate, in the range 0 to 7, encoded in the "op2" field.
<Xt>
Is the 64-bit name of the first general-purpose source register, encoded in the "Rt" field.
<Xt+1>
Is the 64-bit name of the second general-purpose source register, encoded as "Rt" +1.
AArch64.SysRegWrite128(sys_op0, sys_op1, sys_crn, sys_crm, sys_op2, t, t2);