REVB, REVH, REVW Reverse bytes / halfwords / words within elements (predicated) Reverse the order of 8-bit bytes, 16-bit halfwords or 32-bit words within each active element of the source vector, and place the results in the corresponding elements of the destination vector. Inactive elements in the destination vector register remain unmodified. Green True True True True It has encodings from 3 classes: Byte , Halfword and Word 0 0 0 0 0 1 0 1 1 0 0 1 0 0 1 0 0 REVB <Zd>.<T>, <Pg>/M, <Zn>.<T> if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; if size == '00' then UNDEFINED; constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant integer swsize = 8; 0 0 0 0 0 1 0 1 1 0 0 1 0 1 1 0 0 REVH <Zd>.<T>, <Pg>/M, <Zn>.<T> if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; if size IN {'0x'} then UNDEFINED; constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant integer swsize = 16; 0 0 0 0 0 1 0 1 1 0 0 1 1 0 1 0 0 REVW <Zd>.D, <Pg>/M, <Zn>.D if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; if size != '11' then UNDEFINED; constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant integer swsize = 32; <Zd> Is the name of the destination scalable vector register, encoded in the "Zd" field. <T> For the byte variant: is the size specifier, size <T> 00 RESERVED 01 H 10 S 11 D
<T> For the halfword variant: is the size specifier, size<0> <T> 0 S 1 D
<Pg> Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field. <Zn> Is the name of the source scalable vector register, encoded in the "Zn" field.
CheckSVEEnabled(); constant integer VL = CurrentVL; constant integer PL = VL DIV 8; constant integer elements = VL DIV esize; constant bits(PL) mask = P[g, PL]; constant bits(VL) operand = if AnyActiveElement(mask, esize) then Z[n, VL] else Zeros(VL); bits(VL) result = Z[d, VL]; for e = 0 to elements-1 if ActivePredicateElement(mask, e, esize) then constant bits(esize) element = Elem[operand, e, esize]; Elem[result, e, esize] = Reverse(element, swsize); Z[d, VL] = result;