RSHRNT Rounding shift right narrow by immediate (top) Shift each unsigned integer value in the source vector elements right by an immediate value, and place the rounded results in the odd-numbered half-width destination elements, leaving the even-numbered elements unchanged. The immediate shift amount is an unsigned value in the range 1 to number of bits per element. This instruction is unpredicated. Green False True 0 1 0 0 0 1 0 1 0 1 0 0 0 1 1 1 RSHRNT <Zd>.<T>, <Zn>.<Tb>, #<const> if !IsFeatureImplemented(FEAT_SVE2) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; constant bits(3) tsize = tszh:tszl; if tsize == '000' then UNDEFINED; constant integer esize = 8 << HighestSetBit(tsize); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant integer shift = (2 * esize) - UInt(tsize:imm3); <Zd> Is the name of the destination scalable vector register, encoded in the "Zd" field. <T> Is the size specifier, tszh tszl <T> 0 00 RESERVED 0 01 B 0 1x H 1 xx S <Zn> Is the name of the source scalable vector register, encoded in the "Zn" field. <Tb> Is the size specifier, tszh tszl <Tb> 0 00 RESERVED 0 01 H 0 1x S 1 xx D <const> Is the immediate shift amount, in the range 1 to number of bits per element, encoded in "tszh:tszl:imm3". CheckSVEEnabled(); constant integer VL = CurrentVL; constant integer PL = VL DIV 8; constant integer elements = VL DIV (2 * esize); constant bits(VL) operand = Z[n, VL]; bits(VL) result = Z[d, VL]; for e = 0 to elements-1 constant bits(2*esize) element = Elem[operand, e, 2*esize]; constant integer res = (UInt(element) + (1 << (shift-1))) >> shift; Elem[result, 2*e + 1, esize] = res<esize-1:0>; Z[d, VL] = result;