SADDLT Signed add long (top) Add the corresponding odd-numbered signed elements of the first and second source vectors, and place the results in the overlapping double-width elements of the destination vector. This instruction is unpredicated. Green False True 0 1 0 0 0 1 0 1 0 0 0 0 0 0 1 SADDLT <Zd>.<T>, <Zn>.<Tb>, <Zm>.<Tb> if !IsFeatureImplemented(FEAT_SVE2) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; if size == '00' then UNDEFINED; constant integer esize = 8 << UInt(size); constant integer n = UInt(Zn); constant integer m = UInt(Zm); constant integer d = UInt(Zd); constant integer sel1 = 1; constant integer sel2 = 1; constant boolean unsigned = FALSE; <Zd> Is the name of the destination scalable vector register, encoded in the "Zd" field. <T> Is the size specifier, size <T> 00 RESERVED 01 H 10 S 11 D <Zn> Is the name of the first source scalable vector register, encoded in the "Zn" field. <Tb> Is the size specifier, size <Tb> 00 RESERVED 01 B 10 H 11 S <Zm> Is the name of the second source scalable vector register, encoded in the "Zm" field. CheckSVEEnabled(); constant integer VL = CurrentVL; constant integer elements = VL DIV esize; constant bits(VL) operand1 = Z[n, VL]; constant bits(VL) operand2 = Z[m, VL]; bits(VL) result; for e = 0 to elements-1 constant integer element1 = Int(Elem[operand1, 2*e + sel1, esize DIV 2], unsigned); constant integer element2 = Int(Elem[operand2, 2*e + sel2, esize DIV 2], unsigned); constant integer res = element1 + element2; Elem[result, e, esize] = res<esize-1:0>; Z[d, VL] = result;