SBCLB
Subtract with carry long (bottom)
Subtract the even-numbered elements of the first source vector and the inverted 1-bit carry from the least-significant bit of the odd-numbered elements of the second source vector from the even-numbered elements of the destination and accumulator vector. The 1-bit carry output is placed in the corresponding odd-numbered element of the destination vector.
Green
False
True
True
0
1
0
0
0
1
0
1
1
0
1
1
0
1
0
0
SBCLB <Zda>.<T>, <Zn>.<T>, <Zm>.<T>
if !IsFeatureImplemented(FEAT_SVE2) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED;
constant integer esize = 32 << UInt(sz);
constant integer n = UInt(Zn);
constant integer m = UInt(Zm);
constant integer da = UInt(Zda);
<Zda>
Is the name of the third source and destination scalable vector register, encoded in the "Zda" field.
<T>
Is the size specifier,
<Zn>
Is the name of the first source scalable vector register, encoded in the "Zn" field.
<Zm>
Is the name of the second source scalable vector register, encoded in the "Zm" field.
CheckSVEEnabled();
constant integer VL = CurrentVL;
constant integer pairs = VL DIV (esize * 2);
constant bits(VL) operand = Z[n, VL];
constant bits(VL) carries = Z[m, VL];
bits(VL) result = Z[da, VL];
for p = 0 to pairs-1
constant bits(esize) element1 = Elem[result, 2*p + 0, esize];
constant bits(esize) element2 = Elem[operand, 2*p + 0, esize];
constant bit carry_in = Elem[carries, 2*p + 1, esize]<0>;
constant (res, nzcv) = AddWithCarry(element1, NOT(element2), carry_in);
constant bit carry_out = nzcv<1>;
Elem[result, 2*p + 0, esize] = res;
Elem[result, 2*p + 1, esize] = ZeroExtend(carry_out, esize);
Z[da, VL] = result;