SBFIZ Signed bitfield insert in zeros This instruction copies a bitfield of <width> bits from the least significant bits of the source register to bit position <lsb> of the destination register, setting the destination bits below the bitfield to zero, and the bits above the bitfield to a copy of the most significant bit of the bitfield. If PSTATE.DIT is 1: The execution time of this instruction is independent of: The values of the data supplied in any of its registers. The values of the NZCV flags. The response of this instruction to asynchronous exceptions does not vary based on: The values of the data supplied in any of its registers. The values of the NZCV flags. SBFM 0 0 1 0 0 1 1 0 0 0 SBFIZ <Wd>, <Wn>, #<lsb>, #<width> SBFM <Wd>, <Wn>, #(-<lsb> MOD 32), #(<width>-1) UInt(imms) < UInt(immr) 1 1 SBFIZ <Xd>, <Xn>, #<lsb>, #<width> SBFM <Xd>, <Xn>, #(-<lsb> MOD 64), #(<width>-1) UInt(imms) < UInt(immr) <Wd> Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field. <Wn> Is the 32-bit name of the general-purpose source register, encoded in the "Rn" field. <lsb> For the 32-bit variant: is the bit number of the lsb of the destination bitfield, in the range 0 to 31. <lsb> For the 64-bit variant: is the bit number of the lsb of the destination bitfield, in the range 0 to 63. <width> For the 32-bit variant: is the width of the bitfield, in the range 1 to 32-<lsb>. <width> For the 64-bit variant: is the width of the bitfield, in the range 1 to 64-<lsb>. <Xd> Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field. <Xn> Is the 64-bit name of the general-purpose source register, encoded in the "Rn" field.