STADDH, STADDLH Atomic add on halfword in memory, without return This instruction atomically loads a 16-bit halfword from memory, adds the value held in a register to it, and stores the result back to memory. STADDH does not have release semantics. STADDLH stores to memory with release semantics, as described in Load-Acquire, Store-Release. For information about addressing modes, see Load/Store addressing modes. If PSTATE.DIT is 1, the timing of this instruction is insensitive to the value of the data being loaded or stored. LDADDH, LDADDAH, LDADDALH, LDADDLH 0 1 1 1 1 0 0 0 0 1 0 0 0 0 0 0 1 1 1 1 1 0 STADDH <Ws>, [<Xn|SP>] LDADDH <Ws>, WZR, [<Xn|SP>] Unconditionally 1 STADDLH <Ws>, [<Xn|SP>] LDADDLH <Ws>, WZR, [<Xn|SP>] Unconditionally <Ws> Is the 32-bit name of the general-purpose register holding the data value to be operated on with the contents of the memory location, encoded in the "Rs" field. <Xn|SP> Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field.