STLR Store-release register This instruction stores a 32-bit word or a 64-bit doubleword to a memory location, from a register. The instruction also has memory ordering semantics as described in Load-Acquire, Store-Release. For information about addressing modes, see Load/Store addressing modes. If PSTATE.DIT is 1, the timing of this instruction is insensitive to the value of the data being loaded or stored. It has encodings from 2 classes: No offset and Pre-index 1 x 0 0 1 0 0 0 1 0 0 (1) (1) (1) (1) (1) 1 (1) (1) (1) (1) (1) 0 STLR <Wt>, [<Xn|SP>{, #0}] 1 STLR <Xt>, [<Xn|SP>{, #0}] constant integer t = UInt(Rt); constant integer n = UInt(Rn); constant boolean wback = FALSE; constant integer offset = 0; constant boolean rt_unknown = FALSE; constant integer elsize = 8 << UInt(size); constant integer datasize = elsize; constant boolean tagchecked = n != 31; 1 x 0 1 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 STLR <Wt>, [<Xn|SP>, #-4]! 1 STLR <Xt>, [<Xn|SP>, #-8]! constant boolean wback = TRUE; constant integer t = UInt(Rt); constant integer n = UInt(Rn); constant integer datasize = 8 << UInt(size); constant integer offset = -1 * (1 << UInt(size)); constant boolean tagchecked = TRUE; boolean rt_unknown = FALSE; if n == t && n != 31 then constant Constraint c = ConstrainUnpredictable(Unpredictable_WBOVERLAPST); assert c IN {Constraint_NONE, Constraint_UNKNOWN, Constraint_UNDEF, Constraint_NOP}; case c of when Constraint_NONE rt_unknown = FALSE; // value stored is original value when Constraint_UNKNOWN rt_unknown = TRUE; // value stored is UNKNOWN when Constraint_UNDEF UNDEFINED; when Constraint_NOP ExecuteAsNOP(); <Wt> Is the 32-bit name of the general-purpose register to be transferred, encoded in the "Rt" field. <Xn|SP> Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field. <Xt> Is the 64-bit name of the general-purpose register to be transferred, encoded in the "Rt" field. bits(64) address; constant integer dbytes = datasize DIV 8; constant AccessDescriptor accdesc = CreateAccDescAcqRel(MemOp_STORE, tagchecked); if n == 31 then CheckSPAlignment(); address = SP[]; else address = X[n, 64]; address = AddressAdd(address, offset, accdesc); bits(datasize) data; if rt_unknown then data = bits(datasize) UNKNOWN; else data = X[t, datasize]; Mem[address, dbytes, accdesc] = data; if wback then if n == 31 then SP[] = address; else X[n, 64] = address;