STR (immediate) Store register (immediate) This instruction stores a word or a doubleword from a register to memory. The address that is used for the store is calculated from a base register and an immediate offset. For information about addressing modes, see Load/Store addressing modes. If PSTATE.DIT is 1, the timing of this instruction is insensitive to the value of the data being loaded or stored. It has encodings from 3 classes: Post-index , Pre-index and Unsigned offset 1 x 1 1 1 0 0 0 0 0 0 0 1 0 STR <Wt>, [<Xn|SP>], #<simm> 1 STR <Xt>, [<Xn|SP>], #<simm> constant boolean wback = TRUE; constant boolean postindex = TRUE; constant integer scale = UInt(size); constant bits(64) offset = SignExtend(imm9, 64); 1 x 1 1 1 0 0 0 0 0 0 1 1 0 STR <Wt>, [<Xn|SP>, #<simm>]! 1 STR <Xt>, [<Xn|SP>, #<simm>]! constant boolean wback = TRUE; constant boolean postindex = FALSE; constant integer scale = UInt(size); constant bits(64) offset = SignExtend(imm9, 64); 1 x 1 1 1 0 0 1 0 0 0 STR <Wt>, [<Xn|SP>{, #<pimm>}] 1 STR <Xt>, [<Xn|SP>{, #<pimm>}] constant boolean wback = FALSE; constant boolean postindex = FALSE; constant integer scale = UInt(size); constant bits(64) offset = LSL(ZeroExtend(imm12, 64), scale); <Wt> Is the 32-bit name of the general-purpose register to be transferred, encoded in the "Rt" field. <Xn|SP> Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field. <simm> Is the signed immediate byte offset, in the range -256 to 255, encoded in the "imm9" field. <Xt> Is the 64-bit name of the general-purpose register to be transferred, encoded in the "Rt" field. <pimm> For the 32-bit variant: is the optional positive immediate byte offset, a multiple of 4 in the range 0 to 16380, defaulting to 0 and encoded in the "imm12" field as <pimm>/4. <pimm> For the 64-bit variant: is the optional positive immediate byte offset, a multiple of 8 in the range 0 to 32760, defaulting to 0 and encoded in the "imm12" field as <pimm>/8. constant integer t = UInt(Rt); constant integer n = UInt(Rn); constant integer datasize = 8 << scale; constant boolean nontemporal = FALSE; constant boolean tagchecked = wback || n != 31; Constraint c; boolean rt_unknown = FALSE; if wback && n == t && n != 31 then c = ConstrainUnpredictable(Unpredictable_WBOVERLAPST); assert c IN {Constraint_NONE, Constraint_UNKNOWN, Constraint_UNDEF, Constraint_NOP}; case c of when Constraint_NONE rt_unknown = FALSE; // Value stored is original value when Constraint_UNKNOWN rt_unknown = TRUE; // Value stored is UNKNOWN when Constraint_UNDEF UNDEFINED; when Constraint_NOP ExecuteAsNOP(); bits(64) address; constant boolean privileged = PSTATE.EL != EL0; constant AccessDescriptor accdesc = CreateAccDescGPR(MemOp_STORE, nontemporal, privileged, tagchecked); if n == 31 then CheckSPAlignment(); address = SP[]; else address = X[n, 64]; if !postindex then address = AddressAdd(address, offset, accdesc); bits(datasize) data; if rt_unknown then data = bits(datasize) UNKNOWN; else data = X[t, datasize]; Mem[address, datasize DIV 8, accdesc] = data; if wback then if postindex then address = AddressAdd(address, offset, accdesc); if n == 31 then SP[] = address; else X[n, 64] = address;