STRH (immediate) Store register halfword (immediate) This instruction stores the least significant halfword of a 32-bit register to memory. The address that is used for the store is calculated from a base register and an immediate offset. For information about addressing modes, see Load/Store addressing modes. For information about the CONSTRAINED UNPREDICTABLE behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors, and particularly STRH (immediate). If PSTATE.DIT is 1, the timing of this instruction is insensitive to the value of the data being loaded or stored. It has encodings from 3 classes: Post-index , Pre-index and Unsigned offset 0 1 1 1 1 0 0 0 0 0 0 0 1 STRH <Wt>, [<Xn|SP>], #<simm> constant boolean wback = TRUE; constant boolean postindex = TRUE; constant bits(64) offset = SignExtend(imm9, 64); 0 1 1 1 1 0 0 0 0 0 0 1 1 STRH <Wt>, [<Xn|SP>, #<simm>]! constant boolean wback = TRUE; constant boolean postindex = FALSE; constant bits(64) offset = SignExtend(imm9, 64); 0 1 1 1 1 0 0 1 0 0 STRH <Wt>, [<Xn|SP>{, #<pimm>}] constant boolean wback = FALSE; constant boolean postindex = FALSE; constant bits(64) offset = LSL(ZeroExtend(imm12, 64), 1); <Wt> Is the 32-bit name of the general-purpose register to be transferred, encoded in the "Rt" field. <Xn|SP> Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field. <simm> Is the signed immediate byte offset, in the range -256 to 255, encoded in the "imm9" field. <pimm> Is the optional positive immediate byte offset, a multiple of 2 in the range 0 to 8190, defaulting to 0 and encoded in the "imm12" field as <pimm>/2. constant integer t = UInt(Rt); constant integer n = UInt(Rn); constant boolean nontemporal = FALSE; constant boolean tagchecked = wback || n != 31; Constraint c; boolean rt_unknown = FALSE; if wback && n == t && n != 31 then c = ConstrainUnpredictable(Unpredictable_WBOVERLAPST); assert c IN {Constraint_NONE, Constraint_UNKNOWN, Constraint_UNDEF, Constraint_NOP}; case c of when Constraint_NONE rt_unknown = FALSE; // Value stored is original value when Constraint_UNKNOWN rt_unknown = TRUE; // Value stored is UNKNOWN when Constraint_UNDEF UNDEFINED; when Constraint_NOP ExecuteAsNOP(); bits(64) address; constant boolean privileged = PSTATE.EL != EL0; constant AccessDescriptor accdesc = CreateAccDescGPR(MemOp_STORE, nontemporal, privileged, tagchecked); if n == 31 then CheckSPAlignment(); address = SP[]; else address = X[n, 64]; if !postindex then address = AddressAdd(address, offset, accdesc); bits(16) data; if rt_unknown then data = bits(16) UNKNOWN; else data = X[t, 16]; Mem[address, 2, accdesc] = data; if wback then if postindex then address = AddressAdd(address, offset, accdesc); if n == 31 then SP[] = address; else X[n, 64] = address;