STSETB, STSETLB Atomic bit set on byte in memory, without return This instruction atomically loads an 8-bit byte from memory, performs a bitwise OR with the value held in a register on it, and stores the result back to memory. STSETB does not have release semantics. STSETLB stores to memory with release semantics, as described in Load-Acquire, Store-Release. For information about addressing modes, see Load/Store addressing modes. If PSTATE.DIT is 1, the timing of this instruction is insensitive to the value of the data being loaded or stored. LDSETB, LDSETAB, LDSETALB, LDSETLB 0 0 1 1 1 0 0 0 0 1 0 0 1 1 0 0 1 1 1 1 1 0 STSETB <Ws>, [<Xn|SP>] LDSETB <Ws>, WZR, [<Xn|SP>] Unconditionally 1 STSETLB <Ws>, [<Xn|SP>] LDSETLB <Ws>, WZR, [<Xn|SP>] Unconditionally <Ws> Is the 32-bit name of the general-purpose register holding the data value to be operated on with the contents of the memory location, encoded in the "Rs" field. <Xn|SP> Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field.