SUNPKHI, SUNPKLO Signed unpack and extend half of vector Unpack elements from the lowest or highest half of the source vector and then sign-extend them to place in elements of twice their size within the destination vector. This instruction is unpredicated. Green False True It has encodings from 2 classes: High half and Low half 0 0 0 0 0 1 0 1 1 1 0 0 0 1 0 0 1 1 1 0 SUNPKHI <Zd>.<T>, <Zn>.<Tb> if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; if size == '00' then UNDEFINED; constant integer esize = 8 << UInt(size); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean unsigned = FALSE; constant boolean hi = TRUE; 0 0 0 0 0 1 0 1 1 1 0 0 0 0 0 0 1 1 1 0 SUNPKLO <Zd>.<T>, <Zn>.<Tb> if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; if size == '00' then UNDEFINED; constant integer esize = 8 << UInt(size); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean unsigned = FALSE; constant boolean hi = FALSE; <Zd> Is the name of the destination scalable vector register, encoded in the "Zd" field. <T> Is the size specifier, size <T> 00 RESERVED 01 H 10 S 11 D <Zn> Is the name of the source scalable vector register, encoded in the "Zn" field. <Tb> Is the size specifier, size <Tb> 00 RESERVED 01 B 10 H 11 S CheckSVEEnabled(); constant integer VL = CurrentVL; constant integer elements = VL DIV esize; constant integer hsize = esize DIV 2; constant integer offset = if hi then elements else 0; constant bits(VL) operand = Z[n, VL]; bits(VL) result; for e = 0 to elements-1 constant bits(hsize) element = Elem[operand, e + offset, hsize]; Elem[result, e, esize] = Extend(element, esize, unsigned); Z[d, VL] = result;