SXTB, SXTH, SXTW
Signed byte / halfword / word extend (predicated)
Sign-extend the least-significant sub-element of each active element of the source vector, and place the results in the corresponding elements of the destination vector. Inactive elements in the destination vector register remain unmodified.
Green
True
True
True
True
It has encodings from 3 classes:
Byte
,
Halfword
and
Word
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1
SXTB <Zd>.<T>, <Pg>/M, <Zn>.<T>
if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED;
if size == '00' then UNDEFINED;
constant integer esize = 8 << UInt(size);
constant integer s_esize = 8;
constant integer g = UInt(Pg);
constant integer n = UInt(Zn);
constant integer d = UInt(Zd);
constant boolean unsigned = FALSE;
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SXTH <Zd>.<T>, <Pg>/M, <Zn>.<T>
if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED;
if size IN {'0x'} then UNDEFINED;
constant integer esize = 8 << UInt(size);
constant integer s_esize = 16;
constant integer g = UInt(Pg);
constant integer n = UInt(Zn);
constant integer d = UInt(Zd);
constant boolean unsigned = FALSE;
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SXTW <Zd>.D, <Pg>/M, <Zn>.D
if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED;
if size != '11' then UNDEFINED;
constant integer esize = 8 << UInt(size);
constant integer s_esize = 32;
constant integer g = UInt(Pg);
constant integer n = UInt(Zn);
constant integer d = UInt(Zd);
constant boolean unsigned = FALSE;
<Zd>
Is the name of the destination scalable vector register, encoded in the "Zd" field.
<T>
For the byte variant: is the size specifier,
size
<T>
00
RESERVED
01
H
10
S
11
D
<T>
For the halfword variant: is the size specifier,
<Pg>
Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field.
<Zn>
Is the name of the source scalable vector register, encoded in the "Zn" field.
CheckSVEEnabled();
constant integer VL = CurrentVL;
constant integer PL = VL DIV 8;
constant integer elements = VL DIV esize;
constant bits(PL) mask = P[g, PL];
constant bits(VL) operand = if AnyActiveElement(mask, esize) then Z[n, VL] else Zeros(VL);
bits(VL) result = Z[d, VL];
for e = 0 to elements-1
if ActivePredicateElement(mask, e, esize) then
constant bits(esize) element = Elem[operand, e, esize];
Elem[result, e, esize] = Extend(element<s_esize-1:0>, esize, unsigned);
Z[d, VL] = result;