UMULH (unpredicated) Unsigned multiply returning high half (unpredicated) Widening multiply unsigned integer values of all elements of the first source vector by corresponding elements of the second source vector and place the high half of the result in the corresponding elements of the destination vector. This instruction is unpredicated. Green False True 0 0 0 0 0 1 0 0 1 0 1 1 0 1 1 UMULH <Zd>.<T>, <Zn>.<T>, <Zm>.<T> if !IsFeatureImplemented(FEAT_SVE2) && !IsFeatureImplemented(FEAT_SME) then UNDEFINED; constant integer esize = 8 << UInt(size); constant integer n = UInt(Zn); constant integer m = UInt(Zm); constant integer d = UInt(Zd); constant boolean unsigned = TRUE; <Zd> Is the name of the destination scalable vector register, encoded in the "Zd" field. <T> Is the size specifier, size <T> 00 B 01 H 10 S 11 D <Zn> Is the name of the first source scalable vector register, encoded in the "Zn" field. <Zm> Is the name of the second source scalable vector register, encoded in the "Zm" field. CheckSVEEnabled(); constant integer VL = CurrentVL; constant integer elements = VL DIV esize; constant bits(VL) operand1 = Z[n, VL]; constant bits(VL) operand2 = Z[m, VL]; bits(VL) result; for e = 0 to elements-1 constant integer element1 = Int(Elem[operand1, e, esize], unsigned); constant integer element2 = Int(Elem[operand2, e, esize], unsigned); constant integer product = (element1 * element2) >> esize; Elem[result, e, esize] = product<esize-1:0>; Z[d, VL] = result;