ZIP (four registers) Interleave elements from four vectors Place the four-way interleaved elements from the four source vectors in the corresponding elements of the four destination vectors. This instruction is unpredicated. Green False True SM_1_only It has encodings from 2 classes: 8-bit to 64-bit elements and 128-bit element 1 1 0 0 0 0 0 1 1 1 0 1 1 0 1 1 1 0 0 0 0 0 0 0 ZIP { <Zd1>.<T>-<Zd4>.<T> }, { <Zn1>.<T>-<Zn4>.<T> } if !IsFeatureImplemented(FEAT_SME2) then UNDEFINED; if size == '11' && MaxImplementedSVL() < 256 then UNDEFINED; constant integer esize = 8 << UInt(size); constant integer n = UInt(Zn:'00'); constant integer d = UInt(Zd:'00'); 1 1 0 0 0 0 0 1 0 0 1 1 0 1 1 1 1 1 1 0 0 0 0 0 0 0 ZIP { <Zd1>.Q-<Zd4>.Q }, { <Zn1>.Q-<Zn4>.Q } if !IsFeatureImplemented(FEAT_SME2) then UNDEFINED; if MaxImplementedSVL() < 512 then UNDEFINED; constant integer esize = 128; constant integer n = UInt(Zn:'00'); constant integer d = UInt(Zd:'00'); <Zd1> Is the name of the first scalable vector register of the destination multi-vector group, encoded as "Zd" times 4. <T> Is the size specifier, size <T> 00 B 01 H 10 S 11 D <Zd4> Is the name of the fourth scalable vector register of the destination multi-vector group, encoded as "Zd" times 4 plus 3. <Zn1> Is the name of the first scalable vector register of the source multi-vector group, encoded as "Zn" times 4. <Zn4> Is the name of the fourth scalable vector register of the source multi-vector group, encoded as "Zn" times 4 plus 3. CheckStreamingSVEEnabled(); constant integer VL = CurrentVL; if VL < esize * 4 then UNDEFINED; constant integer quads = VL DIV (esize * 4); constant bits(VL) operand0 = Z[n, VL]; constant bits(VL) operand1 = Z[n+1, VL]; constant bits(VL) operand2 = Z[n+2, VL]; constant bits(VL) operand3 = Z[n+3, VL]; bits(VL) result; for r = 0 to 3 constant integer base = r * quads; for q = 0 to quads-1 Elem[result, 4*q+0, esize] = Elem[operand0, base+q, esize]; Elem[result, 4*q+1, esize] = Elem[operand1, base+q, esize]; Elem[result, 4*q+2, esize] = Elem[operand2, base+q, esize]; Elem[result, 4*q+3, esize] = Elem[operand3, base+q, esize]; Z[d+r, VL] = result;