#[doc = "Register `IER` writer"] pub type W = crate::W<IerSpec>; #[doc = "Field `RXRDY` writer - Enable RXRDY Interrupt"] pub type RxrdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXRDY` writer - Enable TXRDY Interrupt"] pub type TxrdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENDRX` writer - Enable End of Receive Transfer Interrupt"] pub type EndrxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ENDTX` writer - Enable End of Transmit Interrupt"] pub type EndtxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OVRE` writer - Enable Overrun Error Interrupt"] pub type OvreW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FRAME` writer - Enable Framing Error Interrupt"] pub type FrameW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PARE` writer - Enable Parity Error Interrupt"] pub type PareW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXEMPTY` writer - Enable TXEMPTY Interrupt"] pub type TxemptyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXBUFE` writer - Enable Buffer Empty Interrupt"] pub type TxbufeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXBUFF` writer - Enable Buffer Full Interrupt"] pub type RxbuffW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Enable RXRDY Interrupt"] #[inline(always)] #[must_use] pub fn rxrdy(&mut self) -> RxrdyW<IerSpec> { RxrdyW::new(self, 0) } #[doc = "Bit 1 - Enable TXRDY Interrupt"] #[inline(always)] #[must_use] pub fn txrdy(&mut self) -> TxrdyW<IerSpec> { TxrdyW::new(self, 1) } #[doc = "Bit 3 - Enable End of Receive Transfer Interrupt"] #[inline(always)] #[must_use] pub fn endrx(&mut self) -> EndrxW<IerSpec> { EndrxW::new(self, 3) } #[doc = "Bit 4 - Enable End of Transmit Interrupt"] #[inline(always)] #[must_use] pub fn endtx(&mut self) -> EndtxW<IerSpec> { EndtxW::new(self, 4) } #[doc = "Bit 5 - Enable Overrun Error Interrupt"] #[inline(always)] #[must_use] pub fn ovre(&mut self) -> OvreW<IerSpec> { OvreW::new(self, 5) } #[doc = "Bit 6 - Enable Framing Error Interrupt"] #[inline(always)] #[must_use] pub fn frame(&mut self) -> FrameW<IerSpec> { FrameW::new(self, 6) } #[doc = "Bit 7 - Enable Parity Error Interrupt"] #[inline(always)] #[must_use] pub fn pare(&mut self) -> PareW<IerSpec> { PareW::new(self, 7) } #[doc = "Bit 9 - Enable TXEMPTY Interrupt"] #[inline(always)] #[must_use] pub fn txempty(&mut self) -> TxemptyW<IerSpec> { TxemptyW::new(self, 9) } #[doc = "Bit 11 - Enable Buffer Empty Interrupt"] #[inline(always)] #[must_use] pub fn txbufe(&mut self) -> TxbufeW<IerSpec> { TxbufeW::new(self, 11) } #[doc = "Bit 12 - Enable Buffer Full Interrupt"] #[inline(always)] #[must_use] pub fn rxbuff(&mut self) -> RxbuffW<IerSpec> { RxbuffW::new(self, 12) } } #[doc = "Interrupt Enable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ier::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IerSpec; impl crate::RegisterSpec for IerSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`ier::W`](W) writer structure"] impl crate::Writable for IerSpec { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; }