avrdude: Version 6.3-20171130
         Copyright (c) 2000-2005 Brian Dean, http://www.bdmicro.com/
         Copyright (c) 2007-2014 Joerg Wunsch

         System wide configuration file is "/etc/avrdude.conf"
         User configuration file is "/home/lkostka/.avrduderc"
         User configuration file does not exist or is not a regular file, skipping

         Using Port                    : /dev/ttyUSB2
         Using Programmer              : stk500v2
STK500V2: stk500v2_open()
STK500V2: stk500v2_getsync()
STK500V2: stk500v2_send(0x1b 0x01 0x00 0x01 0x0e 0x01 0x14 , 7)
avrdude: Send: . [1b] . [01] . [00] . [01] . [0e] . [01] . [14] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [01] 
0x01 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [0b] 
0x0b hoping for size MSB... msg is 11 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: S [53] 
0x53 avrdude: Recv: T [54] 
0x54 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [02] 
0x02 
avrdude: stk500v2_getsync(): found STK500 programmer
         AVR Part                      : ATmega2560
         Chip Erase delay              : 9000 us
         PAGEL                         : PD7
         BS2                           : PA0
         RESET disposition             : dedicated
         RETRY pulse                   : SCK
         serial program mode           : yes
         parallel program mode         : yes
         Timeout                       : 200
         StabDelay                     : 100
         CmdexeDelay                   : 25
         SyncLoops                     : 32
         ByteDelay                     : 0
         PollIndex                     : 3
         PollValue                     : 0x53
         Memory Detail                 :

                                  Block Poll               Page                       Polled
           Memory Type Mode Delay Size  Indx Paged  Size   Size #Pages MinW  MaxW   ReadBack
           ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- ---------
           eeprom        65    10     8    0 no       4096    8      0  9000  9000 0x00 0x00
             Memory Ops:
               Oeration     Inst Bit  Bit Type  Bitno  Value
               -----------  --------  --------  -----  -----
               READ               31     VALUE      7      1
                                  30     VALUE      6      0
                                  29     VALUE      5      1
                                  28     VALUE      4      0
                                  27     VALUE      3      0
                                  26     VALUE      2      0
                                  25     VALUE      1      0
                                  24     VALUE      0      0
                                  23    IGNORE      7      0
                                  22    IGNORE      6      0
                                  21    IGNORE      5      0
                                  20    IGNORE      4      0
                                  19   ADDRESS     11      0
                                  18   ADDRESS     10      0
                                  17   ADDRESS      9      0
                                  16   ADDRESS      8      0
                                  15   ADDRESS      7      0
                                  14   ADDRESS      6      0
                                  13   ADDRESS      5      0
                                  12   ADDRESS      4      0
                                  11   ADDRESS      3      0
                                  10   ADDRESS      2      0
                                   9   ADDRESS      1      0
                                   8   ADDRESS      0      0
                                   7    OUTPUT      7      0
                                   6    OUTPUT      6      0
                                   5    OUTPUT      5      0
                                   4    OUTPUT      4      0
                                   3    OUTPUT      3      0
                                   2    OUTPUT      2      0
                                   1    OUTPUT      1      0
                                   0    OUTPUT      0      0
               WRITE              31     VALUE      7      1
                                  30     VALUE      6      1
                                  29     VALUE      5      0
                                  28     VALUE      4      0
                                  27     VALUE      3      0
                                  26     VALUE      2      0
                                  25     VALUE      1      0
                                  24     VALUE      0      0
                                  23    IGNORE      7      0
                                  22    IGNORE      6      0
                                  21    IGNORE      5      0
                                  20    IGNORE      4      0
                                  19   ADDRESS     11      0
                                  18   ADDRESS     10      0
                                  17   ADDRESS      9      0
                                  16   ADDRESS      8      0
                                  15   ADDRESS      7      0
                                  14   ADDRESS      6      0
                                  13   ADDRESS      5      0
                                  12   ADDRESS      4      0
                                  11   ADDRESS      3      0
                                  10   ADDRESS      2      0
                                   9   ADDRESS      1      0
                                   8   ADDRESS      0      0
                                   7     INPUT      7      0
                                   6     INPUT      6      0
                                   5     INPUT      5      0
                                   4     INPUT      4      0
                                   3     INPUT      3      0
                                   2     INPUT      2      0
                                   1     INPUT      1      0
                                   0     INPUT      0      0
               LOADPAGE_LO        31     VALUE      7      1
                                  30     VALUE      6      1
                                  29     VALUE      5      0
                                  28     VALUE      4      0
                                  27     VALUE      3      0
                                  26     VALUE      2      0
                                  25     VALUE      1      0
                                  24     VALUE      0      1
                                  23     VALUE      7      0
                                  22     VALUE      6      0
                                  21     VALUE      5      0
                                  20     VALUE      4      0
                                  19     VALUE      3      0
                                  18     VALUE      2      0
                                  17     VALUE      1      0
                                  16     VALUE      0      0
                                  15     VALUE      7      0
                                  14     VALUE      6      0
                                  13     VALUE      5      0
                                  12     VALUE      4      0
                                  11     VALUE      3      0
                                  10   ADDRESS      2      0
                                   9   ADDRESS      1      0
                                   8   ADDRESS      0      0
                                   7     INPUT      7      0
                                   6     INPUT      6      0
                                   5     INPUT      5      0
                                   4     INPUT      4      0
                                   3     INPUT      3      0
                                   2     INPUT      2      0
                                   1     INPUT      1      0
                                   0     INPUT      0      0
               WRITEPAGE          31     VALUE      7      1
                                  30     VALUE      6      1
                                  29     VALUE      5      0
                                  28     VALUE      4      0
                                  27     VALUE      3      0
                                  26     VALUE      2      0
                                  25     VALUE      1      1
                                  24     VALUE      0      0
                                  23     VALUE      7      0
                                  22     VALUE      6      0
                                  21    IGNORE      5      0
                                  20    IGNORE      4      0
                                  19   ADDRESS     11      0
                                  18   ADDRESS     10      0
                                  17   ADDRESS      9      0
                                  16   ADDRESS      8      0
                                  15   ADDRESS      7      0
                                  14   ADDRESS      6      0
                                  13   ADDRESS      5      0
                                  12   ADDRESS      4      0
                                  11   ADDRESS      3      0
                                  10     VALUE      2      0
                                   9     VALUE      1      0
                                   8     VALUE      0      0
                                   7    IGNORE      7      0
                                   6    IGNORE      6      0
                                   5    IGNORE      5      0
                                   4    IGNORE      4      0
                                   3    IGNORE      3      0
                                   2    IGNORE      2      0
                                   1    IGNORE      1      0
                                   0    IGNORE      0      0
                                  Block Poll               Page                       Polled
           Memory Type Mode Delay Size  Indx Paged  Size   Size #Pages MinW  MaxW   ReadBack
           ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- ---------
           flash         65    10   256    0 yes    262144  256   1024  4500  4500 0x00 0x00
             Memory Ops:
               Oeration     Inst Bit  Bit Type  Bitno  Value
               -----------  --------  --------  -----  -----
               READ_LO            31     VALUE      7      0
                                  30     VALUE      6      0
                                  29     VALUE      5      1
                                  28     VALUE      4      0
                                  27     VALUE      3      0
                                  26     VALUE      2      0
                                  25     VALUE      1      0
                                  24     VALUE      0      0
                                  23   ADDRESS     15      0
                                  22   ADDRESS     14      0
                                  21   ADDRESS     13      0
                                  20   ADDRESS     12      0
                                  19   ADDRESS     11      0
                                  18   ADDRESS     10      0
                                  17   ADDRESS      9      0
                                  16   ADDRESS      8      0
                                  15   ADDRESS      7      0
                                  14   ADDRESS      6      0
                                  13   ADDRESS      5      0
                                  12   ADDRESS      4      0
                                  11   ADDRESS      3      0
                                  10   ADDRESS      2      0
                                   9   ADDRESS      1      0
                                   8   ADDRESS      0      0
                                   7    OUTPUT      7      0
                                   6    OUTPUT      6      0
                                   5    OUTPUT      5      0
                                   4    OUTPUT      4      0
                                   3    OUTPUT      3      0
                                   2    OUTPUT      2      0
                                   1    OUTPUT      1      0
                                   0    OUTPUT      0      0
               READ_HI            31     VALUE      7      0
                                  30     VALUE      6      0
                                  29     VALUE      5      1
                                  28     VALUE      4      0
                                  27     VALUE      3      1
                                  26     VALUE      2      0
                                  25     VALUE      1      0
                                  24     VALUE      0      0
                                  23   ADDRESS     15      0
                                  22   ADDRESS     14      0
                                  21   ADDRESS     13      0
                                  20   ADDRESS     12      0
                                  19   ADDRESS     11      0
                                  18   ADDRESS     10      0
                                  17   ADDRESS      9      0
                                  16   ADDRESS      8      0
                                  15   ADDRESS      7      0
                                  14   ADDRESS      6      0
                                  13   ADDRESS      5      0
                                  12   ADDRESS      4      0
                                  11   ADDRESS      3      0
                                  10   ADDRESS      2      0
                                   9   ADDRESS      1      0
                                   8   ADDRESS      0      0
                                   7    OUTPUT      7      0
                                   6    OUTPUT      6      0
                                   5    OUTPUT      5      0
                                   4    OUTPUT      4      0
                                   3    OUTPUT      3      0
                                   2    OUTPUT      2      0
                                   1    OUTPUT      1      0
                                   0    OUTPUT      0      0
               LOADPAGE_LO        31     VALUE      7      0
                                  30     VALUE      6      1
                                  29     VALUE      5      0
                                  28     VALUE      4      0
                                  27     VALUE      3      0
                                  26     VALUE      2      0
                                  25     VALUE      1      0
                                  24     VALUE      0      0
                                  23    IGNORE      7      0
                                  22    IGNORE      6      0
                                  21    IGNORE      5      0
                                  20    IGNORE      4      0
                                  19    IGNORE      3      0
                                  18    IGNORE      2      0
                                  17    IGNORE      1      0
                                  16    IGNORE      0      0
                                  15    IGNORE      7      0
                                  14   ADDRESS      6      0
                                  13   ADDRESS      5      0
                                  12   ADDRESS      4      0
                                  11   ADDRESS      3      0
                                  10   ADDRESS      2      0
                                   9   ADDRESS      1      0
                                   8   ADDRESS      0      0
                                   7     INPUT      7      0
                                   6     INPUT      6      0
                                   5     INPUT      5      0
                                   4     INPUT      4      0
                                   3     INPUT      3      0
                                   2     INPUT      2      0
                                   1     INPUT      1      0
                                   0     INPUT      0      0
               LOADPAGE_HI        31     VALUE      7      0
                                  30     VALUE      6      1
                                  29     VALUE      5      0
                                  28     VALUE      4      0
                                  27     VALUE      3      1
                                  26     VALUE      2      0
                                  25     VALUE      1      0
                                  24     VALUE      0      0
                                  23    IGNORE      7      0
                                  22    IGNORE      6      0
                                  21    IGNORE      5      0
                                  20    IGNORE      4      0
                                  19    IGNORE      3      0
                                  18    IGNORE      2      0
                                  17    IGNORE      1      0
                                  16    IGNORE      0      0
                                  15    IGNORE      7      0
                                  14   ADDRESS      6      0
                                  13   ADDRESS      5      0
                                  12   ADDRESS      4      0
                                  11   ADDRESS      3      0
                                  10   ADDRESS      2      0
                                   9   ADDRESS      1      0
                                   8   ADDRESS      0      0
                                   7     INPUT      7      0
                                   6     INPUT      6      0
                                   5     INPUT      5      0
                                   4     INPUT      4      0
                                   3     INPUT      3      0
                                   2     INPUT      2      0
                                   1     INPUT      1      0
                                   0     INPUT      0      0
               LOAD_EXT_ADDR        31     VALUE      7      0
                                  30     VALUE      6      1
                                  29     VALUE      5      0
                                  28     VALUE      4      0
                                  27     VALUE      3      1
                                  26     VALUE      2      1
                                  25     VALUE      1      0
                                  24     VALUE      0      1
                                  23     VALUE      7      0
                                  22     VALUE      6      0
                                  21     VALUE      5      0
                                  20     VALUE      4      0
                                  19     VALUE      3      0
                                  18     VALUE      2      0
                                  17     VALUE      1      0
                                  16     VALUE      0      0
                                  15     VALUE      7      0
                                  14     VALUE      6      0
                                  13     VALUE      5      0
                                  12     VALUE      4      0
                                  11     VALUE      3      0
                                  10     VALUE      2      0
                                   9     VALUE      1      0
                                   8   ADDRESS     16      0
                                   7     VALUE      7      0
                                   6     VALUE      6      0
                                   5     VALUE      5      0
                                   4     VALUE      4      0
                                   3     VALUE      3      0
                                   2     VALUE      2      0
                                   1     VALUE      1      0
                                   0     VALUE      0      0
               WRITEPAGE          31     VALUE      7      0
                                  30     VALUE      6      1
                                  29     VALUE      5      0
                                  28     VALUE      4      0
                                  27     VALUE      3      1
                                  26     VALUE      2      1
                                  25     VALUE      1      0
                                  24     VALUE      0      0
                                  23   ADDRESS     15      0
                                  22   ADDRESS     14      0
                                  21   ADDRESS     13      0
                                  20   ADDRESS     12      0
                                  19   ADDRESS     11      0
                                  18   ADDRESS     10      0
                                  17   ADDRESS      9      0
                                  16   ADDRESS      8      0
                                  15   ADDRESS      7      0
                                  14    IGNORE      6      0
                                  13    IGNORE      5      0
                                  12    IGNORE      4      0
                                  11    IGNORE      3      0
                                  10    IGNORE      2      0
                                   9    IGNORE      1      0
                                   8    IGNORE      0      0
                                   7    IGNORE      7      0
                                   6    IGNORE      6      0
                                   5    IGNORE      5      0
                                   4    IGNORE      4      0
                                   3    IGNORE      3      0
                                   2    IGNORE      2      0
                                   1    IGNORE      1      0
                                   0    IGNORE      0      0
                                  Block Poll               Page                       Polled
           Memory Type Mode Delay Size  Indx Paged  Size   Size #Pages MinW  MaxW   ReadBack
           ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- ---------
           lfuse          0     0     0    0 no          1    0      0  9000  9000 0x00 0x00
             Memory Ops:
               Oeration     Inst Bit  Bit Type  Bitno  Value
               -----------  --------  --------  -----  -----
               READ               31     VALUE      7      0
                                  30     VALUE      6      1
                                  29     VALUE      5      0
                                  28     VALUE      4      1
                                  27     VALUE      3      0
                                  26     VALUE      2      0
                                  25     VALUE      1      0
                                  24     VALUE      0      0
                                  23     VALUE      7      0
                                  22     VALUE      6      0
                                  21     VALUE      5      0
                                  20     VALUE      4      0
                                  19     VALUE      3      0
                                  18     VALUE      2      0
                                  17     VALUE      1      0
                                  16     VALUE      0      0
                                  15    IGNORE      7      0
                                  14    IGNORE      6      0
                                  13    IGNORE      5      0
                                  12    IGNORE      4      0
                                  11    IGNORE      3      0
                                  10    IGNORE      2      0
                                   9    IGNORE      1      0
                                   8    IGNORE      0      0
                                   7    OUTPUT      7      0
                                   6    OUTPUT      6      0
                                   5    OUTPUT      5      0
                                   4    OUTPUT      4      0
                                   3    OUTPUT      3      0
                                   2    OUTPUT      2      0
                                   1    OUTPUT      1      0
                                   0    OUTPUT      0      0
               WRITE              31     VALUE      7      1
                                  30     VALUE      6      0
                                  29     VALUE      5      1
                                  28     VALUE      4      0
                                  27     VALUE      3      1
                                  26     VALUE      2      1
                                  25     VALUE      1      0
                                  24     VALUE      0      0
                                  23     VALUE      7      1
                                  22     VALUE      6      0
                                  21     VALUE      5      1
                                  20     VALUE      4      0
                                  19     VALUE      3      0
                                  18     VALUE      2      0
                                  17     VALUE      1      0
                                  16     VALUE      0      0
                                  15    IGNORE      7      0
                                  14    IGNORE      6      0
                                  13    IGNORE      5      0
                                  12    IGNORE      4      0
                                  11    IGNORE      3      0
                                  10    IGNORE      2      0
                                   9    IGNORE      1      0
                                   8    IGNORE      0      0
                                   7     INPUT      7      0
                                   6     INPUT      6      0
                                   5     INPUT      5      0
                                   4     INPUT      4      0
                                   3     INPUT      3      0
                                   2     INPUT      2      0
                                   1     INPUT      1      0
                                   0     INPUT      0      0
                                  Block Poll               Page                       Polled
           Memory Type Mode Delay Size  Indx Paged  Size   Size #Pages MinW  MaxW   ReadBack
           ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- ---------
           hfuse          0     0     0    0 no          1    0      0  9000  9000 0x00 0x00
             Memory Ops:
               Oeration     Inst Bit  Bit Type  Bitno  Value
               -----------  --------  --------  -----  -----
               READ               31     VALUE      7      0
                                  30     VALUE      6      1
                                  29     VALUE      5      0
                                  28     VALUE      4      1
                                  27     VALUE      3      1
                                  26     VALUE      2      0
                                  25     VALUE      1      0
                                  24     VALUE      0      0
                                  23     VALUE      7      0
                                  22     VALUE      6      0
                                  21     VALUE      5      0
                                  20     VALUE      4      0
                                  19     VALUE      3      1
                                  18     VALUE      2      0
                                  17     VALUE      1      0
                                  16     VALUE      0      0
                                  15    IGNORE      7      0
                                  14    IGNORE      6      0
                                  13    IGNORE      5      0
                                  12    IGNORE      4      0
                                  11    IGNORE      3      0
                                  10    IGNORE      2      0
                                   9    IGNORE      1      0
                                   8    IGNORE      0      0
                                   7    OUTPUT      7      0
                                   6    OUTPUT      6      0
                                   5    OUTPUT      5      0
                                   4    OUTPUT      4      0
                                   3    OUTPUT      3      0
                                   2    OUTPUT      2      0
                                   1    OUTPUT      1      0
                                   0    OUTPUT      0      0
               WRITE              31     VALUE      7      1
                                  30     VALUE      6      0
                                  29     VALUE      5      1
                                  28     VALUE      4      0
                                  27     VALUE      3      1
                                  26     VALUE      2      1
                                  25     VALUE      1      0
                                  24     VALUE      0      0
                                  23     VALUE      7      1
                                  22     VALUE      6      0
                                  21     VALUE      5      1
                                  20     VALUE      4      0
                                  19     VALUE      3      1
                                  18     VALUE      2      0
                                  17     VALUE      1      0
                                  16     VALUE      0      0
                                  15    IGNORE      7      0
                                  14    IGNORE      6      0
                                  13    IGNORE      5      0
                                  12    IGNORE      4      0
                                  11    IGNORE      3      0
                                  10    IGNORE      2      0
                                   9    IGNORE      1      0
                                   8    IGNORE      0      0
                                   7     INPUT      7      0
                                   6     INPUT      6      0
                                   5     INPUT      5      0
                                   4     INPUT      4      0
                                   3     INPUT      3      0
                                   2     INPUT      2      0
                                   1     INPUT      1      0
                                   0     INPUT      0      0
                                  Block Poll               Page                       Polled
           Memory Type Mode Delay Size  Indx Paged  Size   Size #Pages MinW  MaxW   ReadBack
           ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- ---------
           efuse          0     0     0    0 no          1    0      0  9000  9000 0x00 0x00
             Memory Ops:
               Oeration     Inst Bit  Bit Type  Bitno  Value
               -----------  --------  --------  -----  -----
               READ               31     VALUE      7      0
                                  30     VALUE      6      1
                                  29     VALUE      5      0
                                  28     VALUE      4      1
                                  27     VALUE      3      0
                                  26     VALUE      2      0
                                  25     VALUE      1      0
                                  24     VALUE      0      0
                                  23     VALUE      7      0
                                  22     VALUE      6      0
                                  21     VALUE      5      0
                                  20     VALUE      4      0
                                  19     VALUE      3      1
                                  18     VALUE      2      0
                                  17     VALUE      1      0
                                  16     VALUE      0      0
                                  15    IGNORE      7      0
                                  14    IGNORE      6      0
                                  13    IGNORE      5      0
                                  12    IGNORE      4      0
                                  11    IGNORE      3      0
                                  10    IGNORE      2      0
                                   9    IGNORE      1      0
                                   8    IGNORE      0      0
                                   7    OUTPUT      7      0
                                   6    OUTPUT      6      0
                                   5    OUTPUT      5      0
                                   4    OUTPUT      4      0
                                   3    OUTPUT      3      0
                                   2    OUTPUT      2      0
                                   1    OUTPUT      1      0
                                   0    OUTPUT      0      0
               WRITE              31     VALUE      7      1
                                  30     VALUE      6      0
                                  29     VALUE      5      1
                                  28     VALUE      4      0
                                  27     VALUE      3      1
                                  26     VALUE      2      1
                                  25     VALUE      1      0
                                  24     VALUE      0      0
                                  23     VALUE      7      1
                                  22     VALUE      6      0
                                  21     VALUE      5      1
                                  20     VALUE      4      0
                                  19     VALUE      3      0
                                  18     VALUE      2      1
                                  17     VALUE      1      0
                                  16     VALUE      0      0
                                  15    IGNORE      7      0
                                  14    IGNORE      6      0
                                  13    IGNORE      5      0
                                  12    IGNORE      4      0
                                  11    IGNORE      3      0
                                  10    IGNORE      2      0
                                   9    IGNORE      1      0
                                   8    IGNORE      0      0
                                   7    IGNORE      7      0
                                   6    IGNORE      6      0
                                   5    IGNORE      5      0
                                   4    IGNORE      4      0
                                   3    IGNORE      3      0
                                   2     INPUT      2      0
                                   1     INPUT      1      0
                                   0     INPUT      0      0
                                  Block Poll               Page                       Polled
           Memory Type Mode Delay Size  Indx Paged  Size   Size #Pages MinW  MaxW   ReadBack
           ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- ---------
           lock           0     0     0    0 no          1    0      0  9000  9000 0x00 0x00
             Memory Ops:
               Oeration     Inst Bit  Bit Type  Bitno  Value
               -----------  --------  --------  -----  -----
               READ               31     VALUE      7      0
                                  30     VALUE      6      1
                                  29     VALUE      5      0
                                  28     VALUE      4      1
                                  27     VALUE      3      1
                                  26     VALUE      2      0
                                  25     VALUE      1      0
                                  24     VALUE      0      0
                                  23     VALUE      7      0
                                  22     VALUE      6      0
                                  21     VALUE      5      0
                                  20     VALUE      4      0
                                  19     VALUE      3      0
                                  18     VALUE      2      0
                                  17     VALUE      1      0
                                  16     VALUE      0      0
                                  15    IGNORE      7      0
                                  14    IGNORE      6      0
                                  13    IGNORE      5      0
                                  12    IGNORE      4      0
                                  11    IGNORE      3      0
                                  10    IGNORE      2      0
                                   9    IGNORE      1      0
                                   8    IGNORE      0      0
                                   7    OUTPUT      7      0
                                   6    OUTPUT      6      0
                                   5    OUTPUT      5      0
                                   4    OUTPUT      4      0
                                   3    OUTPUT      3      0
                                   2    OUTPUT      2      0
                                   1    OUTPUT      1      0
                                   0    OUTPUT      0      0
               WRITE              31     VALUE      7      1
                                  30     VALUE      6      0
                                  29     VALUE      5      1
                                  28     VALUE      4      0
                                  27     VALUE      3      1
                                  26     VALUE      2      1
                                  25     VALUE      1      0
                                  24     VALUE      0      0
                                  23     VALUE      7      1
                                  22     VALUE      6      1
                                  21     VALUE      5      1
                                  20    IGNORE      4      0
                                  19    IGNORE      3      0
                                  18    IGNORE      2      0
                                  17    IGNORE      1      0
                                  16    IGNORE      0      0
                                  15    IGNORE      7      0
                                  14    IGNORE      6      0
                                  13    IGNORE      5      0
                                  12    IGNORE      4      0
                                  11    IGNORE      3      0
                                  10    IGNORE      2      0
                                   9    IGNORE      1      0
                                   8    IGNORE      0      0
                                   7     VALUE      7      1
                                   6     VALUE      6      1
                                   5     INPUT      5      0
                                   4     INPUT      4      0
                                   3     INPUT      3      0
                                   2     INPUT      2      0
                                   1     INPUT      1      0
                                   0     INPUT      0      0
                                  Block Poll               Page                       Polled
           Memory Type Mode Delay Size  Indx Paged  Size   Size #Pages MinW  MaxW   ReadBack
           ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- ---------
           calibration    0     0     0    0 no          1    0      0     0     0 0x00 0x00
             Memory Ops:
               Oeration     Inst Bit  Bit Type  Bitno  Value
               -----------  --------  --------  -----  -----
               READ               31     VALUE      7      0
                                  30     VALUE      6      0
                                  29     VALUE      5      1
                                  28     VALUE      4      1
                                  27     VALUE      3      1
                                  26     VALUE      2      0
                                  25     VALUE      1      0
                                  24     VALUE      0      0
                                  23    IGNORE      7      0
                                  22    IGNORE      6      0
                                  21    IGNORE      5      0
                                  20    IGNORE      4      0
                                  19    IGNORE      3      0
                                  18    IGNORE      2      0
                                  17    IGNORE      1      0
                                  16    IGNORE      0      0
                                  15     VALUE      7      0
                                  14     VALUE      6      0
                                  13     VALUE      5      0
                                  12     VALUE      4      0
                                  11     VALUE      3      0
                                  10     VALUE      2      0
                                   9     VALUE      1      0
                                   8     VALUE      0      0
                                   7    OUTPUT      7      0
                                   6    OUTPUT      6      0
                                   5    OUTPUT      5      0
                                   4    OUTPUT      4      0
                                   3    OUTPUT      3      0
                                   2    OUTPUT      2      0
                                   1    OUTPUT      1      0
                                   0    OUTPUT      0      0
                                  Block Poll               Page                       Polled
           Memory Type Mode Delay Size  Indx Paged  Size   Size #Pages MinW  MaxW   ReadBack
           ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- ---------
           signature      0     0     0    0 no          3    0      0     0     0 0x00 0x00
             Memory Ops:
               Oeration     Inst Bit  Bit Type  Bitno  Value
               -----------  --------  --------  -----  -----
               READ               31     VALUE      7      0
                                  30     VALUE      6      0
                                  29     VALUE      5      1
                                  28     VALUE      4      1
                                  27     VALUE      3      0
                                  26     VALUE      2      0
                                  25     VALUE      1      0
                                  24     VALUE      0      0
                                  23    IGNORE      7      0
                                  22    IGNORE      6      0
                                  21    IGNORE      5      0
                                  20    IGNORE      4      0
                                  19    IGNORE      3      0
                                  18    IGNORE      2      0
                                  17    IGNORE      1      0
                                  16    IGNORE      0      0
                                  15    IGNORE      7      0
                                  14    IGNORE      6      0
                                  13    IGNORE      5      0
                                  12    IGNORE      4      0
                                  11    IGNORE      3      0
                                  10    IGNORE      2      0
                                   9   ADDRESS      1      0
                                   8   ADDRESS      0      0
                                   7    OUTPUT      7      0
                                   6    OUTPUT      6      0
                                   5    OUTPUT      5      0
                                   4    OUTPUT      4      0
                                   3    OUTPUT      3      0
                                   2    OUTPUT      2      0
                                   1    OUTPUT      1      0
                                   0    OUTPUT      0      0

         Programmer Type : STK500V2
         Description     : Atmel STK500 Version 2.x firmware
         Programmer Model: STK500
STK500V2: stk500v2_command(0x03 0x90 , 2)
STK500V2: stk500v2_send(0x1b 0x02 0x00 0x02 0x0e 0x03 0x90 0x86 , 8)
avrdude: Send: . [1b] . [02] . [00] . [02] . [0e] . [03] . [90] . [86] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [02] 
0x02 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 3 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [16] 
0x16 
 = 9
STK500V2: stk500v2_command(0x03 0x91 , 2)
STK500V2: stk500v2_send(0x1b 0x03 0x00 0x02 0x0e 0x03 0x91 0x86 , 8)
avrdude: Send: . [1b] . [03] . [00] . [02] . [0e] . [03] . [91] . [86] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [03] 
0x03 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 3 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [14] 
0x14 
 = 9
STK500V2: stk500v2_command(0x03 0x92 , 2)
STK500V2: stk500v2_send(0x1b 0x04 0x00 0x02 0x0e 0x03 0x92 0x82 , 8)
avrdude: Send: . [1b] . [04] . [00] . [02] . [0e] . [03] . [92] . [82] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [04] 
0x04 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 3 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [01] 
0x01 
 = 9
         Hardware Version: 1
         Firmware Version Master : 2.16
STK500V2: stk500v2_command(0x03 0x9a , 2)
STK500V2: stk500v2_send(0x1b 0x05 0x00 0x02 0x0e 0x03 0x9a 0x8b , 8)
avrdude: Send: . [1b] . [05] . [00] . [02] . [0e] . [03] . [9a] . [8b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [05] 
0x05 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 3 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [9c] 
0x9c 
 = 9
         Topcard         : Unknown
STK500V2: stk500v2_command(0x03 0x94 , 2)
STK500V2: stk500v2_send(0x1b 0x06 0x00 0x02 0x0e 0x03 0x94 0x86 , 8)
avrdude: Send: . [1b] . [06] . [00] . [02] . [0e] . [03] . [94] . [86] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [06] 
0x06 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 3 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: ! [21] 
0x21 
 = 9
         Vtarget         : 5.0 V
STK500V2: stk500v2_command(0x03 0x98 , 2)
STK500V2: stk500v2_send(0x1b 0x07 0x00 0x02 0x0e 0x03 0x98 0x8b , 8)
avrdude: Send: . [1b] . [07] . [00] . [02] . [0e] . [03] . [98] . [8b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [07] 
0x07 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 3 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [13] 
0x13 
 = 9
STK500V2: stk500v2_command(0x03 0x95 , 2)
STK500V2: stk500v2_send(0x1b 0x08 0x00 0x02 0x0e 0x03 0x95 0x89 , 8)
avrdude: Send: . [1b] . [08] . [00] . [02] . [0e] . [03] . [95] . [89] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [08] 
0x08 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 3 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: / [2f] 
0x2f 
 = 9
STK500V2: stk500v2_command(0x03 0x96 , 2)
STK500V2: stk500v2_send(0x1b 0x09 0x00 0x02 0x0e 0x03 0x96 0x8b , 8)
avrdude: Send: . [1b] . [09] . [00] . [02] . [0e] . [03] . [96] . [8b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [09] 
0x09 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 3 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [1e] 
0x1e 
 = 9
STK500V2: stk500v2_command(0x03 0x97 , 2)
STK500V2: stk500v2_send(0x1b 0x0a 0x00 0x02 0x0e 0x03 0x97 0x89 , 8)
avrdude: Send: . [1b] . [0a] . [00] . [02] . [0e] . [03] . [97] . [89] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0a] 
0x0a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 3 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1e] 
0x1e 
 = 9
         SCK period      : 2.2 us
         Varef           : 5.0 V
         Oscillator      : 230.400 kHz

STK500V2: stk500v2_command(0x02 0x9e 0x01 , 3)
STK500V2: stk500v2_send(0x1b 0x0b 0x00 0x03 0x0e 0x02 0x9e 0x01 0x80 , 9)
avrdude: Send: . [1b] . [0b] . [00] . [03] . [0e] . [02] . [9e] . [01] . [80] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0b] 
0x0b hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e 
 = 8
STK500V2: stk500v2_command(0x10 0xc8 0x64 0x19 0x20 0x00 0x53 0x03 0xac 0x53 0x00 0x00 , 12)
STK500V2: stk500v2_send(0x1b 0x0c 0x00 0x0c 0x0e 0x10 0xc8 0x64 0x19 0x20 0x00 0x53 0x03 0xac 0x53 0x00 0x00 0x3f , 18)
avrdude: Send: . [1b] . [0c] . [00] . [0c] . [0e] . [10] . [c8] d [64] . [19]   [20] . [00] S [53] . [03] . [ac] S [53] . [00] . [00] ? [3f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0c] 
0x0c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0b] 
0x0b 
 = 8
avrdude: AVR device initialized and ready to accept instructions

Reading | avrdude: stk500isp_read_byte(.., signature, 0x0, ...)
avrdude: stk500isp_read_byte(): Sending read memory command: STK500V2: stk500v2_command(0x1b 0x04 0x30 0x00 0x00 0x00 , 6)
STK500V2: stk500v2_send(0x1b 0x0d 0x00 0x06 0x0e 0x1b 0x04 0x30 0x00 0x00 0x00 0x31 , 12)
avrdude: Send: . [1b] . [0d] . [00] . [06] . [0e] . [1b] . [04] 0 [30] . [00] . [00] . [00] 1 [31] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0d] 
0x0d hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [04] 
0x04 hoping for size MSB... msg is 4 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [19] 
0x19 
 = 10
avrdude: stk500isp_read_byte(.., signature, 0x1, ...)
avrdude: stk500isp_read_byte(): Sending read memory command: STK500V2: stk500v2_command(0x1b 0x04 0x30 0x00 0x01 0x00 , 6)
STK500V2: stk500v2_send(0x1b 0x0e 0x00 0x06 0x0e 0x1b 0x04 0x30 0x00 0x01 0x00 0x33 , 12)
avrdude: Send: . [1b] . [0e] . [00] . [06] . [0e] . [1b] . [04] 0 [30] . [00] . [01] . [00] 3 [33] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0e] 
0x0e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [04] 
0x04 hoping for size MSB... msg is 4 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9c] 
0x9c 
 = 10
################avrdude: stk500isp_read_byte(.., signature, 0x2, ...)
avrdude: stk500isp_read_byte(): Sending read memory command: STK500V2: stk500v2_command(0x1b 0x04 0x30 0x00 0x02 0x00 , 6)
STK500V2: stk500v2_send(0x1b 0x0f 0x00 0x06 0x0e 0x1b 0x04 0x30 0x00 0x02 0x00 0x31 , 12)
avrdude: Send: . [1b] . [0f] . [00] . [06] . [0e] . [1b] . [04] 0 [30] . [00] . [02] . [00] 1 [31] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0f] 
0x0f hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [04] 
0x04 hoping for size MSB... msg is 4 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [04] 
0x04 
 = 10
################################## | 100% 0.10s

avrdude: Device signature = 0x1e9801 (probably m2560)
avrdude: reading flash memory:

Reading | STK500V2: stk500v2_paged_load(..,flash,256,0,256)
block_size at addr 0 is 256
STK500V2: stk500v2_loadaddr(-2147483648)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x00 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x10 0x00 0x05 0x0e 0x06 0x80 0x00 0x00 0x00 0x86 , 11)
avrdude: Send: . [1b] . [10] . [00] . [05] . [0e] . [06] . [80] . [00] . [00] . [00] . [86] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [10] 
0x10 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x11 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x35 , 10)
avrdude: Send: . [1b] . [11] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 5 [35] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [11] 
0x11 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [08] 
0x08 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [08] 
0x08 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [0a] 
0x0a avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [0a] 
0x0a avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c9] 
0xc9 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,256,256)
block_size at addr 256 is 256
STK500V2: stk500v2_loadaddr(-2147483520)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x00 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x12 0x00 0x05 0x0e 0x06 0x80 0x00 0x00 0x80 0x04 , 11)
avrdude: Send: . [1b] . [12] . [00] . [05] . [0e] . [06] . [80] . [00] . [00] . [80] . [04] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [12] 
0x12 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x13 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x37 , 10)
avrdude: Send: . [1b] . [13] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 7 [37] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [13] 
0x13 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ae] 
0xae avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [02] 
0x02 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [ec] 
0xec avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: P [50] 
0x50 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [09] 
0x09 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8e] 
0x8e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,512,256)
block_size at addr 512 is 256
STK500V2: stk500v2_loadaddr(-2147483392)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x01 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x14 0x00 0x05 0x0e 0x06 0x80 0x00 0x01 0x00 0x83 , 11)
avrdude: Send: . [1b] . [14] . [00] . [05] . [0e] . [06] . [80] . [00] . [01] . [00] . [83] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [14] 
0x14 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [05] 
0x05 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x15 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x31 , 10)
avrdude: Send: . [1b] . [15] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 1 [31] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [15] 
0x15 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [cf] 
0xcf avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [82] 
0x82 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: # [23] 
0x23 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: & [26] 
0x26 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [95] 
0x95 avrdude: Recv: & [26] 
0x26 avrdude: Recv: # [23] 
0x23 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,768,256)
block_size at addr 768 is 256
STK500V2: stk500v2_loadaddr(-2147483264)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x01 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x16 0x00 0x05 0x0e 0x06 0x80 0x00 0x01 0x80 0x01 , 11)
avrdude: Send: . [1b] . [16] . [00] . [05] . [0e] . [06] . [80] . [00] . [01] . [80] . [01] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [16] 
0x16 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [07] 
0x07 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x17 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x33 , 10)
avrdude: Send: . [1b] . [17] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 3 [33] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [17] 
0x17 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [82] 
0x82 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [03] 
0x03 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: B [42] 
0x42 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [94] 
0x94 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [03] 
0x03 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [03] 
0x03 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [02] 
0x02 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [07] 
0x07 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [89] 
0x89 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,1024,256)
block_size at addr 1024 is 256
STK500V2: stk500v2_loadaddr(-2147483136)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x02 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x18 0x00 0x05 0x0e 0x06 0x80 0x00 0x02 0x00 0x8c , 11)
avrdude: Send: . [1b] . [18] . [00] . [05] . [0e] . [06] . [80] . [00] . [02] . [00] . [8c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [18] 
0x18 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [09] 
0x09 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x19 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3d , 10)
avrdude: Send: . [1b] . [19] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] = [3d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [19] 
0x19 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [82] 
0x82 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [82] 
0x82 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [01] 
0x01 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [96] 
0x96 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [91] 
0x91 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [91] 
0x91 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,1280,256)
block_size at addr 1280 is 256
STK500V2: stk500v2_loadaddr(-2147483008)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x02 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x1a 0x00 0x05 0x0e 0x06 0x80 0x00 0x02 0x80 0x0e , 11)
avrdude: Send: . [1b] . [1a] . [00] . [05] . [0e] . [06] . [80] . [00] . [02] . [80] . [0e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1a] 
0x1a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0b] 
0x0b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3f , 10)
avrdude: Send: . [1b] . [1b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ? [3f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1b] 
0x1b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [83] 
0x83 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [85] 
0x85 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,1536,256)
block_size at addr 1536 is 256
STK500V2: stk500v2_loadaddr(-2147482880)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x03 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x1c 0x00 0x05 0x0e 0x06 0x80 0x00 0x03 0x00 0x89 , 11)
avrdude: Send: . [1b] . [1c] . [00] . [05] . [0e] . [06] . [80] . [00] . [03] . [00] . [89] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1c] 
0x1c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0d] 
0x0d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x39 , 10)
avrdude: Send: . [1b] . [1d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 9 [39] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1d] 
0x1d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [83] 
0x83 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [96] 
0x96 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,1792,256)
block_size at addr 1792 is 256
STK500V2: stk500v2_loadaddr(-2147482752)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x03 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x1e 0x00 0x05 0x0e 0x06 0x80 0x00 0x03 0x80 0x0b , 11)
avrdude: Send: . [1b] . [1e] . [00] . [05] . [0e] . [06] . [80] . [00] . [03] . [80] . [0b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1e] 
0x1e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3b , 10)
avrdude: Send: . [1b] . [1f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ; [3b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1f] 
0x1f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [83] 
0x83 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [83] 
0x83 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [83] 
0x83 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [83] 
0x83 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 4 [34] 
0x34 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,2048,256)
block_size at addr 2048 is 256
STK500V2: stk500v2_loadaddr(-2147482624)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x04 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x20 0x00 0x05 0x0e 0x06 0x80 0x00 0x04 0x00 0xb2 , 11)
avrdude: Send: . [1b]   [20] . [00] . [05] . [0e] . [06] . [80] . [00] . [04] . [00] . [b2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv:   [20] 
0x20 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 1 [31] 
0x31 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x21 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x05 , 10)
avrdude: Send: . [1b] ! [21] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [05] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ! [21] 
0x21 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [95] 
0x95 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: # [23] 
0x23 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [82] 
0x82 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [08] 
0x08 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [95] 
0x95 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: # [23] 
0x23 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [02] 
0x02 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [95] 
0x95 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: p [70] 
0x70 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: C [43] 
0x43 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [83] 
0x83 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [83] 
0x83 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [99] 
0x99 avrdude: Recv: " [22] 
0x22 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [98] 
0x98 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [98] 
0x98 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: T [54] 
0x54 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,2304,256)
block_size at addr 2304 is 256
STK500V2: stk500v2_loadaddr(-2147482496)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x04 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x22 0x00 0x05 0x0e 0x06 0x80 0x00 0x04 0x80 0x30 , 11)
avrdude: Send: . [1b] " [22] . [00] . [05] . [0e] . [06] . [80] . [00] . [04] . [80] 0 [30] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: " [22] 
0x22 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 3 [33] 
0x33 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x23 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x07 , 10)
avrdude: Send: . [1b] # [23] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [07] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: # [23] 
0x23 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: C [43] 
0x43 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [83] 
0x83 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [83] 
0x83 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [82] 
0x82 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [98] 
0x98 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [82] 
0x82 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [04] 
0x04 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [98] 
0x98 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,2560,256)
block_size at addr 2560 is 256
STK500V2: stk500v2_loadaddr(-2147482368)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x05 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x24 0x00 0x05 0x0e 0x06 0x80 0x00 0x05 0x00 0xb7 , 11)
avrdude: Send: . [1b] $ [24] . [00] . [05] . [0e] . [06] . [80] . [00] . [05] . [00] . [b7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: $ [24] 
0x24 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 5 [35] 
0x35 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x25 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x01 , 10)
avrdude: Send: . [1b] % [25] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [01] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: % [25] 
0x25 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [04] 
0x04 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [98] 
0x98 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [04] 
0x04 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [80] 
0x80 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [88] 
0x88 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [04] 
0x04 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b1] 
0xb1 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,2816,256)
block_size at addr 2816 is 256
STK500V2: stk500v2_loadaddr(-2147482240)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x05 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x26 0x00 0x05 0x0e 0x06 0x80 0x00 0x05 0x80 0x35 , 11)
avrdude: Send: . [1b] & [26] . [00] . [05] . [0e] . [06] . [80] . [00] . [05] . [80] 5 [35] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: & [26] 
0x26 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 7 [37] 
0x37 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x27 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x03 , 10)
avrdude: Send: . [1b] ' [27] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [03] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ' [27] 
0x27 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,3072,256)
block_size at addr 3072 is 256
STK500V2: stk500v2_loadaddr(-2147482112)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x06 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x28 0x00 0x05 0x0e 0x06 0x80 0x00 0x06 0x00 0xb8 , 11)
avrdude: Send: . [1b] ( [28] . [00] . [05] . [0e] . [06] . [80] . [00] . [06] . [00] . [b8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ( [28] 
0x28 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 9 [39] 
0x39 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x29 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0d , 10)
avrdude: Send: . [1b] ) [29] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ) [29] 
0x29 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f1] 
0xf1 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,3328,256)
block_size at addr 3328 is 256
STK500V2: stk500v2_loadaddr(-2147481984)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x06 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x2a 0x00 0x05 0x0e 0x06 0x80 0x00 0x06 0x80 0x3a , 11)
avrdude: Send: . [1b] * [2a] . [00] . [05] . [0e] . [06] . [80] . [00] . [06] . [80] : [3a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: * [2a] 
0x2a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ; [3b] 
0x3b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0f , 10)
avrdude: Send: . [1b] + [2b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: + [2b] 
0x2b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ff] 
0xff avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [87] 
0x87 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [94] 
0x94 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [94] 
0x94 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [98] 
0x98 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [be] 
0xbe 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,3584,256)
block_size at addr 3584 is 256
STK500V2: stk500v2_loadaddr(-2147481856)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x07 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x2c 0x00 0x05 0x0e 0x06 0x80 0x00 0x07 0x00 0xbd , 11)
avrdude: Send: . [1b] , [2c] . [00] . [05] . [0e] . [06] . [80] . [00] . [07] . [00] . [bd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: , [2c] 
0x2c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: = [3d] 
0x3d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x09 , 10)
avrdude: Send: . [1b] - [2d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [09] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: - [2d] 
0x2d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [98] 
0x98 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [98] 
0x98 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [86] 
0x86 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [86] 
0x86 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [86] 
0x86 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [95] 
0x95 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: H [48] 
0x48 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [11] 
0x11 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [11] 
0x11 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [ef] 
0xef avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [90] 
0x90 avrdude: Recv: @ [40] 
0x40 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [ff] 
0xff avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [cf] 
0xcf avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [cf] 
0xcf avrdude: Recv: D [44] 
0x44 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e6] 
0xe6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,3840,256)
block_size at addr 3840 is 256
STK500V2: stk500v2_loadaddr(-2147481728)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x07 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x2e 0x00 0x05 0x0e 0x06 0x80 0x00 0x07 0x80 0x3f , 11)
avrdude: Send: . [1b] . [2e] . [00] . [05] . [0e] . [06] . [80] . [00] . [07] . [80] ? [3f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [2e] 
0x2e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ? [3f] 
0x3f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0b , 10)
avrdude: Send: . [1b] / [2f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: / [2f] 
0x2f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [83] 
0x83 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [82] 
0x82 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [ee] 
0xee avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [ff] 
0xff avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8c] 
0x8c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,4096,256)
block_size at addr 4096 is 256
STK500V2: stk500v2_loadaddr(-2147481600)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x08 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x30 0x00 0x05 0x0e 0x06 0x80 0x00 0x08 0x00 0xae , 11)
avrdude: Send: . [1b] 0 [30] . [00] . [05] . [0e] . [06] . [80] . [00] . [08] . [00] . [ae] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 0 [30] 
0x30 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ! [21] 
0x21 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x31 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x15 , 10)
avrdude: Send: . [1b] 1 [31] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [15] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 1 [31] 
0x31 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [84] 
0x84 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [04] 
0x04 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,4352,256)
block_size at addr 4352 is 256
STK500V2: stk500v2_loadaddr(-2147481472)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x08 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x32 0x00 0x05 0x0e 0x06 0x80 0x00 0x08 0x80 0x2c , 11)
avrdude: Send: . [1b] 2 [32] . [00] . [05] . [0e] . [06] . [80] . [00] . [08] . [80] , [2c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 2 [32] 
0x32 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: # [23] 
0x23 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x33 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x17 , 10)
avrdude: Send: . [1b] 3 [33] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [17] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 3 [33] 
0x33 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [84] 
0x84 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [96] 
0x96 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [94] 
0x94 avrdude: Recv:   [20] 
0x20 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: / [2f] 
0x2f avrdude: Recv: p [70] 
0x70 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: i [69] 
0x69 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: ` [60] 
0x60 avrdude: Recv: % [25] 
0x25 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: & [26] 
0x26 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: i [69] 
0x69 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [96] 
0x96 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [98] 
0x98 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [82] 
0x82 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [01] 
0x01 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [08] 
0x08 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [08] 
0x08 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: y [79] 
0x79 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,4608,256)
block_size at addr 4608 is 256
STK500V2: stk500v2_loadaddr(-2147481344)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x09 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x34 0x00 0x05 0x0e 0x06 0x80 0x00 0x09 0x00 0xab , 11)
avrdude: Send: . [1b] 4 [34] . [00] . [05] . [0e] . [06] . [80] . [00] . [09] . [00] . [ab] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 4 [34] 
0x34 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: % [25] 
0x25 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x35 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x11 , 10)
avrdude: Send: . [1b] 5 [35] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [11] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 5 [35] 
0x35 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [08] 
0x08 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [08] 
0x08 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [08] 
0x08 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: ) [29] 
0x29 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [83] 
0x83 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [08] 
0x08 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: ) [29] 
0x29 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [11] 
0x11 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [11] 
0x11 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [8e] 
0x8e avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [01] 
0x01 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: D [44] 
0x44 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [94] 
0x94 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b3] 
0xb3 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,4864,256)
block_size at addr 4864 is 256
STK500V2: stk500v2_loadaddr(-2147481216)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x09 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x36 0x00 0x05 0x0e 0x06 0x80 0x00 0x09 0x80 0x29 , 11)
avrdude: Send: . [1b] 6 [36] . [00] . [05] . [0e] . [06] . [80] . [00] . [09] . [80] ) [29] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 6 [36] 
0x36 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ' [27] 
0x27 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x37 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x13 , 10)
avrdude: Send: . [1b] 7 [37] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [13] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 7 [37] 
0x37 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [87] 
0x87 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [08] 
0x08 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [08] 
0x08 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [08] 
0x08 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: h [68] 
0x68 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [08] 
0x08 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: h [68] 
0x68 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [08] 
0x08 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: h [68] 
0x68 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [08] 
0x08 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [94] 
0x94 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [81] 
0x81 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [ff] 
0xff avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,5120,256)
block_size at addr 5120 is 256
STK500V2: stk500v2_loadaddr(-2147481088)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x0a 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x38 0x00 0x05 0x0e 0x06 0x80 0x00 0x0a 0x00 0xa4 , 11)
avrdude: Send: . [1b] 8 [38] . [00] . [05] . [0e] . [06] . [80] . [00] . [0a] . [00] . [a4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 8 [38] 
0x38 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ) [29] 
0x29 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x39 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1d , 10)
avrdude: Send: . [1b] 9 [39] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 9 [39] 
0x39 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [87] 
0x87 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [83] 
0x83 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [83] 
0x83 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [83] 
0x83 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [87] 
0x87 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [08] 
0x08 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [88] 
0x88 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ac] 
0xac 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,5376,256)
block_size at addr 5376 is 256
STK500V2: stk500v2_loadaddr(-2147480960)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x0a 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x3a 0x00 0x05 0x0e 0x06 0x80 0x00 0x0a 0x80 0x26 , 11)
avrdude: Send: . [1b] : [3a] . [00] . [05] . [0e] . [06] . [80] . [00] . [0a] . [80] & [26] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: : [3a] 
0x3a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: + [2b] 
0x2b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1f , 10)
avrdude: Send: . [1b] ; [3b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ; [3b] 
0x3b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [88] 
0x88 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [07] 
0x07 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [83] 
0x83 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [82] 
0x82 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [82] 
0x82 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [06] 
0x06 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [06] 
0x06 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [03] 
0x03 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: r [72] 
0x72 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,5632,256)
block_size at addr 5632 is 256
STK500V2: stk500v2_loadaddr(-2147480832)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x0b 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x3c 0x00 0x05 0x0e 0x06 0x80 0x00 0x0b 0x00 0xa1 , 11)
avrdude: Send: . [1b] < [3c] . [00] . [05] . [0e] . [06] . [80] . [00] . [0b] . [00] . [a1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: < [3c] 
0x3c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: - [2d] 
0x2d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x19 , 10)
avrdude: Send: . [1b] = [3d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [19] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: = [3d] 
0x3d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [83] 
0x83 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [03] 
0x03 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [02] 
0x02 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [81] 
0x81 avrdude: Recv: P [50] 
0x50 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,5888,256)
block_size at addr 5888 is 256
STK500V2: stk500v2_loadaddr(-2147480704)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x0b 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x3e 0x00 0x05 0x0e 0x06 0x80 0x00 0x0b 0x80 0x23 , 11)
avrdude: Send: . [1b] > [3e] . [00] . [05] . [0e] . [06] . [80] . [00] . [0b] . [80] # [23] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: > [3e] 
0x3e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: / [2f] 
0x2f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1b , 10)
avrdude: Send: . [1b] ? [3f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ? [3f] 
0x3f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [98] 
0x98 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [01] 
0x01 avrdude: Recv: F [46] 
0x46 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ff] 
0xff avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [01] 
0x01 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [95] 
0x95 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [95] 
0x95 avrdude: Recv: F [46] 
0x46 avrdude: Recv: # [23] 
0x23 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [01] 
0x01 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [95] 
0x95 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [95] 
0x95 avrdude: Recv: F [46] 
0x46 avrdude: Recv: # [23] 
0x23 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [01] 
0x01 avrdude: Recv: F [46] 
0x46 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: I [49] 
0x49 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,6144,256)
block_size at addr 6144 is 256
STK500V2: stk500v2_loadaddr(-2147480576)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x0c 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x40 0x00 0x05 0x0e 0x06 0x80 0x00 0x0c 0x00 0xda , 11)
avrdude: Send: . [1b] @ [40] . [00] . [05] . [0e] . [06] . [80] . [00] . [0c] . [00] . [da] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: @ [40] 
0x40 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Q [51] 
0x51 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x41 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x65 , 10)
avrdude: Send: . [1b] A [41] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] e [65] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: A [41] 
0x41 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [01] 
0x01 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [95] 
0x95 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [95] 
0x95 avrdude: Recv: F [46] 
0x46 avrdude: Recv: # [23] 
0x23 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [82] 
0x82 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [82] 
0x82 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [82] 
0x82 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,6400,256)
block_size at addr 6400 is 256
STK500V2: stk500v2_loadaddr(-2147480448)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x0c 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x42 0x00 0x05 0x0e 0x06 0x80 0x00 0x0c 0x80 0x58 , 11)
avrdude: Send: . [1b] B [42] . [00] . [05] . [0e] . [06] . [80] . [00] . [0c] . [80] X [58] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: B [42] 
0x42 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: S [53] 
0x53 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x43 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x67 , 10)
avrdude: Send: . [1b] C [43] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] g [67] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: C [43] 
0x43 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [02] 
0x02 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [91] 
0x91 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [95] 
0x95 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [91] 
0x91 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [95] 
0x95 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [04] 
0x04 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [02] 
0x02 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [91] 
0x91 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cf] 
0xcf 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,6656,256)
block_size at addr 6656 is 256
STK500V2: stk500v2_loadaddr(-2147480320)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x0d 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x44 0x00 0x05 0x0e 0x06 0x80 0x00 0x0d 0x00 0xdf , 11)
avrdude: Send: . [1b] D [44] . [00] . [05] . [0e] . [06] . [80] . [00] . [0d] . [00] . [df] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: D [44] 
0x44 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: U [55] 
0x55 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x45 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x61 , 10)
avrdude: Send: . [1b] E [45] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] a [61] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: E [45] 
0x45 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [95] 
0x95 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [91] 
0x91 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [95] 
0x95 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: & [26] 
0x26 avrdude: Recv: + [2b] 
0x2b avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [89] 
0x89 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [8f] 
0x8f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [8f] 
0x8f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,6912,256)
block_size at addr 6912 is 256
STK500V2: stk500v2_loadaddr(-2147480192)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x0d 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x46 0x00 0x05 0x0e 0x06 0x80 0x00 0x0d 0x80 0x5d , 11)
avrdude: Send: . [1b] F [46] . [00] . [05] . [0e] . [06] . [80] . [00] . [0d] . [80] ] [5d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: F [46] 
0x46 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: W [57] 
0x57 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x47 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x63 , 10)
avrdude: Send: . [1b] G [47] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] c [63] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: G [47] 
0x47 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [81] 
0x81 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [81] 
0x81 avrdude: Recv: " [22] 
0x22 avrdude: Recv: P [50] 
0x50 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [07] 
0x07 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [82] 
0x82 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [00] 
0x00 avrdude: Recv: U [55] 
0x55 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,7168,256)
block_size at addr 7168 is 256
STK500V2: stk500v2_loadaddr(-2147480064)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x0e 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x48 0x00 0x05 0x0e 0x06 0x80 0x00 0x0e 0x00 0xd0 , 11)
avrdude: Send: . [1b] H [48] . [00] . [05] . [0e] . [06] . [80] . [00] . [0e] . [00] . [d0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: H [48] 
0x48 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Y [59] 
0x59 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x49 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6d , 10)
avrdude: Send: . [1b] I [49] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] m [6d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: I [49] 
0x49 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8c] 
0x8c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8f] 
0x8f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8d] 
0x8d avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [00] 
0x00 avrdude: Recv: % [25] 
0x25 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,7424,256)
block_size at addr 7424 is 256
STK500V2: stk500v2_loadaddr(-2147479936)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x0e 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x4a 0x00 0x05 0x0e 0x06 0x80 0x00 0x0e 0x80 0x52 , 11)
avrdude: Send: . [1b] J [4a] . [00] . [05] . [0e] . [06] . [80] . [00] . [0e] . [80] R [52] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: J [4a] 
0x4a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: [ [5b] 
0x5b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6f , 10)
avrdude: Send: . [1b] K [4b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] o [6f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: K [4b] 
0x4b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8c] 
0x8c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: # [23] 
0x23 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [18] 
0x18 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [09] 
0x09 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8d] 
0x8d avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a6] 
0xa6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,7680,256)
block_size at addr 7680 is 256
STK500V2: stk500v2_loadaddr(-2147479808)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x0f 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x4c 0x00 0x05 0x0e 0x06 0x80 0x00 0x0f 0x00 0xd5 , 11)
avrdude: Send: . [1b] L [4c] . [00] . [05] . [0e] . [06] . [80] . [00] . [0f] . [00] . [d5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: L [4c] 
0x4c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ] [5d] 
0x5d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x69 , 10)
avrdude: Send: . [1b] M [4d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] i [69] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: M [4d] 
0x4d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8c] 
0x8c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: I [49] 
0x49 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,7936,256)
block_size at addr 7936 is 256
STK500V2: stk500v2_loadaddr(-2147479680)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x0f 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x4e 0x00 0x05 0x0e 0x06 0x80 0x00 0x0f 0x80 0x57 , 11)
avrdude: Send: . [1b] N [4e] . [00] . [05] . [0e] . [06] . [80] . [00] . [0f] . [80] W [57] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: N [4e] 
0x4e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: _ [5f] 
0x5f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6b , 10)
avrdude: Send: . [1b] O [4f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] k [6b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: O [4f] 
0x4f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [85] 
0x85 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [99] 
0x99 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [cf] 
0xcf avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: B [42] 
0x42 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: H [48] 
0x48 avrdude: Recv: e [65] 
0x65 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: m [6d] 
0x6d avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: w [77] 
0x77 avrdude: Recv: A [41] 
0x41 avrdude: Recv: R [52] 
0x52 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cb] 
0xcb 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,8192,256)
block_size at addr 8192 is 256
STK500V2: stk500v2_loadaddr(-2147479552)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x10 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x50 0x00 0x05 0x0e 0x06 0x80 0x00 0x10 0x00 0xd6 , 11)
avrdude: Send: . [1b] P [50] . [00] . [05] . [0e] . [06] . [80] . [00] . [10] . [00] . [d6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: P [50] 
0x50 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x51 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x75 , 10)
avrdude: Send: . [1b] Q [51] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] u [75] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Q [51] 
0x51 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [04] 
0x04 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: < [3c] 
0x3c avrdude: Recv: > [3e] 
0x3e avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: + [2b] 
0x2b avrdude: Recv: = [3d] 
0x3d avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: / [2f] 
0x2f avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: , [2c] 
0x2c avrdude: Recv: * [2a] 
0x2a avrdude: Recv: " [22] 
0x22 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [00] 
0x00 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: a [61] 
0x61 avrdude: Recv: r [72] 
0x72 avrdude: Recv: t [74] 
0x74 avrdude: Recv: a [61] 
0x61 avrdude: Recv:   [20] 
0x20 avrdude: Recv: u [75] 
0x75 avrdude: Recv: s [73] 
0x73 avrdude: Recv: u [75] 
0x75 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [99] 
0x99 avrdude: Recv: t [74] 
0x74 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [00] 
0x00 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: a [61] 
0x61 avrdude: Recv: r [72] 
0x72 avrdude: Recv: t [74] 
0x74 avrdude: Recv: a [61] 
0x61 avrdude: Recv:   [20] 
0x20 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: o [6f] 
0x6f avrdude: Recv: n [6e] 
0x6e avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [03] 
0x03 avrdude: Recv: ! [21] 
0x21 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a3] 
0xa3 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,8448,256)
block_size at addr 8448 is 256
STK500V2: stk500v2_loadaddr(-2147479424)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x10 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x52 0x00 0x05 0x0e 0x06 0x80 0x00 0x10 0x80 0x54 , 11)
avrdude: Send: . [1b] R [52] . [00] . [05] . [0e] . [06] . [80] . [00] . [10] . [80] T [54] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: R [52] 
0x52 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: C [43] 
0x43 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x53 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x77 , 10)
avrdude: Send: . [1b] S [53] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] w [77] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: S [53] 
0x53 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [90] 
0x90 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: @ [40] 
0x40 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: @ [40] 
0x40 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [08] 
0x08 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f3] 
0xf3 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,8704,256)
block_size at addr 8704 is 256
STK500V2: stk500v2_loadaddr(-2147479296)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x11 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x54 0x00 0x05 0x0e 0x06 0x80 0x00 0x11 0x00 0xd3 , 11)
avrdude: Send: . [1b] T [54] . [00] . [05] . [0e] . [06] . [80] . [00] . [11] . [00] . [d3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: T [54] 
0x54 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x55 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x71 , 10)
avrdude: Send: . [1b] U [55] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] q [71] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: U [55] 
0x55 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: @ [40] 
0x40 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: @ [40] 
0x40 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [08] 
0x08 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,8960,256)
block_size at addr 8960 is 256
STK500V2: stk500v2_loadaddr(-2147479168)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x11 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x56 0x00 0x05 0x0e 0x06 0x80 0x00 0x11 0x80 0x51 , 11)
avrdude: Send: . [1b] V [56] . [00] . [05] . [0e] . [06] . [80] . [00] . [11] . [80] Q [51] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: V [56] 
0x56 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: G [47] 
0x47 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x57 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x73 , 10)
avrdude: Send: . [1b] W [57] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] s [73] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: W [57] 
0x57 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [90] 
0x90 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: P [50] 
0x50 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: P [50] 
0x50 avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: P [50] 
0x50 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: @ [40] 
0x40 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [04] 
0x04 avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [08] 
0x08 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [88] 
0x88 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8b] 
0x8b 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,9216,256)
block_size at addr 9216 is 256
STK500V2: stk500v2_loadaddr(-2147479040)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x12 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x58 0x00 0x05 0x0e 0x06 0x80 0x00 0x12 0x00 0xdc , 11)
avrdude: Send: . [1b] X [58] . [00] . [05] . [0e] . [06] . [80] . [00] . [12] . [00] . [dc] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: X [58] 
0x58 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: I [49] 
0x49 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x59 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7d , 10)
avrdude: Send: . [1b] Y [59] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] } [7d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Y [59] 
0x59 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [08] 
0x08 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ff] 
0xff avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [98] 
0x98 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: P [50] 
0x50 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: P [50] 
0x50 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: G [47] 
0x47 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,9472,256)
block_size at addr 9472 is 256
STK500V2: stk500v2_loadaddr(-2147478912)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x12 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x5a 0x00 0x05 0x0e 0x06 0x80 0x00 0x12 0x80 0x5e , 11)
avrdude: Send: . [1b] Z [5a] . [00] . [05] . [0e] . [06] . [80] . [00] . [12] . [80] ^ [5e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Z [5a] 
0x5a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: K [4b] 
0x4b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7f , 10)
avrdude: Send: . [1b] [ [5b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [7f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: [ [5b] 
0x5b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [08] 
0x08 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [02] 
0x02 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [08] 
0x08 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [88] 
0x88 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [de] 
0xde 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,9728,256)
block_size at addr 9728 is 256
STK500V2: stk500v2_loadaddr(-2147478784)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x13 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x5c 0x00 0x05 0x0e 0x06 0x80 0x00 0x13 0x00 0xd9 , 11)
avrdude: Send: . [1b] \ [5c] . [00] . [05] . [0e] . [06] . [80] . [00] . [13] . [00] . [d9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: \ [5c] 
0x5c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x79 , 10)
avrdude: Send: . [1b] ] [5d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] y [79] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ] [5d] 
0x5d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: p [70] 
0x70 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: P [50] 
0x50 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: P [50] 
0x50 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: H [48] 
0x48 avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [90] 
0x90 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c3] 
0xc3 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,9984,256)
block_size at addr 9984 is 256
STK500V2: stk500v2_loadaddr(-2147478656)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x13 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x5e 0x00 0x05 0x0e 0x06 0x80 0x00 0x13 0x80 0x5b , 11)
avrdude: Send: . [1b] ^ [5e] . [00] . [05] . [0e] . [06] . [80] . [00] . [13] . [80] [ [5b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ^ [5e] 
0x5e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: O [4f] 
0x4f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7b , 10)
avrdude: Send: . [1b] _ [5f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] { [7b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: _ [5f] 
0x5f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [08] 
0x08 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [88] 
0x88 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [06] 
0x06 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [90] 
0x90 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [90] 
0x90 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [06] 
0x06 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [98] 
0x98 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [ff] 
0xff avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [98] 
0x98 avrdude: Recv:   [20] 
0x20 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f2] 
0xf2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,10240,256)
block_size at addr 10240 is 256
STK500V2: stk500v2_loadaddr(-2147478528)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x14 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x60 0x00 0x05 0x0e 0x06 0x80 0x00 0x14 0x00 0xe2 , 11)
avrdude: Send: . [1b] ` [60] . [00] . [05] . [0e] . [06] . [80] . [00] . [14] . [00] . [e2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ` [60] 
0x60 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: q [71] 
0x71 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x61 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x45 , 10)
avrdude: Send: . [1b] a [61] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] E [45] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: a [61] 
0x61 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv:   [20] 
0x20 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv:   [20] 
0x20 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: H [48] 
0x48 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: H [48] 
0x48 avrdude: Recv: H [48] 
0x48 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,10496,256)
block_size at addr 10496 is 256
STK500V2: stk500v2_loadaddr(-2147478400)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x14 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x62 0x00 0x05 0x0e 0x06 0x80 0x00 0x14 0x80 0x60 , 11)
avrdude: Send: . [1b] b [62] . [00] . [05] . [0e] . [06] . [80] . [00] . [14] . [80] ` [60] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: b [62] 
0x62 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: s [73] 
0x73 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x63 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x47 , 10)
avrdude: Send: . [1b] c [63] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] G [47] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: c [63] 
0x63 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv:   [20] 
0x20 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: P [50] 
0x50 avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: p [70] 
0x70 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [88] 
0x88 avrdude: Recv: P [50] 
0x50 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: p [70] 
0x70 avrdude: Recv: H [48] 
0x48 avrdude: Recv: H [48] 
0x48 avrdude: Recv: p [70] 
0x70 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ff] 
0xff avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [08] 
0x08 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [88] 
0x88 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [08] 
0x08 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [88] 
0x88 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [08] 
0x08 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [88] 
0x88 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [08] 
0x08 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [88] 
0x88 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [08] 
0x08 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [00] 
0x00 avrdude: Recv: > [3e] 
0x3e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,10752,256)
block_size at addr 10752 is 256
STK500V2: stk500v2_loadaddr(-2147478272)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x15 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x64 0x00 0x05 0x0e 0x06 0x80 0x00 0x15 0x00 0xe7 , 11)
avrdude: Send: . [1b] d [64] . [00] . [05] . [0e] . [06] . [80] . [00] . [15] . [00] . [e7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: d [64] 
0x64 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: u [75] 
0x75 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x65 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x41 , 10)
avrdude: Send: . [1b] e [65] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] A [41] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: e [65] 
0x65 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv:   [20] 
0x20 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [08] 
0x08 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [88] 
0x88 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv:   [20] 
0x20 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cb] 
0xcb 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,11008,256)
block_size at addr 11008 is 256
STK500V2: stk500v2_loadaddr(-2147478144)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x15 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x66 0x00 0x05 0x0e 0x06 0x80 0x00 0x15 0x80 0x65 , 11)
avrdude: Send: . [1b] f [66] . [00] . [05] . [0e] . [06] . [80] . [00] . [15] . [80] e [65] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: f [66] 
0x66 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: w [77] 
0x77 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x67 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x43 , 10)
avrdude: Send: . [1b] g [67] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] C [43] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: g [67] 
0x67 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: p [70] 
0x70 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [98] 
0x98 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [98] 
0x98 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [98] 
0x98 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [98] 
0x98 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [08] 
0x08 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: P [50] 
0x50 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [08] 
0x08 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [02] 
0x02 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: r [72] 
0x72 avrdude: Recv: y [79] 
0x79 avrdude: Recv: w [77] 
0x77 avrdude: Recv:   [20] 
0x20 avrdude: Recv: V [56] 
0x56 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: r [72] 
0x72 avrdude: Recv: y [79] 
0x79 avrdude: Recv: w [77] 
0x77 avrdude: Recv:   [20] 
0x20 avrdude: Recv: V [56] 
0x56 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: r [72] 
0x72 avrdude: Recv: y [79] 
0x79 avrdude: Recv: w [77] 
0x77 avrdude: Recv:   [20] 
0x20 avrdude: Recv: V [56] 
0x56 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: r [72] 
0x72 avrdude: Recv: y [79] 
0x79 avrdude: Recv: w [77] 
0x77 avrdude: Recv:   [20] 
0x20 avrdude: Recv: V [56] 
0x56 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: r [72] 
0x72 avrdude: Recv: y [79] 
0x79 avrdude: Recv: w [77] 
0x77 avrdude: Recv:   [20] 
0x20 avrdude: Recv: V [56] 
0x56 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: r [72] 
0x72 avrdude: Recv: y [79] 
0x79 avrdude: Recv: w [77] 
0x77 avrdude: Recv:   [20] 
0x20 avrdude: Recv: V [56] 
0x56 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: r [72] 
0x72 avrdude: Recv: y [79] 
0x79 avrdude: Recv: w [77] 
0x77 avrdude: Recv:   [20] 
0x20 avrdude: Recv: V [56] 
0x56 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: r [72] 
0x72 avrdude: Recv: y [79] 
0x79 avrdude: Recv: w [77] 
0x77 avrdude: Recv:   [20] 
0x20 avrdude: Recv: V [56] 
0x56 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: r [72] 
0x72 avrdude: Recv: y [79] 
0x79 avrdude: Recv: w [77] 
0x77 avrdude: Recv:   [20] 
0x20 avrdude: Recv: V [56] 
0x56 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: r [72] 
0x72 avrdude: Recv: y [79] 
0x79 avrdude: Recv: w [77] 
0x77 avrdude: Recv:   [20] 
0x20 avrdude: Recv: V [56] 
0x56 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: r [72] 
0x72 avrdude: Recv: y [79] 
0x79 avrdude: Recv: w [77] 
0x77 avrdude: Recv:   [20] 
0x20 avrdude: Recv: V [56] 
0x56 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: u [75] 
0x75 avrdude: Recv: c [63] 
0x63 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [00] 
0x00 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: r [72] 
0x72 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: k [6b] 
0x6b avrdude: Recv: i [69] 
0x69 avrdude: Recv: E [45] 
0x45 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [00] 
0x00 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: r [72] 
0x72 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: k [6b] 
0x6b avrdude: Recv: i [69] 
0x69 avrdude: Recv: E [45] 
0x45 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [00] 
0x00 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: r [72] 
0x72 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: k [6b] 
0x6b avrdude: Recv: i [69] 
0x69 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: / [2f] 
0x2f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [00] 
0x00 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: r [72] 
0x72 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: k [6b] 
0x6b avrdude: Recv: i [69] 
0x69 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: / [2f] 
0x2f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [00] 
0x00 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: r [72] 
0x72 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: k [6b] 
0x6b avrdude: Recv: i [69] 
0x69 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [00] 
0x00 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [00] 
0x00 avrdude: Recv: / [2f] 
0x2f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,11264,256)
block_size at addr 11264 is 256
STK500V2: stk500v2_loadaddr(-2147478016)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x16 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x68 0x00 0x05 0x0e 0x06 0x80 0x00 0x16 0x00 0xe8 , 11)
avrdude: Send: . [1b] h [68] . [00] . [05] . [0e] . [06] . [80] . [00] . [16] . [00] . [e8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: h [68] 
0x68 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: y [79] 
0x79 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x69 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4d , 10)
avrdude: Send: . [1b] i [69] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] M [4d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: i [69] 
0x69 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: r [72] 
0x72 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: k [6b] 
0x6b avrdude: Recv: i [69] 
0x69 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [00] 
0x00 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: r [72] 
0x72 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: k [6b] 
0x6b avrdude: Recv: i [69] 
0x69 avrdude: Recv: X [58] 
0x58 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [00] 
0x00 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: r [72] 
0x72 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: k [6b] 
0x6b avrdude: Recv: i [69] 
0x69 avrdude: Recv: X [58] 
0x58 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: u [75] 
0x75 avrdude: Recv: c [63] 
0x63 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [00] 
0x00 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: r [72] 
0x72 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: k [6b] 
0x6b avrdude: Recv: i [69] 
0x69 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: r [72] 
0x72 avrdude: Recv: y [79] 
0x79 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: r [72] 
0x72 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: p [70] 
0x70 avrdude: Recv: i [69] 
0x69 avrdude: Recv: e [65] 
0x65 avrdude: Recv: s [73] 
0x73 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: e [65] 
0x65 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: o [6f] 
0x6f avrdude: Recv: c [63] 
0x63 avrdude: Recv: i [69] 
0x69 avrdude: Recv: t [74] 
0x74 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [00] 
0x00 avrdude: Recv: U [55] 
0x55 avrdude: Recv: s [73] 
0x73 avrdude: Recv: t [74] 
0x74 avrdude: Recv: a [61] 
0x61 avrdude: Recv: w [77] 
0x77 avrdude: Recv: i [69] 
0x69 avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [2e] 
0x2e avrdude: Recv:   [20] 
0x20 avrdude: Recv: f [66] 
0x66 avrdude: Recv: i [69] 
0x69 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [2e] 
0x2e avrdude: Recv:   [20] 
0x20 avrdude: Recv: f [66] 
0x66 avrdude: Recv: i [69] 
0x69 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: W [57] 
0x57 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [2e] 
0x2e avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 avrdude: Recv:   [20] 
0x20 avrdude: Recv: w [77] 
0x77 avrdude: Recv:   [20] 
0x20 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: m [6d] 
0x6d avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [00] 
0x00 avrdude: Recv: U [55] 
0x55 avrdude: Recv: s [73] 
0x73 avrdude: Recv: t [74] 
0x74 avrdude: Recv: a [61] 
0x61 avrdude: Recv: w [77] 
0x77 avrdude: Recv: i [69] 
0x69 avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [00] 
0x00 avrdude: Recv: C [43] 
0x43 avrdude: Recv: a [61] 
0x61 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: n [6e] 
0x6e avrdude: Recv: o [6f] 
0x6f avrdude: Recv: t [74] 
0x74 avrdude: Recv:   [20] 
0x20 avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: t [74] 
0x74 avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv:   [20] 
0x20 avrdude: Recv: s [73] 
0x73 avrdude: Recv: u [75] 
0x75 avrdude: Recv: b [62] 
0x62 avrdude: Recv: d [64] 
0x64 avrdude: Recv: i [69] 
0x69 avrdude: Recv: r [72] 
0x72 avrdude: Recv: : [3a] 
0x3a avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: u [75] 
0x75 avrdude: Recv:   [20] 
0x20 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: w [77] 
0x77 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: r [72] 
0x72 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: y [79] 
0x79 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: r [72] 
0x72 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: y [79] 
0x79 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: r [72] 
0x72 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: y [79] 
0x79 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [00] 
0x00 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: b [62] 
0x62 avrdude: Recv: r [72] 
0x72 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: t [74] 
0x74 avrdude: Recv: y [79] 
0x79 avrdude: Recv:   [20] 
0x20 avrdude: Recv: w [77] 
0x77 avrdude: Recv: i [69] 
0x69 avrdude: Recv: a [61] 
0x61 avrdude: Recv: t [74] 
0x74 avrdude: Recv: r [72] 
0x72 avrdude: Recv: a [61] 
0x61 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [00] 
0x00 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: b [62] 
0x62 avrdude: Recv: r [72] 
0x72 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: t [74] 
0x74 avrdude: Recv: y [79] 
0x79 avrdude: Recv:   [20] 
0x20 avrdude: Recv: w [77] 
0x77 avrdude: Recv: i [69] 
0x69 avrdude: Recv: a [61] 
0x61 avrdude: Recv: t [74] 
0x74 avrdude: Recv: r [72] 
0x72 avrdude: Recv: a [61] 
0x61 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [00] 
0x00 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: b [62] 
0x62 avrdude: Recv: r [72] 
0x72 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: t [74] 
0x74 avrdude: Recv: y [79] 
0x79 avrdude: Recv:   [20] 
0x20 avrdude: Recv: w [77] 
0x77 avrdude: Recv: i [69] 
0x69 avrdude: Recv: a [61] 
0x61 avrdude: Recv: t [74] 
0x74 avrdude: Recv: r [72] 
0x72 avrdude: Recv: a [61] 
0x61 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [00] 
0x00 avrdude: Recv: S [53] 
0x53 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b2] 
0xb2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,11520,256)
block_size at addr 11520 is 256
STK500V2: stk500v2_loadaddr(-2147477888)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x16 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x6a 0x00 0x05 0x0e 0x06 0x80 0x00 0x16 0x80 0x6a , 11)
avrdude: Send: . [1b] j [6a] . [00] . [05] . [0e] . [06] . [80] . [00] . [16] . [80] j [6a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: j [6a] 
0x6a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: { [7b] 
0x7b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4f , 10)
avrdude: Send: . [1b] k [6b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] O [4f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: k [6b] 
0x6b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [00] 
0x00 avrdude: Recv: S [53] 
0x53 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [00] 
0x00 avrdude: Recv: S [53] 
0x53 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [00] 
0x00 avrdude: Recv: D [44] 
0x44 avrdude: Recv: y [79] 
0x79 avrdude: Recv: s [73] 
0x73 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [00] 
0x00 avrdude: Recv: D [44] 
0x44 avrdude: Recv: y [79] 
0x79 avrdude: Recv: s [73] 
0x73 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [00] 
0x00 avrdude: Recv: D [44] 
0x44 avrdude: Recv: y [79] 
0x79 avrdude: Recv: s [73] 
0x73 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: r [72] 
0x72 avrdude: Recv: e [65] 
0x65 avrdude: Recv: d [64] 
0x64 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: r [72] 
0x72 avrdude: Recv: e [65] 
0x65 avrdude: Recv: d [64] 
0x64 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: r [72] 
0x72 avrdude: Recv: e [65] 
0x65 avrdude: Recv: d [64] 
0x64 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: u [75] 
0x75 avrdude: Recv:   [20] 
0x20 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: w [77] 
0x77 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: z [7a] 
0x7a avrdude: Recv: g [67] 
0x67 avrdude: Recv: r [72] 
0x72 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: j [6a] 
0x6a avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: A [41] 
0x41 avrdude: Recv:   [20] 
0x20 avrdude: Recv: E [45] 
0x45 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: z [7a] 
0x7a avrdude: Recv: g [67] 
0x67 avrdude: Recv: r [72] 
0x72 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: j [6a] 
0x6a avrdude: Recv:   [20] 
0x20 avrdude: Recv: s [73] 
0x73 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [82] 
0x82 avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: z [7a] 
0x7a avrdude: Recv: g [67] 
0x67 avrdude: Recv: r [72] 
0x72 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: j [6a] 
0x6a avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: r [72] 
0x72 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: y [79] 
0x79 avrdude: Recv: g [67] 
0x67 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: t [74] 
0x74 avrdude: Recv: u [75] 
0x75 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: z [7a] 
0x7a avrdude: Recv: g [67] 
0x67 avrdude: Recv: r [72] 
0x72 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: j [6a] 
0x6a avrdude: Recv:   [20] 
0x20 avrdude: Recv: A [41] 
0x41 avrdude: Recv: B [42] 
0x42 avrdude: Recv: S [53] 
0x53 avrdude: Recv:   [20] 
0x20 avrdude: Recv: E [45] 
0x45 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: z [7a] 
0x7a avrdude: Recv: g [67] 
0x67 avrdude: Recv: r [72] 
0x72 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: j [6a] 
0x6a avrdude: Recv:   [20] 
0x20 avrdude: Recv: s [73] 
0x73 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [82] 
0x82 avrdude: Recv:   [20] 
0x20 avrdude: Recv: A [41] 
0x41 avrdude: Recv: B [42] 
0x42 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: z [7a] 
0x7a avrdude: Recv: g [67] 
0x67 avrdude: Recv: r [72] 
0x72 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: j [6a] 
0x6a avrdude: Recv:   [20] 
0x20 avrdude: Recv: A [41] 
0x41 avrdude: Recv: B [42] 
0x42 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: r [72] 
0x72 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: y [79] 
0x79 avrdude: Recv: g [67] 
0x67 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: t [74] 
0x74 avrdude: Recv: u [75] 
0x75 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: z [7a] 
0x7a avrdude: Recv: g [67] 
0x67 avrdude: Recv: r [72] 
0x72 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: j [6a] 
0x6a avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [00] 
0x00 avrdude: Recv: C [43] 
0x43 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: d [64] 
0x64 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: z [7a] 
0x7a avrdude: Recv: g [67] 
0x67 avrdude: Recv: r [72] 
0x72 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: j [6a] 
0x6a avrdude: Recv:   [20] 
0x20 avrdude: Recv: A [41] 
0x41 avrdude: Recv: B [42] 
0x42 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [00] 
0x00 avrdude: Recv: W [57] 
0x57 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [85] 
0x85 avrdude: Recv: c [63] 
0x63 avrdude: Recv: z [7a] 
0x7a avrdude: Recv:   [20] 
0x20 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c7] 
0xc7 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,11776,256)
block_size at addr 11776 is 256
STK500V2: stk500v2_loadaddr(-2147477760)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x17 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x6c 0x00 0x05 0x0e 0x06 0x80 0x00 0x17 0x00 0xed , 11)
avrdude: Send: . [1b] l [6c] . [00] . [05] . [0e] . [06] . [80] . [00] . [17] . [00] . [ed] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: l [6c] 
0x6c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: } [7d] 
0x7d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x49 , 10)
avrdude: Send: . [1b] m [6d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] I [49] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: m [6d] 
0x6d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: i [69] 
0x69 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [00] 
0x00 avrdude: Recv: U [55] 
0x55 avrdude: Recv: s [73] 
0x73 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [2e] 
0x2e avrdude: Recv:   [20] 
0x20 avrdude: Recv: p [70] 
0x70 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [2e] 
0x2e avrdude: Recv:   [20] 
0x20 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv: u [75] 
0x75 avrdude: Recv: j [6a] 
0x6a avrdude: Recv:   [20] 
0x20 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [00] 
0x00 avrdude: Recv: G [47] 
0x47 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv: u [75] 
0x75 avrdude: Recv: j [6a] 
0x6a avrdude: Recv:   [20] 
0x20 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [00] 
0x00 avrdude: Recv: G [47] 
0x47 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv: u [75] 
0x75 avrdude: Recv: j [6a] 
0x6a avrdude: Recv:   [20] 
0x20 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [00] 
0x00 avrdude: Recv: G [47] 
0x47 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv:   [20] 
0x20 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: z [7a] 
0x7a avrdude: Recv: y [79] 
0x79 avrdude: Recv: c [63] 
0x63 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: a [61] 
0x61 avrdude: Recv:   [20] 
0x20 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: w [77] 
0x77 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [00] 
0x00 avrdude: Recv: G [47] 
0x47 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: u [75] 
0x75 avrdude: Recv: c [63] 
0x63 avrdude: Recv: h [68] 
0x68 avrdude: Recv:   [20] 
0x20 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: s [73] 
0x73 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: u [75] 
0x75 avrdude: Recv:   [20] 
0x20 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: w [77] 
0x77 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: r [72] 
0x72 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: s [73] 
0x73 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [84] 
0x84 avrdude: Recv:   [20] 
0x20 avrdude: Recv: w [77] 
0x77 avrdude: Recv:   [20] 
0x20 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: r [72] 
0x72 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: s [73] 
0x73 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [84] 
0x84 avrdude: Recv:   [20] 
0x20 avrdude: Recv: w [77] 
0x77 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: r [72] 
0x72 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: s [73] 
0x73 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [84] 
0x84 avrdude: Recv:   [20] 
0x20 avrdude: Recv: w [77] 
0x77 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: s [73] 
0x73 avrdude: Recv: t [74] 
0x74 avrdude: Recv: r [72] 
0x72 avrdude: Recv: u [75] 
0x75 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: j [6a] 
0x6a avrdude: Recv: a [61] 
0x61 avrdude: Recv:   [20] 
0x20 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: s [73] 
0x73 avrdude: Recv:   [20] 
0x20 avrdude: Recv: E [45] 
0x45 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [14] 
0x14 avrdude: Recv: C [43] 
0x43 avrdude: Recv:   [20] 
0x20 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: m [6d] 
0x6d avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: I [49] 
0x49 avrdude: Recv: D [44] 
0x44 avrdude: Recv:   [20] 
0x20 avrdude: Recv: s [73] 
0x73 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c3] 
0xc3 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,12032,256)
block_size at addr 12032 is 256
STK500V2: stk500v2_loadaddr(-2147477632)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x17 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x6e 0x00 0x05 0x0e 0x06 0x80 0x00 0x17 0x80 0x6f , 11)
avrdude: Send: . [1b] n [6e] . [00] . [05] . [0e] . [06] . [80] . [00] . [17] . [80] o [6f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: n [6e] 
0x6e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [7f] 
0x7f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4b , 10)
avrdude: Send: . [1b] o [6f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] K [4b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: o [6f] 
0x6f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: t [74] 
0x74 avrdude: Recv: t [74] 
0x74 avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: g [67] 
0x67 avrdude: Recv: s [73] 
0x73 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv:   [20] 
0x20 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: a [61] 
0x61 avrdude: Recv: t [74] 
0x74 avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv: i [69] 
0x69 avrdude: Recv: a [61] 
0x61 avrdude: Recv: l [6c] 
0x6c avrdude: Recv:   [20] 
0x20 avrdude: Recv: h [68] 
0x68 avrdude: Recv: e [65] 
0x65 avrdude: Recv: a [61] 
0x61 avrdude: Recv: t [74] 
0x74 avrdude: Recv: u [75] 
0x75 avrdude: Recv: p [70] 
0x70 avrdude: Recv:   [20] 
0x20 avrdude: Recv: p [70] 
0x70 avrdude: Recv: a [61] 
0x61 avrdude: Recv: r [72] 
0x72 avrdude: Recv: a [61] 
0x61 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: e [65] 
0x65 avrdude: Recv: t [74] 
0x74 avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv: s [73] 
0x73 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv:   [20] 
0x20 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: e [65] 
0x65 avrdude: Recv:   [20] 
0x20 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: f [66] 
0x66 avrdude: Recv: f [66] 
0x66 avrdude: Recv: s [73] 
0x73 avrdude: Recv: e [65] 
0x65 avrdude: Recv: t [74] 
0x74 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: E [45] 
0x45 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: e [65] 
0x65 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: j [6a] 
0x6a avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: X [58] 
0x58 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: x [78] 
0x78 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: j [6a] 
0x6a avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: > [3e] 
0x3e avrdude: Recv:   [20] 
0x20 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: y [79] 
0x79 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: j [6a] 
0x6a avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: > [3e] 
0x3e avrdude: Recv:   [20] 
0x20 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: < [3c] 
0x3c avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: z [7a] 
0x7a avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: j [6a] 
0x6a avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 avrdude: Recv: d [64] 
0x64 avrdude: Recv: v [76] 
0x76 avrdude: Recv: a [61] 
0x61 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: c [63] 
0x63 avrdude: Recv: e [65] 
0x65 avrdude: Recv: d [64] 
0x64 avrdude: Recv: : [3a] 
0x3a avrdude: Recv:   [20] 
0x20 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: m [6d] 
0x6d avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: s [73] 
0x73 avrdude: Recv: e [65] 
0x65 avrdude: Recv: g [67] 
0x67 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: t [74] 
0x74 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: t [74] 
0x74 avrdude: Recv: i [69] 
0x69 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: e [65] 
0x65 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: u [75] 
0x75 avrdude: Recv: s [73] 
0x73 avrdude: Recv: > [3e] 
0x3e avrdude: Recv:   [20] 
0x20 avrdude: Recv: S [53] 
0x53 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: m [6d] 
0x6d avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: f [66] 
0x66 avrdude: Recv: e [65] 
0x65 avrdude: Recv: e [65] 
0x65 avrdude: Recv: d [64] 
0x64 avrdude: Recv: r [72] 
0x72 avrdude: Recv: a [61] 
0x61 avrdude: Recv: t [74] 
0x74 avrdude: Recv: e [65] 
0x65 avrdude: Recv: > [3e] 
0x3e avrdude: Recv:   [20] 
0x20 avrdude: Recv: T [54] 
0x54 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: m [6d] 
0x6d avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: t [74] 
0x74 avrdude: Recv: r [72] 
0x72 avrdude: Recv: a [61] 
0x61 avrdude: Recv: v [76] 
0x76 avrdude: Recv: e [65] 
0x65 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: f [66] 
0x66 avrdude: Recv: e [65] 
0x65 avrdude: Recv: e [65] 
0x65 avrdude: Recv: d [64] 
0x64 avrdude: Recv: r [72] 
0x72 avrdude: Recv: a [61] 
0x61 avrdude: Recv: t [74] 
0x74 avrdude: Recv: e [65] 
0x65 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: l [6c] 
0x6c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,12288,256)
block_size at addr 12288 is 256
STK500V2: stk500v2_loadaddr(-2147477504)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x18 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x70 0x00 0x05 0x0e 0x06 0x80 0x00 0x18 0x00 0xfe , 11)
avrdude: Send: . [1b] p [70] . [00] . [05] . [0e] . [06] . [80] . [00] . [18] . [00] . [fe] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: p [70] 
0x70 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: a [61] 
0x61 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x71 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x55 , 10)
avrdude: Send: . [1b] q [71] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] U [55] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: q [71] 
0x71 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 avrdude: Recv: c [63] 
0x63 avrdude: Recv: c [63] 
0x63 avrdude: Recv: e [65] 
0x65 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv: a [61] 
0x61 avrdude: Recv: t [74] 
0x74 avrdude: Recv: i [69] 
0x69 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: n [6e] 
0x6e avrdude: Recv:   [20] 
0x20 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: u [75] 
0x75 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: t [74] 
0x74 avrdude: Recv: s [73] 
0x73 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: s [73] 
0x73 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: : [3a] 
0x3a avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: p [70] 
0x70 avrdude: Recv: r [72] 
0x72 avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: t [74] 
0x74 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: a [61] 
0x61 avrdude: Recv: c [63] 
0x63 avrdude: Recv: c [63] 
0x63 avrdude: Recv: e [65] 
0x65 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: > [3e] 
0x3e avrdude: Recv:   [20] 
0x20 avrdude: Recv: R [52] 
0x52 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: r [72] 
0x72 avrdude: Recv: e [65] 
0x65 avrdude: Recv: t [74] 
0x74 avrdude: Recv: r [72] 
0x72 avrdude: Recv: a [61] 
0x61 avrdude: Recv: c [63] 
0x63 avrdude: Recv: t [74] 
0x74 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: a [61] 
0x61 avrdude: Recv: c [63] 
0x63 avrdude: Recv: c [63] 
0x63 avrdude: Recv: e [65] 
0x65 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: > [3e] 
0x3e avrdude: Recv:   [20] 
0x20 avrdude: Recv: T [54] 
0x54 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: t [74] 
0x74 avrdude: Recv: r [72] 
0x72 avrdude: Recv: a [61] 
0x61 avrdude: Recv: v [76] 
0x76 avrdude: Recv: e [65] 
0x65 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: a [61] 
0x61 avrdude: Recv: c [63] 
0x63 avrdude: Recv: c [63] 
0x63 avrdude: Recv: e [65] 
0x65 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv:   [20] 
0x20 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv: i [69] 
0x69 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: u [75] 
0x75 avrdude: Recv: m [6d] 
0x6d avrdude: Recv:   [20] 
0x20 avrdude: Recv: A [41] 
0x41 avrdude: Recv: c [63] 
0x63 avrdude: Recv: c [63] 
0x63 avrdude: Recv: e [65] 
0x65 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv: a [61] 
0x61 avrdude: Recv: t [74] 
0x74 avrdude: Recv: i [69] 
0x69 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: n [6e] 
0x6e avrdude: Recv:   [20] 
0x20 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: u [75] 
0x75 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: t [74] 
0x74 avrdude: Recv: s [73] 
0x73 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: s [73] 
0x73 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv:   [20] 
0x20 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv: i [69] 
0x69 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: u [75] 
0x75 avrdude: Recv: m [6d] 
0x6d avrdude: Recv:   [20] 
0x20 avrdude: Recv: f [66] 
0x66 avrdude: Recv: e [65] 
0x65 avrdude: Recv: e [65] 
0x65 avrdude: Recv: d [64] 
0x64 avrdude: Recv: r [72] 
0x72 avrdude: Recv: a [61] 
0x61 avrdude: Recv: t [74] 
0x74 avrdude: Recv: e [65] 
0x65 avrdude: Recv: s [73] 
0x73 avrdude: Recv:   [20] 
0x20 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: u [75] 
0x75 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: t [74] 
0x74 avrdude: Recv: s [73] 
0x73 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: s [73] 
0x73 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv:   [20] 
0x20 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [00] 
0x00 avrdude: Recv: S [53] 
0x53 avrdude: Recv: t [74] 
0x74 avrdude: Recv: e [65] 
0x65 avrdude: Recv: p [70] 
0x70 avrdude: Recv: s [73] 
0x73 avrdude: Recv:   [20] 
0x20 avrdude: Recv: p [70] 
0x70 avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv:   [20] 
0x20 avrdude: Recv: u [75] 
0x75 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: t [74] 
0x74 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv:   [20] 
0x20 avrdude: Recv: D [44] 
0x44 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv:   [20] 
0x20 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: D [44] 
0x44 avrdude: Recv: i [69] 
0x69 avrdude: Recv: s [73] 
0x73 avrdude: Recv: a [61] 
0x61 avrdude: Recv: b [62] 
0x62 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: e [65] 
0x65 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: F [46] 
0x46 avrdude: Recv: i [69] 
0x69 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: a [61] 
0x61 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: t [74] 
0x74 avrdude: Recv:   [20] 
0x20 avrdude: Recv: s [73] 
0x73 avrdude: Recv: e [65] 
0x65 avrdude: Recv: t [74] 
0x74 avrdude: Recv: t [74] 
0x74 avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [00] 
0x00 avrdude: Recv: x [78] 
0x78 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,12544,256)
block_size at addr 12544 is 256
STK500V2: stk500v2_loadaddr(-2147477376)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x18 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x72 0x00 0x05 0x0e 0x06 0x80 0x00 0x18 0x80 0x7c , 11)
avrdude: Send: . [1b] r [72] . [00] . [05] . [0e] . [06] . [80] . [00] . [18] . [80] | [7c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: r [72] 
0x72 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: c [63] 
0x63 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x73 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x57 , 10)
avrdude: Send: . [1b] s [73] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] W [57] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: s [73] 
0x73 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: s [73] 
0x73 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv:   [20] 
0x20 avrdude: Recv: C [43] 
0x43 avrdude: Recv:   [20] 
0x20 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv:   [20] 
0x20 avrdude: Recv: U [55] 
0x55 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: t [74] 
0x74 avrdude: Recv: s [73] 
0x73 avrdude: Recv:   [20] 
0x20 avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv:   [20] 
0x20 avrdude: Recv: C [43] 
0x43 avrdude: Recv: e [65] 
0x65 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: s [73] 
0x73 avrdude: Recv: i [69] 
0x69 avrdude: Recv: u [75] 
0x75 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: G [47] 
0x47 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [98] 
0x98 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv:   [20] 
0x20 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fe] 
0xfe avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: p [70] 
0x70 avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv:   [20] 
0x20 avrdude: Recv: f [66] 
0x66 avrdude: Recv: a [61] 
0x61 avrdude: Recv: i [69] 
0x69 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: e [65] 
0x65 avrdude: Recv: d [64] 
0x64 avrdude: Recv: , [2c] 
0x2c avrdude: Recv:   [20] 
0x20 avrdude: Recv: F [46] 
0x46 avrdude: Recv: i [69] 
0x69 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: e [65] 
0x65 avrdude: Recv: : [3a] 
0x3a avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: C [43] 
0x43 avrdude: Recv: a [61] 
0x61 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: n [6e] 
0x6e avrdude: Recv: o [6f] 
0x6f avrdude: Recv: t [74] 
0x74 avrdude: Recv:   [20] 
0x20 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: p [70] 
0x70 avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv:   [20] 
0x20 avrdude: Recv: s [73] 
0x73 avrdude: Recv: u [75] 
0x75 avrdude: Recv: b [62] 
0x62 avrdude: Recv: d [64] 
0x64 avrdude: Recv: i [69] 
0x69 avrdude: Recv: r [72] 
0x72 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: e [65] 
0x65 avrdude: Recv: c [63] 
0x63 avrdude: Recv: h [68] 
0x68 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [00] 
0x00 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [00] 
0x00 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [00] 
0x00 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [00] 
0x00 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: | [7c] 
0x7c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,12800,256)
block_size at addr 12800 is 256
STK500V2: stk500v2_loadaddr(-2147477248)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x19 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x74 0x00 0x05 0x0e 0x06 0x80 0x00 0x19 0x00 0xfb , 11)
avrdude: Send: . [1b] t [74] . [00] . [05] . [0e] . [06] . [80] . [00] . [19] . [00] . [fb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: t [74] 
0x74 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: e [65] 
0x65 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x75 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x51 , 10)
avrdude: Send: . [1b] u [75] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] Q [51] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: u [75] 
0x75 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [00] 
0x00 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [00] 
0x00 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [00] 
0x00 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [00] 
0x00 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [00] 
0x00 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [00] 
0x00 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: @ [40] 
0x40 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: @ [40] 
0x40 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [99] 
0x99 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,13056,256)
block_size at addr 13056 is 256
STK500V2: stk500v2_loadaddr(-2147477120)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x19 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x76 0x00 0x05 0x0e 0x06 0x80 0x00 0x19 0x80 0x79 , 11)
avrdude: Send: . [1b] v [76] . [00] . [05] . [0e] . [06] . [80] . [00] . [19] . [80] y [79] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: v [76] 
0x76 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: g [67] 
0x67 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x77 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x53 , 10)
avrdude: Send: . [1b] w [77] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] S [53] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: w [77] 
0x77 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: S [53] 
0x53 avrdude: Recv: D [44] 
0x44 avrdude: Recv:   [20] 
0x20 avrdude: Recv: c [63] 
0x63 avrdude: Recv: a [61] 
0x61 avrdude: Recv: r [72] 
0x72 avrdude: Recv: d [64] 
0x64 avrdude: Recv:   [20] 
0x20 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: p [70] 
0x70 avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: R [52] 
0x52 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: o [6f] 
0x6f avrdude: Recv: t [74] 
0x74 avrdude: Recv:   [20] 
0x20 avrdude: Recv: f [66] 
0x66 avrdude: Recv: a [61] 
0x61 avrdude: Recv: i [69] 
0x69 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: e [65] 
0x65 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: v [76] 
0x76 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: l [6c] 
0x6c avrdude: Recv: u [75] 
0x75 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: t [74] 
0x74 avrdude: Recv:   [20] 
0x20 avrdude: Recv: f [66] 
0x66 avrdude: Recv: a [61] 
0x61 avrdude: Recv: i [69] 
0x69 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: e [65] 
0x65 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: S [53] 
0x53 avrdude: Recv: D [44] 
0x44 avrdude: Recv:   [20] 
0x20 avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: t [74] 
0x74 avrdude: Recv:   [20] 
0x20 avrdude: Recv: f [66] 
0x66 avrdude: Recv: a [61] 
0x61 avrdude: Recv: i [69] 
0x69 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: W [57] 
0x57 avrdude: Recv: r [72] 
0x72 avrdude: Recv: i [69] 
0x69 avrdude: Recv: t [74] 
0x74 avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: g [67] 
0x67 avrdude: Recv:   [20] 
0x20 avrdude: Recv: t [74] 
0x74 avrdude: Recv: o [6f] 
0x6f avrdude: Recv:   [20] 
0x20 avrdude: Recv: f [66] 
0x66 avrdude: Recv: i [69] 
0x69 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: e [65] 
0x65 avrdude: Recv: : [3a] 
0x3a avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: p [70] 
0x70 avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv:   [20] 
0x20 avrdude: Recv: f [66] 
0x66 avrdude: Recv: a [61] 
0x61 avrdude: Recv: i [69] 
0x69 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: e [65] 
0x65 avrdude: Recv: d [64] 
0x64 avrdude: Recv: , [2c] 
0x2c avrdude: Recv:   [20] 
0x20 avrdude: Recv: F [46] 
0x46 avrdude: Recv: i [69] 
0x69 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: e [65] 
0x65 avrdude: Recv: : [3a] 
0x3a avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: p [70] 
0x70 avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv:   [20] 
0x20 avrdude: Recv: f [66] 
0x66 avrdude: Recv: a [61] 
0x61 avrdude: Recv: i [69] 
0x69 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: e [65] 
0x65 avrdude: Recv: d [64] 
0x64 avrdude: Recv: , [2c] 
0x2c avrdude: Recv:   [20] 
0x20 avrdude: Recv: F [46] 
0x46 avrdude: Recv: i [69] 
0x69 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: e [65] 
0x65 avrdude: Recv: : [3a] 
0x3a avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: F [46] 
0x46 avrdude: Recv: i [69] 
0x69 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: e [65] 
0x65 avrdude: Recv:   [20] 
0x20 avrdude: Recv: s [73] 
0x73 avrdude: Recv: e [65] 
0x65 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: e [65] 
0x65 avrdude: Recv: c [63] 
0x63 avrdude: Recv: t [74] 
0x74 avrdude: Recv: e [65] 
0x65 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: S [53] 
0x53 avrdude: Recv: i [69] 
0x69 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: : [3a] 
0x3a avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: F [46] 
0x46 avrdude: Recv: i [69] 
0x69 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: e [65] 
0x65 avrdude: Recv:   [20] 
0x20 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: p [70] 
0x70 avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: e [65] 
0x65 avrdude: Recv: d [64] 
0x64 avrdude: Recv: : [3a] 
0x3a avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: f [66] 
0x66 avrdude: Recv: i [69] 
0x69 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: e [65] 
0x65 avrdude: Recv: : [3a] 
0x3a avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [00] 
0x00 avrdude: Recv: f [66] 
0x66 avrdude: Recv: r [72] 
0x72 avrdude: Recv: e [65] 
0x65 avrdude: Recv: s [73] 
0x73 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [00] 
0x00 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: o [6f] 
0x6f avrdude: Recv: w [77] 
0x77 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: D [44] 
0x44 avrdude: Recv:   [20] 
0x20 avrdude: Recv: S [53] 
0x53 avrdude: Recv: U [55] 
0x55 avrdude: Recv: B [42] 
0x42 avrdude: Recv: R [52] 
0x52 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: U [55] 
0x55 avrdude: Recv: T [54] 
0x54 avrdude: Recv: I [49] 
0x49 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: " [22] 
0x22 avrdude: Recv:   [20] 
0x20 avrdude: Recv: p [70] 
0x70 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [00] 
0x00 avrdude: Recv: " [22] 
0x22 avrdude: Recv:   [20] 
0x20 avrdude: Recv: p [70] 
0x70 avrdude: Recv: a [61] 
0x61 avrdude: Recv: r [72] 
0x72 avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: t [74] 
0x74 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [00] 
0x00 avrdude: Recv: S [53] 
0x53 avrdude: Recv: U [55] 
0x55 avrdude: Recv: B [42] 
0x42 avrdude: Recv: R [52] 
0x52 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: U [55] 
0x55 avrdude: Recv: T [54] 
0x54 avrdude: Recv: I [49] 
0x49 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: E [45] 
0x45 avrdude: Recv:   [20] 
0x20 avrdude: Recv: C [43] 
0x43 avrdude: Recv: A [41] 
0x41 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: L [4c] 
0x4c avrdude: Recv:   [20] 
0x20 avrdude: Recv: t [74] 
0x74 avrdude: Recv: a [61] 
0x61 avrdude: Recv: r [72] 
0x72 avrdude: Recv: g [67] 
0x67 avrdude: Recv: e [65] 
0x65 avrdude: Recv: t [74] 
0x74 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [00] 
0x00 avrdude: Recv: U [55] 
0x55 avrdude: Recv: b [62] 
0x62 avrdude: Recv: i [69] 
0x69 avrdude: Recv: t [74] 
0x74 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [2e] 
0x2e avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: t [74] 
0x74 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ( [28] 
0x28 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,13312,256)
block_size at addr 13312 is 256
STK500V2: stk500v2_loadaddr(-2147476992)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x1a 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x78 0x00 0x05 0x0e 0x06 0x80 0x00 0x1a 0x00 0xf4 , 11)
avrdude: Send: . [1b] x [78] . [00] . [05] . [0e] . [06] . [80] . [00] . [1a] . [00] . [f4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: x [78] 
0x78 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: i [69] 
0x69 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x79 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5d , 10)
avrdude: Send: . [1b] y [79] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ] [5d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: y [79] 
0x79 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: y [79] 
0x79 avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: g [67] 
0x67 avrdude: Recv:   [20] 
0x20 avrdude: Recv: t [74] 
0x74 avrdude: Recv: o [6f] 
0x6f avrdude: Recv:   [20] 
0x20 avrdude: Recv: c [63] 
0x63 avrdude: Recv: a [61] 
0x61 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: l [6c] 
0x6c avrdude: Recv:   [20] 
0x20 avrdude: Recv: s [73] 
0x73 avrdude: Recv: u [75] 
0x75 avrdude: Recv: b [62] 
0x62 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: g [67] 
0x67 avrdude: Recv: c [63] 
0x63 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: d [64] 
0x64 avrdude: Recv: e [65] 
0x65 avrdude: Recv:   [20] 
0x20 avrdude: Recv: f [66] 
0x66 avrdude: Recv: i [69] 
0x69 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: e [65] 
0x65 avrdude: Recv: s [73] 
0x73 avrdude: Recv:   [20] 
0x20 avrdude: Recv: w [77] 
0x77 avrdude: Recv: i [69] 
0x69 avrdude: Recv: t [74] 
0x74 avrdude: Recv: h [68] 
0x68 avrdude: Recv:   [20] 
0x20 avrdude: Recv: t [74] 
0x74 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: o [6f] 
0x6f avrdude: Recv:   [20] 
0x20 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: y [79] 
0x79 avrdude: Recv:   [20] 
0x20 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: e [65] 
0x65 avrdude: Recv: v [76] 
0x76 avrdude: Recv: e [65] 
0x65 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [2e] 
0x2e avrdude: Recv:   [20] 
0x20 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: A [41] 
0x41 avrdude: Recv: X [58] 
0x58 avrdude: Recv:   [20] 
0x20 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: e [65] 
0x65 avrdude: Recv: v [76] 
0x76 avrdude: Recv: e [65] 
0x65 avrdude: Recv: l [6c] 
0x6c avrdude: Recv:   [20] 
0x20 avrdude: Recv: i [69] 
0x69 avrdude: Recv: s [73] 
0x73 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 avrdude: Recv: r [72] 
0x72 avrdude: Recv: r [72] 
0x72 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: r [72] 
0x72 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: s [73] 
0x73 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: o [6f] 
0x6f avrdude: Recv: k [6b] 
0x6b avrdude: Recv:   [20] 
0x20 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: s [73] 
0x73 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: o [6f] 
0x6f avrdude: Recv: k [6b] 
0x6b avrdude: Recv:   [20] 
0x20 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: s [73] 
0x73 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: o [6f] 
0x6f avrdude: Recv: k [6b] 
0x6b avrdude: Recv:   [20] 
0x20 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv:   [20] 
0x20 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv:   [20] 
0x20 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv:   [20] 
0x20 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv:   [20] 
0x20 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv:   [20] 
0x20 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv:   [20] 
0x20 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: u [75] 
0x75 avrdude: Recv: c [63] 
0x63 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,13568,256)
block_size at addr 13568 is 256
STK500V2: stk500v2_loadaddr(-2147476864)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x1a 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x7a 0x00 0x05 0x0e 0x06 0x80 0x00 0x1a 0x80 0x76 , 11)
avrdude: Send: . [1b] z [7a] . [00] . [05] . [0e] . [06] . [80] . [00] . [1a] . [80] v [76] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: z [7a] 
0x7a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: k [6b] 
0x6b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5f , 10)
avrdude: Send: . [1b] { [7b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] _ [5f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: { [7b] 
0x7b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: r [72] 
0x72 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: s [73] 
0x73 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: p [70] 
0x70 avrdude: Recv: r [72] 
0x72 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: s [73] 
0x73 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: w [77] 
0x77 avrdude: Recv: y [79] 
0x79 avrdude: Recv: c [63] 
0x63 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: f [66] 
0x66 avrdude: Recv: a [61] 
0x61 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: w [77] 
0x77 avrdude: Recv: y [79] 
0x79 avrdude: Recv: c [63] 
0x63 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: f [66] 
0x66 avrdude: Recv: a [61] 
0x61 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: r [72] 
0x72 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: p [70] 
0x70 avrdude: Recv: i [69] 
0x69 avrdude: Recv: e [65] 
0x65 avrdude: Recv: s [73] 
0x73 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: r [72] 
0x72 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: p [70] 
0x70 avrdude: Recv: i [69] 
0x69 avrdude: Recv: e [65] 
0x65 avrdude: Recv: s [73] 
0x73 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: u [75] 
0x75 avrdude: Recv: c [63] 
0x63 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [00] 
0x00 avrdude: Recv: T [54] 
0x54 avrdude: Recv: R [52] 
0x52 avrdude: Recv: I [49] 
0x49 avrdude: Recv: G [47] 
0x47 avrdude: Recv: G [47] 
0x47 avrdude: Recv: E [45] 
0x45 avrdude: Recv: R [52] 
0x52 avrdude: Recv: E [45] 
0x45 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [00] 
0x00 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: p [70] 
0x70 avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: : [3a] 
0x3a avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: y [79] 
0x79 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [00] 
0x00 avrdude: Recv: y [79] 
0x79 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: x [78] 
0x78 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [00] 
0x00 avrdude: Recv: x [78] 
0x78 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: e [65] 
0x65 avrdude: Recv: p [70] 
0x70 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: r [72] 
0x72 avrdude: Recv: t [74] 
0x74 avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: g [67] 
0x67 avrdude: Recv:   [20] 
0x20 avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: d [64] 
0x64 avrdude: Recv: s [73] 
0x73 avrdude: Recv: t [74] 
0x74 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: p [70] 
0x70 avrdude: Recv:   [20] 
0x20 avrdude: Recv: s [73] 
0x73 avrdude: Recv: t [74] 
0x74 avrdude: Recv: a [61] 
0x61 avrdude: Recv: t [74] 
0x74 avrdude: Recv: u [75] 
0x75 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [da] 
0xda avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [80] 
0x80 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,13824,256)
block_size at addr 13824 is 256
STK500V2: stk500v2_loadaddr(-2147476736)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x1b 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x7c 0x00 0x05 0x0e 0x06 0x80 0x00 0x1b 0x00 0xf1 , 11)
avrdude: Send: . [1b] | [7c] . [00] . [05] . [0e] . [06] . [80] . [00] . [1b] . [00] . [f1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: | [7c] 
0x7c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: m [6d] 
0x6d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x59 , 10)
avrdude: Send: . [1b] } [7d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] Y [59] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: } [7d] 
0x7d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8d] 
0x8d avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [87] 
0x87 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [90] 
0x90 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [0b] 
0x0b avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [90] 
0x90 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [0b] 
0x0b avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [16] 
0x16 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [02] 
0x02 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [16] 
0x16 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [04] 
0x04 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [16] 
0x16 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [16] 
0x16 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [16] 
0x16 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [16] 
0x16 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 9 [39] 
0x39 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,14080,256)
block_size at addr 14080 is 256
STK500V2: stk500v2_loadaddr(-2147476608)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x1b 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x7e 0x00 0x05 0x0e 0x06 0x80 0x00 0x1b 0x80 0x73 , 11)
avrdude: Send: . [1b] ~ [7e] . [00] . [05] . [0e] . [06] . [80] . [00] . [1b] . [80] s [73] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ~ [7e] 
0x7e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: o [6f] 
0x6f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5b , 10)
avrdude: Send: . [1b] . [7f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] [ [5b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [7f] 
0x7f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [03] 
0x03 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [03] 
0x03 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [ab] 
0xab avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [af] 
0xaf avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [af] 
0xaf avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [af] 
0xaf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [af] 
0xaf avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [ad] 
0xad avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [ad] 
0xad avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [ad] 
0xad avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [ad] 
0xad avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [16] 
0x16 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [17] 
0x17 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [eb] 
0xeb avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [af] 
0xaf avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [af] 
0xaf avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [af] 
0xaf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [af] 
0xaf avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [af] 
0xaf avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [97] 
0x97 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [ad] 
0xad avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [af] 
0xaf avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [17] 
0x17 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,14336,256)
block_size at addr 14336 is 256
STK500V2: stk500v2_loadaddr(-2147476480)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x1c 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x80 0x00 0x05 0x0e 0x06 0x80 0x00 0x1c 0x00 0x0a , 11)
avrdude: Send: . [1b] . [80] . [00] . [05] . [0e] . [06] . [80] . [00] . [1c] . [00] . [0a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [80] 
0x80 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x81 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa5 , 10)
avrdude: Send: . [1b] . [81] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [81] 
0x81 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [97] 
0x97 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [ad] 
0xad avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ad] 
0xad avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [ad] 
0xad avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ad] 
0xad avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [ab] 
0xab avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ab] 
0xab avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ad] 
0xad avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [ad] 
0xad avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ad] 
0xad avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: X [58] 
0x58 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ad] 
0xad avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [ad] 
0xad avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ad] 
0xad avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b1] 
0xb1 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,14592,256)
block_size at addr 14592 is 256
STK500V2: stk500v2_loadaddr(-2147476352)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x1c 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x82 0x00 0x05 0x0e 0x06 0x80 0x00 0x1c 0x80 0x88 , 11)
avrdude: Send: . [1b] . [82] . [00] . [05] . [0e] . [06] . [80] . [00] . [1c] . [80] . [88] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [82] 
0x82 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x83 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa7 , 10)
avrdude: Send: . [1b] . [83] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [83] 
0x83 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [ad] 
0xad avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [ad] 
0xad avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [ad] 
0xad avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [ad] 
0xad avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [ad] 
0xad avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [af] 
0xaf avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [af] 
0xaf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [ad] 
0xad avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: P [50] 
0x50 avrdude: Recv: X [58] 
0x58 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,14848,256)
block_size at addr 14848 is 256
STK500V2: stk500v2_loadaddr(-2147476224)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x1d 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x84 0x00 0x05 0x0e 0x06 0x80 0x00 0x1d 0x00 0x0f , 11)
avrdude: Send: . [1b] . [84] . [00] . [05] . [0e] . [06] . [80] . [00] . [1d] . [00] . [0f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [84] 
0x84 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [95] 
0x95 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x85 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa1 , 10)
avrdude: Send: . [1b] . [85] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [85] 
0x85 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [af] 
0xaf avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [af] 
0xaf avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [97] 
0x97 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [03] 
0x03 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [03] 
0x03 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [af] 
0xaf avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [af] 
0xaf avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [af] 
0xaf avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [ad] 
0xad avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [af] 
0xaf avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [af] 
0xaf avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [03] 
0x03 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [af] 
0xaf avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [97] 
0x97 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ad] 
0xad avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [ad] 
0xad avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ad] 
0xad avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [af] 
0xaf avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [af] 
0xaf avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [97] 
0x97 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [af] 
0xaf avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [af] 
0xaf avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [af] 
0xaf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [af] 
0xaf avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [97] 
0x97 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ad] 
0xad avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [ad] 
0xad avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ad] 
0xad avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [97] 
0x97 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [ad] 
0xad avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [af] 
0xaf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [97] 
0x97 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ad] 
0xad avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [ad] 
0xad avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ad] 
0xad avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d9] 
0xd9 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,15104,256)
block_size at addr 15104 is 256
STK500V2: stk500v2_loadaddr(-2147476096)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x1d 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x86 0x00 0x05 0x0e 0x06 0x80 0x00 0x1d 0x80 0x8d , 11)
avrdude: Send: . [1b] . [86] . [00] . [05] . [0e] . [06] . [80] . [00] . [1d] . [80] . [8d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [86] 
0x86 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x87 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa3 , 10)
avrdude: Send: . [1b] . [87] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [87] 
0x87 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [03] 
0x03 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [03] 
0x03 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [03] 
0x03 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [af] 
0xaf avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [af] 
0xaf avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [af] 
0xaf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [af] 
0xaf avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [97] 
0x97 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [ab] 
0xab avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [ed] 
0xed avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [ec] 
0xec avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [16] 
0x16 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [04] 
0x04 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [ed] 
0xed avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [ec] 
0xec avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9e] 
0x9e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,15360,256)
block_size at addr 15360 is 256
STK500V2: stk500v2_loadaddr(-2147475968)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x1e 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x88 0x00 0x05 0x0e 0x06 0x80 0x00 0x1e 0x00 0x00 , 11)
avrdude: Send: . [1b] . [88] . [00] . [05] . [0e] . [06] . [80] . [00] . [1e] . [00] . [00] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [88] 
0x88 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [99] 
0x99 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x89 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xad , 10)
avrdude: Send: . [1b] . [89] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ad] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [89] 
0x89 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ad] 
0xad avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [ad] 
0xad avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ad] 
0xad avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [97] 
0x97 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [ad] 
0xad avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ad] 
0xad avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [ad] 
0xad avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ad] 
0xad avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [97] 
0x97 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [ad] 
0xad avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [ad] 
0xad avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [af] 
0xaf avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [af] 
0xaf avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [97] 
0x97 avrdude: Recv: g [67] 
0x67 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: N [4e] 
0x4e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,15616,256)
block_size at addr 15616 is 256
STK500V2: stk500v2_loadaddr(-2147475840)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x1e 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x8a 0x00 0x05 0x0e 0x06 0x80 0x00 0x1e 0x80 0x82 , 11)
avrdude: Send: . [1b] . [8a] . [00] . [05] . [0e] . [06] . [80] . [00] . [1e] . [80] . [82] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8a] 
0x8a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9b] 
0x9b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xaf , 10)
avrdude: Send: . [1b] . [8b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [af] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8b] 
0x8b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [af] 
0xaf avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [97] 
0x97 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [03] 
0x03 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [03] 
0x03 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [ad] 
0xad avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [af] 
0xaf avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [af] 
0xaf avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [af] 
0xaf avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [af] 
0xaf avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [97] 
0x97 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [ad] 
0xad avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [ad] 
0xad avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [ad] 
0xad avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [af] 
0xaf avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [af] 
0xaf avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [97] 
0x97 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ad] 
0xad avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [ad] 
0xad avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ad] 
0xad avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [97] 
0x97 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [87] 
0x87 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [87] 
0x87 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [87] 
0x87 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [87] 
0x87 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [86] 
0x86 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [86] 
0x86 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [86] 
0x86 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [02] 
0x02 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: s [73] 
0x73 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,15872,256)
block_size at addr 15872 is 256
STK500V2: stk500v2_loadaddr(-2147475712)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x1f 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x8c 0x00 0x05 0x0e 0x06 0x80 0x00 0x1f 0x00 0x05 , 11)
avrdude: Send: . [1b] . [8c] . [00] . [05] . [0e] . [06] . [80] . [00] . [1f] . [00] . [05] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8c] 
0x8c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9d] 
0x9d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa9 , 10)
avrdude: Send: . [1b] . [8d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8d] 
0x8d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ed] 
0xed avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: S [53] 
0x53 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [af] 
0xaf avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [af] 
0xaf avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [af] 
0xaf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [af] 
0xaf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [97] 
0x97 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: " [22] 
0x22 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [94] 
0x94 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [ab] 
0xab avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [96] 
0x96 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ad] 
0xad avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [97] 
0x97 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [15] 
0x15 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ad] 
0xad avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [ad] 
0xad avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ad] 
0xad avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: S [53] 
0x53 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [af] 
0xaf avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [af] 
0xaf avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [af] 
0xaf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [af] 
0xaf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ef] 
0xef avrdude: Recv: i [69] 
0x69 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: P [50] 
0x50 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [ab] 
0xab avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [ad] 
0xad avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [ad] 
0xad avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [ad] 
0xad avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c3] 
0xc3 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,16128,256)
block_size at addr 16128 is 256
STK500V2: stk500v2_loadaddr(-2147475584)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x1f 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x8e 0x00 0x05 0x0e 0x06 0x80 0x00 0x1f 0x80 0x87 , 11)
avrdude: Send: . [1b] . [8e] . [00] . [05] . [0e] . [06] . [80] . [00] . [1f] . [80] . [87] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8e] 
0x8e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xab , 10)
avrdude: Send: . [1b] . [8f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ab] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8f] 
0x8f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [ad] 
0xad avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [ab] 
0xab avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [ad] 
0xad avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [ad] 
0xad avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [ad] 
0xad avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ad] 
0xad avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [ad] 
0xad avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ad] 
0xad avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ad] 
0xad avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [ad] 
0xad avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ad] 
0xad avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [ab] 
0xab avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [ab] 
0xab avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [ad] 
0xad avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [83] 
0x83 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [ad] 
0xad avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [83] 
0x83 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fc] 
0xfc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,16384,256)
block_size at addr 16384 is 256
STK500V2: stk500v2_loadaddr(-2147475456)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x20 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x90 0x00 0x05 0x0e 0x06 0x80 0x00 0x20 0x00 0x26 , 11)
avrdude: Send: . [1b] . [90] . [00] . [05] . [0e] . [06] . [80] . [00]   [20] . [00] & [26] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [90] 
0x90 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x91 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb5 , 10)
avrdude: Send: . [1b] . [91] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [91] 
0x91 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ad] 
0xad avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [ad] 
0xad avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ad] 
0xad avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [97] 
0x97 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [85] 
0x85 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [87] 
0x87 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ad] 
0xad avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [ad] 
0xad avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ad] 
0xad avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [97] 
0x97 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [85] 
0x85 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [87] 
0x87 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [01] 
0x01 avrdude: Recv: # [23] 
0x23 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [01] 
0x01 avrdude: Recv: G [47] 
0x47 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [db] 
0xdb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ce] 
0xce 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,16640,256)
block_size at addr 16640 is 256
STK500V2: stk500v2_loadaddr(-2147475328)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x20 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x92 0x00 0x05 0x0e 0x06 0x80 0x00 0x20 0x80 0xa4 , 11)
avrdude: Send: . [1b] . [92] . [00] . [05] . [0e] . [06] . [80] . [00]   [20] . [80] . [a4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [92] 
0x92 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [83] 
0x83 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x93 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb7 , 10)
avrdude: Send: . [1b] . [93] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [93] 
0x93 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ef] 
0xef avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [87] 
0x87 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [87] 
0x87 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [13] 
0x13 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [a5] 
0xa5 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [81] 
0x81 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [81] 
0x81 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b9] 
0xb9 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,16896,256)
block_size at addr 16896 is 256
STK500V2: stk500v2_loadaddr(-2147475200)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x21 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x94 0x00 0x05 0x0e 0x06 0x80 0x00 0x21 0x00 0x23 , 11)
avrdude: Send: . [1b] . [94] . [00] . [05] . [0e] . [06] . [80] . [00] ! [21] . [00] # [23] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [94] 
0x94 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [85] 
0x85 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x95 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb1 , 10)
avrdude: Send: . [1b] . [95] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [95] 
0x95 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [14] 
0x14 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [13] 
0x13 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [03] 
0x03 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [91] 
0x91 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [83] 
0x83 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [00] 
0x00 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b6] 
0xb6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,17152,256)
block_size at addr 17152 is 256
STK500V2: stk500v2_loadaddr(-2147475072)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x21 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x96 0x00 0x05 0x0e 0x06 0x80 0x00 0x21 0x80 0xa1 , 11)
avrdude: Send: . [1b] . [96] . [00] . [05] . [0e] . [06] . [80] . [00] ! [21] . [80] . [a1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [96] 
0x96 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x97 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb3 , 10)
avrdude: Send: . [1b] . [97] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [97] 
0x97 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: f [66] 
0x66 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [9e] 
0x9e avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [85] 
0x85 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [86] 
0x86 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8e] 
0x8e avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [85] 
0x85 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c4] 
0xc4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,17408,256)
block_size at addr 17408 is 256
STK500V2: stk500v2_loadaddr(-2147474944)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x22 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x98 0x00 0x05 0x0e 0x06 0x80 0x00 0x22 0x00 0x2c , 11)
avrdude: Send: . [1b] . [98] . [00] . [05] . [0e] . [06] . [80] . [00] " [22] . [00] , [2c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [98] 
0x98 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [89] 
0x89 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x99 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbd , 10)
avrdude: Send: . [1b] . [99] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [99] 
0x99 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [82] 
0x82 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [ee] 
0xee avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [9d] 
0x9d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [83] 
0x83 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8b] 
0x8b avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [88] 
0x88 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [89] 
0x89 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8d] 
0x8d avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8c] 
0x8c avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [16] 
0x16 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [86] 
0x86 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,17664,256)
block_size at addr 17664 is 256
STK500V2: stk500v2_loadaddr(-2147474816)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x22 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x9a 0x00 0x05 0x0e 0x06 0x80 0x00 0x22 0x80 0xae , 11)
avrdude: Send: . [1b] . [9a] . [00] . [05] . [0e] . [06] . [80] . [00] " [22] . [80] . [ae] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9a] 
0x9a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8b] 
0x8b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbf , 10)
avrdude: Send: . [1b] . [9b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9b] 
0x9b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [88] 
0x88 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [89] 
0x89 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8b] 
0x8b avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [88] 
0x88 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [89] 
0x89 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [2e] 
0x2e avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: # [23] 
0x23 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [83] 
0x83 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [80] 
0x80 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [82] 
0x82 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [92] 
0x92 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [8c] 
0x8c avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [8d] 
0x8d avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: # [23] 
0x23 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e3] 
0xe3 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,17920,256)
block_size at addr 17920 is 256
STK500V2: stk500v2_loadaddr(-2147474688)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x23 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x9c 0x00 0x05 0x0e 0x06 0x80 0x00 0x23 0x00 0x29 , 11)
avrdude: Send: . [1b] . [9c] . [00] . [05] . [0e] . [06] . [80] . [00] # [23] . [00] ) [29] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9c] 
0x9c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb9 , 10)
avrdude: Send: . [1b] . [9d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9d] 
0x9d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [84] 
0x84 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [80] 
0x80 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [db] 
0xdb avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [83] 
0x83 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [86] 
0x86 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: F [46] 
0x46 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [84] 
0x84 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [07] 
0x07 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [85] 
0x85 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8b] 
0x8b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [87] 
0x87 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [80] 
0x80 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [87] 
0x87 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [db] 
0xdb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: g [67] 
0x67 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: h [68] 
0x68 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: i [69] 
0x69 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ec] 
0xec 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,18176,256)
block_size at addr 18176 is 256
STK500V2: stk500v2_loadaddr(-2147474560)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x23 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x9e 0x00 0x05 0x0e 0x06 0x80 0x00 0x23 0x80 0xab , 11)
avrdude: Send: . [1b] . [9e] . [00] . [05] . [0e] . [06] . [80] . [00] # [23] . [80] . [ab] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9e] 
0x9e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbb , 10)
avrdude: Send: . [1b] . [9f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9f] 
0x9f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: g [67] 
0x67 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: h [68] 
0x68 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: i [69] 
0x69 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [11] 
0x11 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ef] 
0xef avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,18432,256)
block_size at addr 18432 is 256
STK500V2: stk500v2_loadaddr(-2147474432)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x24 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa0 0x00 0x05 0x0e 0x06 0x80 0x00 0x24 0x00 0x12 , 11)
avrdude: Send: . [1b] . [a0] . [00] . [05] . [0e] . [06] . [80] . [00] $ [24] . [00] . [12] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a0] 
0xa0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b1] 
0xb1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x85 , 10)
avrdude: Send: . [1b] . [a1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [85] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a1] 
0xa1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [7f] 
0x7f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,18688,256)
block_size at addr 18688 is 256
STK500V2: stk500v2_loadaddr(-2147474304)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x24 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xa2 0x00 0x05 0x0e 0x06 0x80 0x00 0x24 0x80 0x90 , 11)
avrdude: Send: . [1b] . [a2] . [00] . [05] . [0e] . [06] . [80] . [00] $ [24] . [80] . [90] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a2] 
0xa2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b3] 
0xb3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x87 , 10)
avrdude: Send: . [1b] . [a3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [87] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a3] 
0xa3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [10] 
0x10 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [10] 
0x10 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [00] 
0x00 avrdude: Recv: r [72] 
0x72 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,18944,256)
block_size at addr 18944 is 256
STK500V2: stk500v2_loadaddr(-2147474176)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x25 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa4 0x00 0x05 0x0e 0x06 0x80 0x00 0x25 0x00 0x17 , 11)
avrdude: Send: . [1b] . [a4] . [00] . [05] . [0e] . [06] . [80] . [00] % [25] . [00] . [17] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a4] 
0xa4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b5] 
0xb5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x81 , 10)
avrdude: Send: . [1b] . [a5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [81] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a5] 
0xa5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [15] 
0x15 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [82] 
0x82 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,19200,256)
block_size at addr 19200 is 256
STK500V2: stk500v2_loadaddr(-2147474048)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x25 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xa6 0x00 0x05 0x0e 0x06 0x80 0x00 0x25 0x80 0x95 , 11)
avrdude: Send: . [1b] . [a6] . [00] . [05] . [0e] . [06] . [80] . [00] % [25] . [80] . [95] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a6] 
0xa6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b7] 
0xb7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x83 , 10)
avrdude: Send: . [1b] . [a7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [83] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a7] 
0xa7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [18] 
0x18 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: H [48] 
0x48 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: V [56] 
0x56 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9b] 
0x9b 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,19456,256)
block_size at addr 19456 is 256
STK500V2: stk500v2_loadaddr(-2147473920)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x26 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa8 0x00 0x05 0x0e 0x06 0x80 0x00 0x26 0x00 0x18 , 11)
avrdude: Send: . [1b] . [a8] . [00] . [05] . [0e] . [06] . [80] . [00] & [26] . [00] . [18] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a8] 
0xa8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b9] 
0xb9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8d , 10)
avrdude: Send: . [1b] . [a9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a9] 
0xa9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [18] 
0x18 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: E [45] 
0x45 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: E [45] 
0x45 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: B [42] 
0x42 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ab] 
0xab avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ae] 
0xae avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: B [42] 
0x42 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: g [67] 
0x67 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [13] 
0x13 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [00] 
0x00 avrdude: Recv: k [6b] 
0x6b 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,19712,256)
block_size at addr 19712 is 256
STK500V2: stk500v2_loadaddr(-2147473792)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x26 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xaa 0x00 0x05 0x0e 0x06 0x80 0x00 0x26 0x80 0x9a , 11)
avrdude: Send: . [1b] . [aa] . [00] . [05] . [0e] . [06] . [80] . [00] & [26] . [80] . [9a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [aa] 
0xaa hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bb] 
0xbb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xab 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8f , 10)
avrdude: Send: . [1b] . [ab] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ab] 
0xab hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: + [2b] 
0x2b avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: B [42] 
0x42 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: a [61] 
0x61 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [18] 
0x18 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [8d] 
0x8d avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,19968,256)
block_size at addr 19968 is 256
STK500V2: stk500v2_loadaddr(-2147473664)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x27 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xac 0x00 0x05 0x0e 0x06 0x80 0x00 0x27 0x00 0x1d , 11)
avrdude: Send: . [1b] . [ac] . [00] . [05] . [0e] . [06] . [80] . [00] ' [27] . [00] . [1d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ac] 
0xac hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bd] 
0xbd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xad 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x89 , 10)
avrdude: Send: . [1b] . [ad] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [89] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ad] 
0xad hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [af] 
0xaf avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [ef] 
0xef avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: g [67] 
0x67 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: h [68] 
0x68 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,20224,256)
block_size at addr 20224 is 256
STK500V2: stk500v2_loadaddr(-2147473536)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x27 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xae 0x00 0x05 0x0e 0x06 0x80 0x00 0x27 0x80 0x9f , 11)
avrdude: Send: . [1b] . [ae] . [00] . [05] . [0e] . [06] . [80] . [00] ' [27] . [80] . [9f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ae] 
0xae hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bf] 
0xbf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xaf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8b , 10)
avrdude: Send: . [1b] . [af] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [af] 
0xaf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [02] 
0x02 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [13] 
0x13 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d4] 
0xd4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,20480,256)
block_size at addr 20480 is 256
STK500V2: stk500v2_loadaddr(-2147473408)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x28 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb0 0x00 0x05 0x0e 0x06 0x80 0x00 0x28 0x00 0x0e , 11)
avrdude: Send: . [1b] . [b0] . [00] . [05] . [0e] . [06] . [80] . [00] ( [28] . [00] . [0e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b0] 
0xb0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a1] 
0xa1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x95 , 10)
avrdude: Send: . [1b] . [b1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [95] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b1] 
0xb1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [93] 
0x93 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [14] 
0x14 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: b [62] 
0x62 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [98] 
0x98 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b2] 
0xb2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,20736,256)
block_size at addr 20736 is 256
STK500V2: stk500v2_loadaddr(-2147473280)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x28 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xb2 0x00 0x05 0x0e 0x06 0x80 0x00 0x28 0x80 0x8c , 11)
avrdude: Send: . [1b] . [b2] . [00] . [05] . [0e] . [06] . [80] . [00] ( [28] . [80] . [8c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b2] 
0xb2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a3] 
0xa3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x97 , 10)
avrdude: Send: . [1b] . [b3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [97] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b3] 
0xb3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: u [75] 
0x75 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: u [75] 
0x75 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: u [75] 
0x75 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: u [75] 
0x75 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: u [75] 
0x75 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: u [75] 
0x75 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: u [75] 
0x75 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: u [75] 
0x75 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: u [75] 
0x75 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: u [75] 
0x75 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: u [75] 
0x75 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: u [75] 
0x75 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: u [75] 
0x75 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: u [75] 
0x75 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: u [75] 
0x75 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [91] 
0x91 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [7f] 
0x7f avrdude: Recv: ! [21] 
0x21 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [91] 
0x91 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: F [46] 
0x46 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,20992,256)
block_size at addr 20992 is 256
STK500V2: stk500v2_loadaddr(-2147473152)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x29 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb4 0x00 0x05 0x0e 0x06 0x80 0x00 0x29 0x00 0x0b , 11)
avrdude: Send: . [1b] . [b4] . [00] . [05] . [0e] . [06] . [80] . [00] ) [29] . [00] . [0b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b4] 
0xb4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a5] 
0xa5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x91 , 10)
avrdude: Send: . [1b] . [b5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [91] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b5] 
0xb5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: D [44] 
0x44 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [dd] 
0xdd avrdude: Recv:   [20] 
0x20 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: d [64] 
0x64 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: > [3e] 
0x3e avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [ee] 
0xee avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d8] 
0xd8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,21248,256)
block_size at addr 21248 is 256
STK500V2: stk500v2_loadaddr(-2147473024)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x29 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xb6 0x00 0x05 0x0e 0x06 0x80 0x00 0x29 0x80 0x89 , 11)
avrdude: Send: . [1b] . [b6] . [00] . [05] . [0e] . [06] . [80] . [00] ) [29] . [80] . [89] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b6] 
0xb6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a7] 
0xa7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x93 , 10)
avrdude: Send: . [1b] . [b7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [93] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b7] 
0xb7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [83] 
0x83 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [83] 
0x83 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [83] 
0x83 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [ef] 
0xef avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [83] 
0x83 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: b [62] 
0x62 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [83] 
0x83 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: B [42] 
0x42 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0c] 
0x0c avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [ea] 
0xea avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [83] 
0x83 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [83] 
0x83 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9a] 
0x9a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,21504,256)
block_size at addr 21504 is 256
STK500V2: stk500v2_loadaddr(-2147472896)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x2a 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb8 0x00 0x05 0x0e 0x06 0x80 0x00 0x2a 0x00 0x04 , 11)
avrdude: Send: . [1b] . [b8] . [00] . [05] . [0e] . [06] . [80] . [00] * [2a] . [00] . [04] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b8] 
0xb8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a9] 
0xa9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9d , 10)
avrdude: Send: . [1b] . [b9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b9] 
0xb9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [93] 
0x93 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [06] 
0x06 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [93] 
0x93 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [07] 
0x07 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [84] 
0x84 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,21760,256)
block_size at addr 21760 is 256
STK500V2: stk500v2_loadaddr(-2147472768)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x2a 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xba 0x00 0x05 0x0e 0x06 0x80 0x00 0x2a 0x80 0x86 , 11)
avrdude: Send: . [1b] . [ba] . [00] . [05] . [0e] . [06] . [80] . [00] * [2a] . [80] . [86] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ba] 
0xba hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ab] 
0xab 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9f , 10)
avrdude: Send: . [1b] . [bb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bb] 
0xbb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [05] 
0x05 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [11] 
0x11 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [db] 
0xdb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [85] 
0x85 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,22016,256)
block_size at addr 22016 is 256
STK500V2: stk500v2_loadaddr(-2147472640)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x2b 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xbc 0x00 0x05 0x0e 0x06 0x80 0x00 0x2b 0x00 0x01 , 11)
avrdude: Send: . [1b] . [bc] . [00] . [05] . [0e] . [06] . [80] . [00] + [2b] . [00] . [01] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bc] 
0xbc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ad] 
0xad 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x99 , 10)
avrdude: Send: . [1b] . [bd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [99] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bd] 
0xbd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [93] 
0x93 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [13] 
0x13 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [87] 
0x87 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [18] 
0x18 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,22272,256)
block_size at addr 22272 is 256
STK500V2: stk500v2_loadaddr(-2147472512)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x2b 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xbe 0x00 0x05 0x0e 0x06 0x80 0x00 0x2b 0x80 0x83 , 11)
avrdude: Send: . [1b] . [be] . [00] . [05] . [0e] . [06] . [80] . [00] + [2b] . [80] . [83] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [be] 
0xbe hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [af] 
0xaf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9b , 10)
avrdude: Send: . [1b] . [bf] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bf] 
0xbf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [02] 
0x02 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [02] 
0x02 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [02] 
0x02 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [02] 
0x02 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cc] 
0xcc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,22528,256)
block_size at addr 22528 is 256
STK500V2: stk500v2_loadaddr(-2147472384)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x2c 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc0 0x00 0x05 0x0e 0x06 0x80 0x00 0x2c 0x00 0x7a , 11)
avrdude: Send: . [1b] . [c0] . [00] . [05] . [0e] . [06] . [80] . [00] , [2c] . [00] z [7a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c0] 
0xc0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d1] 
0xd1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe5 , 10)
avrdude: Send: . [1b] . [c1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c1] 
0xc1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [02] 
0x02 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [de] 
0xde avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [02] 
0x02 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: B [42] 
0x42 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [fd] 
0xfd avrdude: Recv: O [4f] 
0x4f avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [83] 
0x83 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ec] 
0xec avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [fd] 
0xfd avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [fd] 
0xfd avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ed] 
0xed avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: O [4f] 
0x4f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [81] 
0x81 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [81] 
0x81 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [93] 
0x93 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [7f] 
0x7f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,22784,256)
block_size at addr 22784 is 256
STK500V2: stk500v2_loadaddr(-2147472256)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x2c 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xc2 0x00 0x05 0x0e 0x06 0x80 0x00 0x2c 0x80 0xf8 , 11)
avrdude: Send: . [1b] . [c2] . [00] . [05] . [0e] . [06] . [80] . [00] , [2c] . [80] . [f8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c2] 
0xc2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d3] 
0xd3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe7 , 10)
avrdude: Send: . [1b] . [c3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c3] 
0xc3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [fd] 
0xfd avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: i [69] 
0x69 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [07] 
0x07 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [ee] 
0xee avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [83] 
0x83 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,23040,256)
block_size at addr 23040 is 256
STK500V2: stk500v2_loadaddr(-2147472128)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x2d 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc4 0x00 0x05 0x0e 0x06 0x80 0x00 0x2d 0x00 0x7f , 11)
avrdude: Send: . [1b] . [c4] . [00] . [05] . [0e] . [06] . [80] . [00] - [2d] . [00] . [7f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c4] 
0xc4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d5] 
0xd5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe1 , 10)
avrdude: Send: . [1b] . [c5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c5] 
0xc5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [0b] 
0x0b avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,23296,256)
block_size at addr 23296 is 256
STK500V2: stk500v2_loadaddr(-2147472000)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x2d 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xc6 0x00 0x05 0x0e 0x06 0x80 0x00 0x2d 0x80 0xfd , 11)
avrdude: Send: . [1b] . [c6] . [00] . [05] . [0e] . [06] . [80] . [00] - [2d] . [80] . [fd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c6] 
0xc6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d7] 
0xd7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe3 , 10)
avrdude: Send: . [1b] . [c7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c7] 
0xc7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [18] 
0x18 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [02] 
0x02 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [02] 
0x02 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: g [67] 
0x67 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [02] 
0x02 avrdude: Recv: # [23] 
0x23 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [05] 
0x05 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [ea] 
0xea avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [ea] 
0xea avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [02] 
0x02 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,23552,256)
block_size at addr 23552 is 256
STK500V2: stk500v2_loadaddr(-2147471872)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x2e 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc8 0x00 0x05 0x0e 0x06 0x80 0x00 0x2e 0x00 0x70 , 11)
avrdude: Send: . [1b] . [c8] . [00] . [05] . [0e] . [06] . [80] . [00] . [2e] . [00] p [70] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c8] 
0xc8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d9] 
0xd9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xed , 10)
avrdude: Send: . [1b] . [c9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ed] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c9] 
0xc9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ce] 
0xce 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,23808,256)
block_size at addr 23808 is 256
STK500V2: stk500v2_loadaddr(-2147471744)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x2e 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xca 0x00 0x05 0x0e 0x06 0x80 0x00 0x2e 0x80 0xf2 , 11)
avrdude: Send: . [1b] . [ca] . [00] . [05] . [0e] . [06] . [80] . [00] . [2e] . [80] . [f2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ca] 
0xca hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [db] 
0xdb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xef , 10)
avrdude: Send: . [1b] . [cb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ef] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cb] 
0xcb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [ac] 
0xac avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: n [6e] 
0x6e avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [ff] 
0xff avrdude: Recv:   [20] 
0x20 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: o [6f] 
0x6f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [10] 
0x10 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fe] 
0xfe 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,24064,256)
block_size at addr 24064 is 256
STK500V2: stk500v2_loadaddr(-2147471616)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x2f 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xcc 0x00 0x05 0x0e 0x06 0x80 0x00 0x2f 0x00 0x75 , 11)
avrdude: Send: . [1b] . [cc] . [00] . [05] . [0e] . [06] . [80] . [00] / [2f] . [00] u [75] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cc] 
0xcc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [dd] 
0xdd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe9 , 10)
avrdude: Send: . [1b] . [cd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cd] 
0xcd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [08] 
0x08 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [13] 
0x13 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [13] 
0x13 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [03] 
0x03 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [03] 
0x03 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [05] 
0x05 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,24320,256)
block_size at addr 24320 is 256
STK500V2: stk500v2_loadaddr(-2147471488)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x2f 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xce 0x00 0x05 0x0e 0x06 0x80 0x00 0x2f 0x80 0xf7 , 11)
avrdude: Send: . [1b] . [ce] . [00] . [05] . [0e] . [06] . [80] . [00] / [2f] . [80] . [f7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ce] 
0xce hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [df] 
0xdf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xeb , 10)
avrdude: Send: . [1b] . [cf] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [eb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cf] 
0xcf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [03] 
0x03 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [92] 
0x92 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [03] 
0x03 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [03] 
0x03 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [a5] 
0xa5 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [03] 
0x03 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [92] 
0x92 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [03] 
0x03 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e1] 
0xe1 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,24576,256)
block_size at addr 24576 is 256
STK500V2: stk500v2_loadaddr(-2147471360)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x30 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd0 0x00 0x05 0x0e 0x06 0x80 0x00 0x30 0x00 0x76 , 11)
avrdude: Send: . [1b] . [d0] . [00] . [05] . [0e] . [06] . [80] . [00] 0 [30] . [00] v [76] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d0] 
0xd0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c1] 
0xc1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf5 , 10)
avrdude: Send: . [1b] . [d1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d1] 
0xd1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [11] 
0x11 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: h [68] 
0x68 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: f [66] 
0x66 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [92] 
0x92 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ef] 
0xef avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [d7] 
0xd7 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: k [6b] 
0x6b 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,24832,256)
block_size at addr 24832 is 256
STK500V2: stk500v2_loadaddr(-2147471232)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x30 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xd2 0x00 0x05 0x0e 0x06 0x80 0x00 0x30 0x80 0xf4 , 11)
avrdude: Send: . [1b] . [d2] . [00] . [05] . [0e] . [06] . [80] . [00] 0 [30] . [80] . [f4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d2] 
0xd2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c3] 
0xc3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf7 , 10)
avrdude: Send: . [1b] . [d3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d3] 
0xd3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [ae] 
0xae avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ae] 
0xae avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [ae] 
0xae avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ae] 
0xae avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [97] 
0x97 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [96] 
0x96 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [af] 
0xaf avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [97] 
0x97 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [96] 
0x96 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [af] 
0xaf avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [af] 
0xaf avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: A [41] 
0x41 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: Q [51] 
0x51 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [16] 
0x16 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [07] 
0x07 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [0a] 
0x0a avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [97] 
0x97 avrdude: Recv: a [61] 
0x61 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: p [70] 
0x70 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ad] 
0xad avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [ad] 
0xad avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ad] 
0xad avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: N [4e] 
0x4e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,25088,256)
block_size at addr 25088 is 256
STK500V2: stk500v2_loadaddr(-2147471104)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x31 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd4 0x00 0x05 0x0e 0x06 0x80 0x00 0x31 0x00 0x73 , 11)
avrdude: Send: . [1b] . [d4] . [00] . [05] . [0e] . [06] . [80] . [00] 1 [31] . [00] s [73] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d4] 
0xd4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c5] 
0xc5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf1 , 10)
avrdude: Send: . [1b] . [d5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d5] 
0xd5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [af] 
0xaf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [af] 
0xaf avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: a [61] 
0x61 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [14] 
0x14 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [04] 
0x04 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [04] 
0x04 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [98] 
0x98 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [af] 
0xaf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [01] 
0x01 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [19] 
0x19 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [09] 
0x09 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [ee] 
0xee avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ef] 
0xef avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0c] 
0x0c avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [0a] 
0x0a avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [af] 
0xaf avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: p [70] 
0x70 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [14] 
0x14 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [04] 
0x04 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [04] 
0x04 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [04] 
0x04 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bc] 
0xbc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,25344,256)
block_size at addr 25344 is 256
STK500V2: stk500v2_loadaddr(-2147470976)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x31 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xd6 0x00 0x05 0x0e 0x06 0x80 0x00 0x31 0x80 0xf1 , 11)
avrdude: Send: . [1b] . [d6] . [00] . [05] . [0e] . [06] . [80] . [00] 1 [31] . [80] . [f1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d6] 
0xd6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c7] 
0xc7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf3 , 10)
avrdude: Send: . [1b] . [d7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d7] 
0xd7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [ee] 
0xee avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [ad] 
0xad avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [ad] 
0xad avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [ad] 
0xad avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [ad] 
0xad avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [15] 
0x15 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [05] 
0x05 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [05] 
0x05 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [05] 
0x05 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [97] 
0x97 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [96] 
0x96 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [ad] 
0xad avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [97] 
0x97 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ad] 
0xad avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [97] 
0x97 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ad] 
0xad avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [97] 
0x97 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ec] 
0xec avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [95] 
0x95 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [af] 
0xaf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [af] 
0xaf avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [96] 
0x96 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ae] 
0xae avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [97] 
0x97 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [96] 
0x96 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ae] 
0xae avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [af] 
0xaf avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [97] 
0x97 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [ad] 
0xad avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [97] 
0x97 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [af] 
0xaf avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [cf] 
0xcf avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [14] 
0x14 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [04] 
0x04 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [04] 
0x04 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [04] 
0x04 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: G [47] 
0x47 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,25600,256)
block_size at addr 25600 is 256
STK500V2: stk500v2_loadaddr(-2147470848)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x32 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd8 0x00 0x05 0x0e 0x06 0x80 0x00 0x32 0x00 0x7c , 11)
avrdude: Send: . [1b] . [d8] . [00] . [05] . [0e] . [06] . [80] . [00] 2 [32] . [00] | [7c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d8] 
0xd8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c9] 
0xc9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xfd , 10)
avrdude: Send: . [1b] . [d9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [fd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d9] 
0xd9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [da] 
0xda avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [bc] 
0xbc avrdude: Recv: , [2c] 
0x2c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [07] 
0x07 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [12] 
0x12 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [05] 
0x05 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ef] 
0xef avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [cc] 
0xcc avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: n [6e] 
0x6e avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [19] 
0x19 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [df] 
0xdf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fb] 
0xfb 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,25856,256)
block_size at addr 25856 is 256
STK500V2: stk500v2_loadaddr(-2147470720)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x32 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xda 0x00 0x05 0x0e 0x06 0x80 0x00 0x32 0x80 0xfe , 11)
avrdude: Send: . [1b] . [da] . [00] . [05] . [0e] . [06] . [80] . [00] 2 [32] . [80] . [fe] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [da] 
0xda hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cb] 
0xcb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xff , 10)
avrdude: Send: . [1b] . [db] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ff] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [db] 
0xdb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [17] 
0x17 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [85] 
0x85 avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [85] 
0x85 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: P [50] 
0x50 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [87] 
0x87 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [87] 
0x87 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [85] 
0x85 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [81] 
0x81 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [81] 
0x81 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: q [71] 
0x71 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9e] 
0x9e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,26112,256)
block_size at addr 26112 is 256
STK500V2: stk500v2_loadaddr(-2147470592)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x33 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xdc 0x00 0x05 0x0e 0x06 0x80 0x00 0x33 0x00 0x79 , 11)
avrdude: Send: . [1b] . [dc] . [00] . [05] . [0e] . [06] . [80] . [00] 3 [33] . [00] y [79] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [dc] 
0xdc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cd] 
0xcd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf9 , 10)
avrdude: Send: . [1b] . [dd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [dd] 
0xdd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: q [71] 
0x71 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,26368,256)
block_size at addr 26368 is 256
STK500V2: stk500v2_loadaddr(-2147470464)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x33 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xde 0x00 0x05 0x0e 0x06 0x80 0x00 0x33 0x80 0xfb , 11)
avrdude: Send: . [1b] . [de] . [00] . [05] . [0e] . [06] . [80] . [00] 3 [33] . [80] . [fb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [de] 
0xde hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cf] 
0xcf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xfb , 10)
avrdude: Send: . [1b] . [df] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [fb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [df] 
0xdf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [02] 
0x02 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [83] 
0x83 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [09] 
0x09 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,26624,256)
block_size at addr 26624 is 256
STK500V2: stk500v2_loadaddr(-2147470336)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x34 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe0 0x00 0x05 0x0e 0x06 0x80 0x00 0x34 0x00 0x42 , 11)
avrdude: Send: . [1b] . [e0] . [00] . [05] . [0e] . [06] . [80] . [00] 4 [34] . [00] B [42] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e0] 
0xe0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f1] 
0xf1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc5 , 10)
avrdude: Send: . [1b] . [e1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e1] 
0xe1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [83] 
0x83 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [83] 
0x83 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ee] 
0xee avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e3] 
0xe3 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,26880,256)
block_size at addr 26880 is 256
STK500V2: stk500v2_loadaddr(-2147470208)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x34 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xe2 0x00 0x05 0x0e 0x06 0x80 0x00 0x34 0x80 0xc0 , 11)
avrdude: Send: . [1b] . [e2] . [00] . [05] . [0e] . [06] . [80] . [00] 4 [34] . [80] . [c0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e2] 
0xe2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f3] 
0xf3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc7 , 10)
avrdude: Send: . [1b] . [e3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e3] 
0xe3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: F [46] 
0x46 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: G [47] 
0x47 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: F [46] 
0x46 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: G [47] 
0x47 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: F [46] 
0x46 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: G [47] 
0x47 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [81] 
0x81 avrdude: Recv: % [25] 
0x25 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [01] 
0x01 avrdude: Recv: E [45] 
0x45 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: F [46] 
0x46 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: G [47] 
0x47 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: E [45] 
0x45 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: F [46] 
0x46 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: G [47] 
0x47 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [ee] 
0xee avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 2 [32] 
0x32 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,27136,256)
block_size at addr 27136 is 256
STK500V2: stk500v2_loadaddr(-2147470080)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x35 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe4 0x00 0x05 0x0e 0x06 0x80 0x00 0x35 0x00 0x47 , 11)
avrdude: Send: . [1b] . [e4] . [00] . [05] . [0e] . [06] . [80] . [00] 5 [35] . [00] G [47] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e4] 
0xe4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f5] 
0xf5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc1 , 10)
avrdude: Send: . [1b] . [e5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e5] 
0xe5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [bc] 
0xbc avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [03] 
0x03 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [03] 
0x03 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [03] 
0x03 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [03] 
0x03 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [03] 
0x03 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [03] 
0x03 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [00] 
0x00 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [03] 
0x03 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [03] 
0x03 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [02] 
0x02 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [00] 
0x00 avrdude: Recv: : [3a] 
0x3a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,27392,256)
block_size at addr 27392 is 256
STK500V2: stk500v2_loadaddr(-2147469952)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x35 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xe6 0x00 0x05 0x0e 0x06 0x80 0x00 0x35 0x80 0xc5 , 11)
avrdude: Send: . [1b] . [e6] . [00] . [05] . [0e] . [06] . [80] . [00] 5 [35] . [80] . [c5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e6] 
0xe6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f7] 
0xf7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc3 , 10)
avrdude: Send: . [1b] . [e7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e7] 
0xe7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [ce] 
0xce avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [ce] 
0xce avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [81] 
0x81 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [01] 
0x01 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9a] 
0x9a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,27648,256)
block_size at addr 27648 is 256
STK500V2: stk500v2_loadaddr(-2147469824)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x36 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe8 0x00 0x05 0x0e 0x06 0x80 0x00 0x36 0x00 0x48 , 11)
avrdude: Send: . [1b] . [e8] . [00] . [05] . [0e] . [06] . [80] . [00] 6 [36] . [00] H [48] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e8] 
0xe8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f9] 
0xf9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcd , 10)
avrdude: Send: . [1b] . [e9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e9] 
0xe9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [81] 
0x81 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [01] 
0x01 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [ce] 
0xce avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [cd] 
0xcd avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [ea] 
0xea avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [ea] 
0xea avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8e] 
0x8e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,27904,256)
block_size at addr 27904 is 256
STK500V2: stk500v2_loadaddr(-2147469696)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x36 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xea 0x00 0x05 0x0e 0x06 0x80 0x00 0x36 0x80 0xca , 11)
avrdude: Send: . [1b] . [ea] . [00] . [05] . [0e] . [06] . [80] . [00] 6 [36] . [80] . [ca] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ea] 
0xea hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fb] 
0xfb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xeb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcf , 10)
avrdude: Send: . [1b] . [eb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [eb] 
0xeb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [13] 
0x13 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ec] 
0xec avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [de] 
0xde avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [91] 
0x91 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [83] 
0x83 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ed] 
0xed avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [05] 
0x05 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [05] 
0x05 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [15] 
0x15 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [de] 
0xde avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [dd] 
0xdd avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ~ [7e] 
0x7e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,28160,256)
block_size at addr 28160 is 256
STK500V2: stk500v2_loadaddr(-2147469568)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x37 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xec 0x00 0x05 0x0e 0x06 0x80 0x00 0x37 0x00 0x4d , 11)
avrdude: Send: . [1b] . [ec] . [00] . [05] . [0e] . [06] . [80] . [00] 7 [37] . [00] M [4d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ec] 
0xec hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fd] 
0xfd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xed 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc9 , 10)
avrdude: Send: . [1b] . [ed] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ed] 
0xed hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [05] 
0x05 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [05] 
0x05 avrdude: Recv: # [23] 
0x23 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [dd] 
0xdd avrdude: Recv:   [20] 
0x20 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [ea] 
0xea avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [ea] 
0xea avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [01] 
0x01 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [bb] 
0xbb avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [94] 
0x94 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: O [4f] 
0x4f avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b6] 
0xb6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,28416,256)
block_size at addr 28416 is 256
STK500V2: stk500v2_loadaddr(-2147469440)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x37 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xee 0x00 0x05 0x0e 0x06 0x80 0x00 0x37 0x80 0xcf , 11)
avrdude: Send: . [1b] . [ee] . [00] . [05] . [0e] . [06] . [80] . [00] 7 [37] . [80] . [cf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ee] 
0xee hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xef 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcb , 10)
avrdude: Send: . [1b] . [ef] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ef] 
0xef hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [82] 
0x82 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [82] 
0x82 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0c] 
0x0c avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [89] 
0x89 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [9f] 
0x9f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [fc] 
0xfc avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [ea] 
0xea avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [ea] 
0xea avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [14] 
0x14 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: i [69] 
0x69 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [dd] 
0xdd avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [db] 
0xdb avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [df] 
0xdf avrdude: Recv: o [6f] 
0x6f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,28672,256)
block_size at addr 28672 is 256
STK500V2: stk500v2_loadaddr(-2147469312)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x38 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf0 0x00 0x05 0x0e 0x06 0x80 0x00 0x38 0x00 0x5e , 11)
avrdude: Send: . [1b] . [f0] . [00] . [05] . [0e] . [06] . [80] . [00] 8 [38] . [00] ^ [5e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f0] 
0xf0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e1] 
0xe1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd5 , 10)
avrdude: Send: . [1b] . [f1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f1] 
0xf1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [86] 
0x86 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: / [2f] 
0x2f avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [da] 
0xda avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: V [56] 
0x56 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: G [47] 
0x47 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: ) [29] 
0x29 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [da] 
0xda avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: e [65] 
0x65 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: t [74] 
0x74 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [83] 
0x83 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [95] 
0x95 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [84] 
0x84 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ff] 
0xff avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [81] 
0x81 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [ed] 
0xed avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: * [2a] 
0x2a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [db] 
0xdb 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,28928,256)
block_size at addr 28928 is 256
STK500V2: stk500v2_loadaddr(-2147469184)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x38 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xf2 0x00 0x05 0x0e 0x06 0x80 0x00 0x38 0x80 0xdc , 11)
avrdude: Send: . [1b] . [f2] . [00] . [05] . [0e] . [06] . [80] . [00] 8 [38] . [80] . [dc] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f2] 
0xf2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e3] 
0xe3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd7 , 10)
avrdude: Send: . [1b] . [f3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f3] 
0xf3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [ed] 
0xed avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: * [2a] 
0x2a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [90] 
0x90 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [02] 
0x02 avrdude: Recv: # [23] 
0x23 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [81] 
0x81 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [81] 
0x81 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [16] 
0x16 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [81] 
0x81 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [81] 
0x81 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [83] 
0x83 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [00] 
0x00 avrdude: Recv: 3 [33] 
0x33 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,29184,256)
block_size at addr 29184 is 256
STK500V2: stk500v2_loadaddr(-2147469056)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x39 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf4 0x00 0x05 0x0e 0x06 0x80 0x00 0x39 0x00 0x5b , 11)
avrdude: Send: . [1b] . [f4] . [00] . [05] . [0e] . [06] . [80] . [00] 9 [39] . [00] [ [5b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f4] 
0xf4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e5] 
0xe5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd1 , 10)
avrdude: Send: . [1b] . [f5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f5] 
0xf5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [df] 
0xdf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [03] 
0x03 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [03] 
0x03 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [03] 
0x03 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [03] 
0x03 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [03] 
0x03 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: & [26] 
0x26 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,29440,256)
block_size at addr 29440 is 256
STK500V2: stk500v2_loadaddr(-2147468928)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x39 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xf6 0x00 0x05 0x0e 0x06 0x80 0x00 0x39 0x80 0xd9 , 11)
avrdude: Send: . [1b] . [f6] . [00] . [05] . [0e] . [06] . [80] . [00] 9 [39] . [80] . [d9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f6] 
0xf6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e7] 
0xe7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd3 , 10)
avrdude: Send: . [1b] . [f7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f7] 
0xf7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [06] 
0x06 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [17] 
0x17 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: Q [51] 
0x51 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: a [61] 
0x61 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: q [71] 
0x71 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [bf] 
0xbf avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ac] 
0xac 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,29696,256)
block_size at addr 29696 is 256
STK500V2: stk500v2_loadaddr(-2147468800)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x3a 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf8 0x00 0x05 0x0e 0x06 0x80 0x00 0x3a 0x00 0x54 , 11)
avrdude: Send: . [1b] . [f8] . [00] . [05] . [0e] . [06] . [80] . [00] : [3a] . [00] T [54] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f8] 
0xf8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e9] 
0xe9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdd , 10)
avrdude: Send: . [1b] . [f9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [dd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f9] 
0xf9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [ff] 
0xff avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [de] 
0xde avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [db] 
0xdb avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [99] 
0x99 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,29952,256)
block_size at addr 29952 is 256
STK500V2: stk500v2_loadaddr(-2147468672)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x3a 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xfa 0x00 0x05 0x0e 0x06 0x80 0x00 0x3a 0x80 0xd6 , 11)
avrdude: Send: . [1b] . [fa] . [00] . [05] . [0e] . [06] . [80] . [00] : [3a] . [80] . [d6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fa] 
0xfa hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [eb] 
0xeb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xfb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdf , 10)
avrdude: Send: . [1b] . [fb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [df] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fb] 
0xfb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [90] 
0x90 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [90] 
0x90 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [13] 
0x13 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [15] 
0x15 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [ef] 
0xef avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [ee] 
0xee avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [10] 
0x10 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [17] 
0x17 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [07] 
0x07 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [07] 
0x07 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [99] 
0x99 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [10] 
0x10 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [10] 
0x10 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b0] 
0xb0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,30208,256)
block_size at addr 30208 is 256
STK500V2: stk500v2_loadaddr(-2147468544)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x3b 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xfc 0x00 0x05 0x0e 0x06 0x80 0x00 0x3b 0x00 0x51 , 11)
avrdude: Send: . [1b] . [fc] . [00] . [05] . [0e] . [06] . [80] . [00] ; [3b] . [00] Q [51] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fc] 
0xfc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ed] 
0xed 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xfd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd9 , 10)
avrdude: Send: . [1b] . [fd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fd] 
0xfd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [ee] 
0xee avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [16] 
0x16 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [06] 
0x06 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [06] 
0x06 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [16] 
0x16 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [06] 
0x06 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [06] 
0x06 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [81] 
0x81 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [81] 
0x81 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [81] 
0x81 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [81] 
0x81 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: V [56] 
0x56 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [05] 
0x05 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [15] 
0x15 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,30464,256)
block_size at addr 30464 is 256
STK500V2: stk500v2_loadaddr(-2147468416)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x3b 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xfe 0x00 0x05 0x0e 0x06 0x80 0x00 0x3b 0x80 0xd3 , 11)
avrdude: Send: . [1b] . [fe] . [00] . [05] . [0e] . [06] . [80] . [00] ; [3b] . [80] . [d3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fe] 
0xfe hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ef] 
0xef 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xff 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdb , 10)
avrdude: Send: . [1b] . [ff] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [db] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ff] 
0xff hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [de] 
0xde avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [12] 
0x12 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ea] 
0xea avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: t [74] 
0x74 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [ea] 
0xea avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [13] 
0x13 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [03] 
0x03 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [15] 
0x15 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: S [53] 
0x53 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ea] 
0xea avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [fc] 
0xfc avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [ce] 
0xce avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,30720,256)
block_size at addr 30720 is 256
STK500V2: stk500v2_loadaddr(-2147468288)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x3c 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x00 0x00 0x05 0x0e 0x06 0x80 0x00 0x3c 0x00 0xaa , 11)
avrdude: Send: . [1b] . [00] . [00] . [05] . [0e] . [06] . [80] . [00] < [3c] . [00] . [aa] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [00] 
0x00 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x01 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x25 , 10)
avrdude: Send: . [1b] . [01] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] % [25] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [01] 
0x01 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [cf] 
0xcf avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [15] 
0x15 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [05] 
0x05 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [ea] 
0xea avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [db] 
0xdb avrdude: Recv: d [64] 
0x64 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [9e] 
0x9e avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [ea] 
0xea avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a0] 
0xa0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,30976,256)
block_size at addr 30976 is 256
STK500V2: stk500v2_loadaddr(-2147468160)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x3c 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x02 0x00 0x05 0x0e 0x06 0x80 0x00 0x3c 0x80 0x28 , 11)
avrdude: Send: . [1b] . [02] . [00] . [05] . [0e] . [06] . [80] . [00] < [3c] . [80] ( [28] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [02] 
0x02 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [13] 
0x13 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x03 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x27 , 10)
avrdude: Send: . [1b] . [03] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ' [27] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [03] 
0x03 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: i [69] 
0x69 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [da] 
0xda avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [cd] 
0xcd avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [9c] 
0x9c avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [cd] 
0xcd avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [03] 
0x03 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [cd] 
0xcd avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [13] 
0x13 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [13] 
0x13 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ea] 
0xea avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [fc] 
0xfc avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [9b] 
0x9b avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ea] 
0xea avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [fc] 
0xfc avrdude: Recv: O [4f] 
0x4f avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [15] 
0x15 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [10] 
0x10 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ee] 
0xee avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: $ [24] 
0x24 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,31232,256)
block_size at addr 31232 is 256
STK500V2: stk500v2_loadaddr(-2147468032)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x3d 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x04 0x00 0x05 0x0e 0x06 0x80 0x00 0x3d 0x00 0xaf , 11)
avrdude: Send: . [1b] . [04] . [00] . [05] . [0e] . [06] . [80] . [00] = [3d] . [00] . [af] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [04] 
0x04 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [15] 
0x15 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x05 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x21 , 10)
avrdude: Send: . [1b] . [05] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ! [21] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [05] 
0x05 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [15] 
0x15 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [11] 
0x11 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [da] 
0xda avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [df] 
0xdf avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [8d] 
0x8d avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv: = [3d] 
0x3d 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,31488,256)
block_size at addr 31488 is 256
STK500V2: stk500v2_loadaddr(-2147467904)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x3d 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x06 0x00 0x05 0x0e 0x06 0x80 0x00 0x3d 0x80 0x2d , 11)
avrdude: Send: . [1b] . [06] . [00] . [05] . [0e] . [06] . [80] . [00] = [3d] . [80] - [2d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [06] 
0x06 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [17] 
0x17 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x07 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x23 , 10)
avrdude: Send: . [1b] . [07] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] # [23] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [07] 
0x07 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [15] 
0x15 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [ec] 
0xec avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [ec] 
0xec avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [ec] 
0xec avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [cf] 
0xcf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [cc] 
0xcc avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [dc] 
0xdc avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8c] 
0x8c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,31744,256)
block_size at addr 31744 is 256
STK500V2: stk500v2_loadaddr(-2147467776)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x3e 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x08 0x00 0x05 0x0e 0x06 0x80 0x00 0x3e 0x00 0xa0 , 11)
avrdude: Send: . [1b] . [08] . [00] . [05] . [0e] . [06] . [80] . [00] > [3e] . [00] . [a0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [08] 
0x08 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [19] 
0x19 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x09 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2d , 10)
avrdude: Send: . [1b] . [09] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] - [2d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [09] 
0x09 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [93] 
0x93 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [17] 
0x17 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [ef] 
0xef avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [ae] 
0xae avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [01] 
0x01 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0a] 
0x0a avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [af] 
0xaf avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [97] 
0x97 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [0a] 
0x0a avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [91] 
0x91 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,32000,256)
block_size at addr 32000 is 256
STK500V2: stk500v2_loadaddr(-2147467648)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x3e 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x0a 0x00 0x05 0x0e 0x06 0x80 0x00 0x3e 0x80 0x22 , 11)
avrdude: Send: . [1b] . [0a] . [00] . [05] . [0e] . [06] . [80] . [00] > [3e] . [80] " [22] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0a] 
0x0a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1b] 
0x1b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2f , 10)
avrdude: Send: . [1b] . [0b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] / [2f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0b] 
0x0b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [af] 
0xaf avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [97] 
0x97 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [af] 
0xaf avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [97] 
0x97 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [91] 
0x91 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [af] 
0xaf avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [af] 
0xaf avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [96] 
0x96 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [ac] 
0xac avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [ac] 
0xac avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ac] 
0xac avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [97] 
0x97 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [96] 
0x96 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [97] 
0x97 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [96] 
0x96 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [97] 
0x97 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ef] 
0xef avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [90] 
0x90 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [96] 
0x96 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [08] 
0x08 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,32256,256)
block_size at addr 32256 is 256
STK500V2: stk500v2_loadaddr(-2147467520)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x3f 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x0c 0x00 0x05 0x0e 0x06 0x80 0x00 0x3f 0x00 0xa5 , 11)
avrdude: Send: . [1b] . [0c] . [00] . [05] . [0e] . [06] . [80] . [00] ? [3f] . [00] . [a5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0c] 
0x0c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1d] 
0x1d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x29 , 10)
avrdude: Send: . [1b] . [0d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ) [29] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0d] 
0x0d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [96] 
0x96 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [ac] 
0xac avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [ac] 
0xac avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [97] 
0x97 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [0a] 
0x0a avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0a] 
0x0a avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [96] 
0x96 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [ac] 
0xac avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [ac] 
0xac avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [97] 
0x97 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [0a] 
0x0a avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0a] 
0x0a avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [96] 
0x96 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [ac] 
0xac avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [ac] 
0xac avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ac] 
0xac avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [97] 
0x97 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [0a] 
0x0a avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [02] 
0x02 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [17] 
0x17 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [07] 
0x07 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [96] 
0x96 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [ac] 
0xac avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [ac] 
0xac avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ac] 
0xac avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [97] 
0x97 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [da] 
0xda avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: A [41] 
0x41 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: Q [51] 
0x51 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [ad] 
0xad avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cb] 
0xcb 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,32512,256)
block_size at addr 32512 is 256
STK500V2: stk500v2_loadaddr(-2147467392)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x3f 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x0e 0x00 0x05 0x0e 0x06 0x80 0x00 0x3f 0x80 0x27 , 11)
avrdude: Send: . [1b] . [0e] . [00] . [05] . [0e] . [06] . [80] . [00] ? [3f] . [80] ' [27] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0e] 
0x0e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1f] 
0x1f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2b , 10)
avrdude: Send: . [1b] . [0f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] + [2b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0f] 
0x0f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [96] 
0x96 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [ac] 
0xac avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [ac] 
0xac avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ac] 
0xac avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [97] 
0x97 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [da] 
0xda avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: A [41] 
0x41 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: Q [51] 
0x51 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [18] 
0x18 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [12] 
0x12 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [14] 
0x14 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [18] 
0x18 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: = [3d] 
0x3d avrdude: Recv: O [4f] 
0x4f avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: n [6e] 
0x6e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,32768,256)
block_size at addr 32768 is 256
STK500V2: stk500v2_loadaddr(-2147467264)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x40 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x10 0x00 0x05 0x0e 0x06 0x80 0x00 0x40 0x00 0xc6 , 11)
avrdude: Send: . [1b] . [10] . [00] . [05] . [0e] . [06] . [80] . [00] @ [40] . [00] . [c6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [10] 
0x10 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x11 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x35 , 10)
avrdude: Send: . [1b] . [11] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 5 [35] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [11] 
0x11 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [ab] 
0xab avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: D [44] 
0x44 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: U [55] 
0x55 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [01] 
0x01 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [19] 
0x19 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [09] 
0x09 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [09] 
0x09 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [af] 
0xaf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [95] 
0x95 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: / [2f] 
0x2f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [2e] 
0x2e avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [ac] 
0xac avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [dd] 
0xdd 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,33024,256)
block_size at addr 33024 is 256
STK500V2: stk500v2_loadaddr(-2147467136)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x40 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x12 0x00 0x05 0x0e 0x06 0x80 0x00 0x40 0x80 0x44 , 11)
avrdude: Send: . [1b] . [12] . [00] . [05] . [0e] . [06] . [80] . [00] @ [40] . [80] D [44] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [12] 
0x12 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x13 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x37 , 10)
avrdude: Send: . [1b] . [13] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 7 [37] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [13] 
0x13 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [17] 
0x17 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [07] 
0x07 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [07] 
0x07 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [eb] 
0xeb avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [af] 
0xaf avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [be] 
0xbe avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [bf] 
0xbf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [93] 
0x93 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [ac] 
0xac avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: E [45] 
0x45 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: F [46] 
0x46 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: G [47] 
0x47 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8a] 
0x8a avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8a] 
0x8a avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: + [2b] 
0x2b avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [ac] 
0xac avrdude: Recv: E [45] 
0x45 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: F [46] 
0x46 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: G [47] 
0x47 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e6] 
0xe6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,33280,256)
block_size at addr 33280 is 256
STK500V2: stk500v2_loadaddr(-2147467008)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x41 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x14 0x00 0x05 0x0e 0x06 0x80 0x00 0x41 0x00 0xc3 , 11)
avrdude: Send: . [1b] . [14] . [00] . [05] . [0e] . [06] . [80] . [00] A [41] . [00] . [c3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [14] 
0x14 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [05] 
0x05 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x15 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x31 , 10)
avrdude: Send: . [1b] . [15] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 1 [31] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [15] 
0x15 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [ac] 
0xac avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0a] 
0x0a avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: c [63] 
0x63 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [92] 
0x92 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [ab] 
0xab avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [05] 
0x05 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [05] 
0x05 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [af] 
0xaf avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [af] 
0xaf avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [8b] 
0x8b avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [05] 
0x05 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [05] 
0x05 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [8b] 
0x8b avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [05] 
0x05 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [8f] 
0x8f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [05] 
0x05 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [05] 
0x05 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,33536,256)
block_size at addr 33536 is 256
STK500V2: stk500v2_loadaddr(-2147466880)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x41 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x16 0x00 0x05 0x0e 0x06 0x80 0x00 0x41 0x80 0x41 , 11)
avrdude: Send: . [1b] . [16] . [00] . [05] . [0e] . [06] . [80] . [00] A [41] . [80] A [41] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [16] 
0x16 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [07] 
0x07 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x17 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x33 , 10)
avrdude: Send: . [1b] . [17] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 3 [33] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [17] 
0x17 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [90] 
0x90 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [ad] 
0xad avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [ad] 
0xad avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [ad] 
0xad avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [87] 
0x87 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [85] 
0x85 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [85] 
0x85 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [89] 
0x89 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [af] 
0xaf avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [af] 
0xaf avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [97] 
0x97 avrdude: Recv: # [23] 
0x23 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: R [52] 
0x52 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [82] 
0x82 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [86] 
0x86 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c9] 
0xc9 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,33792,256)
block_size at addr 33792 is 256
STK500V2: stk500v2_loadaddr(-2147466752)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x42 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x18 0x00 0x05 0x0e 0x06 0x80 0x00 0x42 0x00 0xcc , 11)
avrdude: Send: . [1b] . [18] . [00] . [05] . [0e] . [06] . [80] . [00] B [42] . [00] . [cc] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [18] 
0x18 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [09] 
0x09 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x19 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3d , 10)
avrdude: Send: . [1b] . [19] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] = [3d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [19] 
0x19 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [09] 
0x09 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [96] 
0x96 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [90] 
0x90 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [90] 
0x90 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [90] 
0x90 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [90] 
0x90 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [97] 
0x97 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [96] 
0x96 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [ae] 
0xae avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [ae] 
0xae avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ae] 
0xae avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [af] 
0xaf avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [af] 
0xaf avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [83] 
0x83 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [83] 
0x83 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [ab] 
0xab avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [af] 
0xaf avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [af] 
0xaf avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [ab] 
0xab avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [af] 
0xaf avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bc] 
0xbc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,34048,256)
block_size at addr 34048 is 256
STK500V2: stk500v2_loadaddr(-2147466624)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x42 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x1a 0x00 0x05 0x0e 0x06 0x80 0x00 0x42 0x80 0x4e , 11)
avrdude: Send: . [1b] . [1a] . [00] . [05] . [0e] . [06] . [80] . [00] B [42] . [80] N [4e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1a] 
0x1a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0b] 
0x0b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3f , 10)
avrdude: Send: . [1b] . [1b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ? [3f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1b] 
0x1b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [af] 
0xaf avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [ac] 
0xac avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [ac] 
0xac avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [96] 
0x96 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ae] 
0xae avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ae] 
0xae avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [97] 
0x97 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [ad] 
0xad avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [97] 
0x97 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [91] 
0x91 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [af] 
0xaf avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ad] 
0xad avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [97] 
0x97 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [93] 
0x93 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [af] 
0xaf avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [97] 
0x97 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [ad] 
0xad avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [97] 
0x97 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [90] 
0x90 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [90] 
0x90 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [90] 
0x90 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [90] 
0x90 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [af] 
0xaf avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [96] 
0x96 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ac] 
0xac avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [97] 
0x97 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [14] 
0x14 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [91] 
0x91 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [93] 
0x93 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 8 [38] 
0x38 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,34304,256)
block_size at addr 34304 is 256
STK500V2: stk500v2_loadaddr(-2147466496)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x43 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x1c 0x00 0x05 0x0e 0x06 0x80 0x00 0x43 0x00 0xc9 , 11)
avrdude: Send: . [1b] . [1c] . [00] . [05] . [0e] . [06] . [80] . [00] C [43] . [00] . [c9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1c] 
0x1c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0d] 
0x0d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x39 , 10)
avrdude: Send: . [1b] . [1d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 9 [39] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1d] 
0x1d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [06] 
0x06 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [09] 
0x09 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: O [4f] 
0x4f avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [ad] 
0xad avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [96] 
0x96 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [93] 
0x93 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ad] 
0xad avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [ad] 
0xad avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ad] 
0xad avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [83] 
0x83 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [83] 
0x83 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [ad] 
0xad avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [ac] 
0xac avrdude: Recv: E [45] 
0x45 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: F [46] 
0x46 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: G [47] 
0x47 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [05] 
0x05 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [05] 
0x05 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [05] 
0x05 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [96] 
0x96 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,34560,256)
block_size at addr 34560 is 256
STK500V2: stk500v2_loadaddr(-2147466368)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x43 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x1e 0x00 0x05 0x0e 0x06 0x80 0x00 0x43 0x80 0x4b , 11)
avrdude: Send: . [1b] . [1e] . [00] . [05] . [0e] . [06] . [80] . [00] C [43] . [80] K [4b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1e] 
0x1e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3b , 10)
avrdude: Send: . [1b] . [1f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ; [3b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1f] 
0x1f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [05] 
0x05 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [09] 
0x09 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ed] 
0xed avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [ff] 
0xff avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [af] 
0xaf avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [af] 
0xaf avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [96] 
0x96 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [93] 
0x93 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [93] 
0x93 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [97] 
0x97 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [19] 
0x19 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,34816,256)
block_size at addr 34816 is 256
STK500V2: stk500v2_loadaddr(-2147466240)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x44 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x20 0x00 0x05 0x0e 0x06 0x80 0x00 0x44 0x00 0xf2 , 11)
avrdude: Send: . [1b]   [20] . [00] . [05] . [0e] . [06] . [80] . [00] D [44] . [00] . [f2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv:   [20] 
0x20 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 1 [31] 
0x31 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x21 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x05 , 10)
avrdude: Send: . [1b] ! [21] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [05] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ! [21] 
0x21 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [ab] 
0xab avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ab] 
0xab avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [80] 
0x80 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [80] 
0x80 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [80] 
0x80 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [96] 
0x96 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [ae] 
0xae avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [ae] 
0xae avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ae] 
0xae avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [af] 
0xaf avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [97] 
0x97 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [1c] 
0x1c avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [af] 
0xaf avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [97] 
0x97 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [ac] 
0xac avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [ac] 
0xac avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [90] 
0x90 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ad] 
0xad avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [af] 
0xaf avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [14] 
0x14 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [ac] 
0xac avrdude: Recv: D [44] 
0x44 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: c [63] 
0x63 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: r [72] 
0x72 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f2] 
0xf2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,35072,256)
block_size at addr 35072 is 256
STK500V2: stk500v2_loadaddr(-2147466112)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x44 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x22 0x00 0x05 0x0e 0x06 0x80 0x00 0x44 0x80 0x70 , 11)
avrdude: Send: . [1b] " [22] . [00] . [05] . [0e] . [06] . [80] . [00] D [44] . [80] p [70] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: " [22] 
0x22 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 3 [33] 
0x33 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x23 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x07 , 10)
avrdude: Send: . [1b] # [23] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [07] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: # [23] 
0x23 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: c [63] 
0x63 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: r [72] 
0x72 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [af] 
0xaf avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [af] 
0xaf avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [97] 
0x97 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [af] 
0xaf avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [97] 
0x97 avrdude: Recv: A [41] 
0x41 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: Q [51] 
0x51 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [aa] 
0xaa avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [aa] 
0xaa avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [aa] 
0xaa avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [ae] 
0xae avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [ad] 
0xad avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [97] 
0x97 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [91] 
0x91 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [af] 
0xaf avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [97] 
0x97 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [ad] 
0xad avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [af] 
0xaf avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [ac] 
0xac avrdude: Recv: D [44] 
0x44 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [c4] 
0xc4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [01] 
0x01 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [00] 
0x00 avrdude: Recv: / [2f] 
0x2f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,35328,256)
block_size at addr 35328 is 256
STK500V2: stk500v2_loadaddr(-2147465984)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x45 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x24 0x00 0x05 0x0e 0x06 0x80 0x00 0x45 0x00 0xf7 , 11)
avrdude: Send: . [1b] $ [24] . [00] . [05] . [0e] . [06] . [80] . [00] E [45] . [00] . [f7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: $ [24] 
0x24 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 5 [35] 
0x35 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x25 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x01 , 10)
avrdude: Send: . [1b] % [25] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [01] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: % [25] 
0x25 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [ad] 
0xad avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [90] 
0x90 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [af] 
0xaf avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [ab] 
0xab avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [bf] 
0xbf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ac] 
0xac avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ac] 
0xac avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [ac] 
0xac avrdude: Recv: U [55] 
0x55 avrdude: Recv:   [20] 
0x20 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [ad] 
0xad avrdude: Recv: c [63] 
0x63 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: r [72] 
0x72 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [ea] 
0xea avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: c [63] 
0x63 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: r [72] 
0x72 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [0a] 
0x0a avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [0a] 
0x0a avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: U [55] 
0x55 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: O [4f] 
0x4f avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [01] 
0x01 avrdude: Recv: # [23] 
0x23 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: c [63] 
0x63 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: r [72] 
0x72 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [96] 
0x96 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [93] 
0x93 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ed] 
0xed 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,35584,256)
block_size at addr 35584 is 256
STK500V2: stk500v2_loadaddr(-2147465856)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x45 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x26 0x00 0x05 0x0e 0x06 0x80 0x00 0x45 0x80 0x75 , 11)
avrdude: Send: . [1b] & [26] . [00] . [05] . [0e] . [06] . [80] . [00] E [45] . [80] u [75] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: & [26] 
0x26 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 7 [37] 
0x37 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x27 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x03 , 10)
avrdude: Send: . [1b] ' [27] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [03] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ' [27] 
0x27 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [ad] 
0xad avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [90] 
0x90 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ad] 
0xad avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [ad] 
0xad avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ad] 
0xad avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [ad] 
0xad avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [18] 
0x18 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [96] 
0x96 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [ac] 
0xac avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [ac] 
0xac avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ac] 
0xac avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [97] 
0x97 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [92] 
0x92 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [92] 
0x92 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [92] 
0x92 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [92] 
0x92 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [96] 
0x96 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [ac] 
0xac avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [ac] 
0xac avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [97] 
0x97 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [96] 
0x96 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [ac] 
0xac avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [ac] 
0xac avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [97] 
0x97 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [96] 
0x96 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [ac] 
0xac avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [ac] 
0xac avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [97] 
0x97 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ec] 
0xec 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,35840,256)
block_size at addr 35840 is 256
STK500V2: stk500v2_loadaddr(-2147465728)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x46 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x28 0x00 0x05 0x0e 0x06 0x80 0x00 0x46 0x00 0xf8 , 11)
avrdude: Send: . [1b] ( [28] . [00] . [05] . [0e] . [06] . [80] . [00] F [46] . [00] . [f8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ( [28] 
0x28 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 9 [39] 
0x39 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x29 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0d , 10)
avrdude: Send: . [1b] ) [29] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ) [29] 
0x29 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [ac] 
0xac avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [ac] 
0xac avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ac] 
0xac avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [97] 
0x97 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [90] 
0x90 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: A [41] 
0x41 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: Q [51] 
0x51 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: q [71] 
0x71 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: a [61] 
0x61 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [cb] 
0xcb avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1f] 
0x1f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,36096,256)
block_size at addr 36096 is 256
STK500V2: stk500v2_loadaddr(-2147465600)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x46 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x2a 0x00 0x05 0x0e 0x06 0x80 0x00 0x46 0x80 0x7a , 11)
avrdude: Send: . [1b] * [2a] . [00] . [05] . [0e] . [06] . [80] . [00] F [46] . [80] z [7a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: * [2a] 
0x2a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ; [3b] 
0x3b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0f , 10)
avrdude: Send: . [1b] + [2b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: + [2b] 
0x2b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [01] 
0x01 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [04] 
0x04 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8a] 
0x8a avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8a] 
0x8a avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [cc] 
0xcc avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [05] 
0x05 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [05] 
0x05 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [05] 
0x05 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [05] 
0x05 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [05] 
0x05 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,36352,256)
block_size at addr 36352 is 256
STK500V2: stk500v2_loadaddr(-2147465472)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x47 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x2c 0x00 0x05 0x0e 0x06 0x80 0x00 0x47 0x00 0xfd , 11)
avrdude: Send: . [1b] , [2c] . [00] . [05] . [0e] . [06] . [80] . [00] G [47] . [00] . [fd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: , [2c] 
0x2c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: = [3d] 
0x3d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x09 , 10)
avrdude: Send: . [1b] - [2d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [09] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: - [2d] 
0x2d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [05] 
0x05 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [cc] 
0xcc avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [05] 
0x05 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [15] 
0x15 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [16] 
0x16 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [06] 
0x06 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [06] 
0x06 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [01] 
0x01 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [05] 
0x05 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [15] 
0x15 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [cc] 
0xcc avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [16] 
0x16 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [06] 
0x06 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [06] 
0x06 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [01] 
0x01 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [05] 
0x05 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [15] 
0x15 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [cc] 
0xcc avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [16] 
0x16 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [06] 
0x06 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [06] 
0x06 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [01] 
0x01 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [cc] 
0xcc avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a9] 
0xa9 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,36608,256)
block_size at addr 36608 is 256
STK500V2: stk500v2_loadaddr(-2147465344)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x47 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x2e 0x00 0x05 0x0e 0x06 0x80 0x00 0x47 0x80 0x7f , 11)
avrdude: Send: . [1b] . [2e] . [00] . [05] . [0e] . [06] . [80] . [00] G [47] . [80] . [7f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [2e] 
0x2e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ? [3f] 
0x3f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0b , 10)
avrdude: Send: . [1b] / [2f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: / [2f] 
0x2f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [05] 
0x05 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [15] 
0x15 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [16] 
0x16 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [06] 
0x06 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [06] 
0x06 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [01] 
0x01 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [05] 
0x05 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [15] 
0x15 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [14] 
0x14 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [04] 
0x04 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [04] 
0x04 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [05] 
0x05 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [15] 
0x15 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c4] 
0xc4 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,36864,256)
block_size at addr 36864 is 256
STK500V2: stk500v2_loadaddr(-2147465216)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x48 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x30 0x00 0x05 0x0e 0x06 0x80 0x00 0x48 0x00 0xee , 11)
avrdude: Send: . [1b] 0 [30] . [00] . [05] . [0e] . [06] . [80] . [00] H [48] . [00] . [ee] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 0 [30] 
0x30 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ! [21] 
0x21 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x31 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x15 , 10)
avrdude: Send: . [1b] 1 [31] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [15] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 1 [31] 
0x31 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [14] 
0x14 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [04] 
0x04 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [04] 
0x04 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [05] 
0x05 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [15] 
0x15 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: s [73] 
0x73 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,37120,256)
block_size at addr 37120 is 256
STK500V2: stk500v2_loadaddr(-2147465088)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x48 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x32 0x00 0x05 0x0e 0x06 0x80 0x00 0x48 0x80 0x6c , 11)
avrdude: Send: . [1b] 2 [32] . [00] . [05] . [0e] . [06] . [80] . [00] H [48] . [80] l [6c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 2 [32] 
0x32 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: # [23] 
0x23 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x33 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x17 , 10)
avrdude: Send: . [1b] 3 [33] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [17] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 3 [33] 
0x33 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [05] 
0x05 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [15] 
0x15 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [ff] 
0xff avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: c [63] 
0x63 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: r [72] 
0x72 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [ab] 
0xab avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [ab] 
0xab avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [ab] 
0xab avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [ab] 
0xab avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [07] 
0x07 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,37376,256)
block_size at addr 37376 is 256
STK500V2: stk500v2_loadaddr(-2147464960)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x49 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x34 0x00 0x05 0x0e 0x06 0x80 0x00 0x49 0x00 0xeb , 11)
avrdude: Send: . [1b] 4 [34] . [00] . [05] . [0e] . [06] . [80] . [00] I [49] . [00] . [eb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 4 [34] 
0x34 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: % [25] 
0x25 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x35 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x11 , 10)
avrdude: Send: . [1b] 5 [35] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [11] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 5 [35] 
0x35 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [ab] 
0xab avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [cb] 
0xcb avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [01] 
0x01 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [cb] 
0xcb avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [cc] 
0xcc avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: e [65] 
0x65 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: q [71] 
0x71 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [09] 
0x09 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [96] 
0x96 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [97] 
0x97 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [96] 
0x96 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [97] 
0x97 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [96] 
0x96 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [97] 
0x97 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [96] 
0x96 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [97] 
0x97 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [96] 
0x96 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [90] 
0x90 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [90] 
0x90 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [90] 
0x90 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b0] 
0xb0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,37632,256)
block_size at addr 37632 is 256
STK500V2: stk500v2_loadaddr(-2147464832)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x49 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x36 0x00 0x05 0x0e 0x06 0x80 0x00 0x49 0x80 0x69 , 11)
avrdude: Send: . [1b] 6 [36] . [00] . [05] . [0e] . [06] . [80] . [00] I [49] . [80] i [69] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 6 [36] 
0x36 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ' [27] 
0x27 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x37 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x13 , 10)
avrdude: Send: . [1b] 7 [37] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [13] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 7 [37] 
0x37 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [14] 
0x14 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [90] 
0x90 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [86] 
0x86 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [01] 
0x01 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [09] 
0x09 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: F [46] 
0x46 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [09] 
0x09 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [96] 
0x96 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [91] 
0x91 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [00] 
0x00 avrdude: Recv: Q [51] 
0x51 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,37888,256)
block_size at addr 37888 is 256
STK500V2: stk500v2_loadaddr(-2147464704)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x4a 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x38 0x00 0x05 0x0e 0x06 0x80 0x00 0x4a 0x00 0xe4 , 11)
avrdude: Send: . [1b] 8 [38] . [00] . [05] . [0e] . [06] . [80] . [00] J [4a] . [00] . [e4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 8 [38] 
0x38 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ) [29] 
0x29 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x39 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1d , 10)
avrdude: Send: . [1b] 9 [39] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 9 [39] 
0x39 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: F [46] 
0x46 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [81] 
0x81 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [01] 
0x01 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: - [2d] 
0x2d avrdude: Recv: { [7b] 
0x7b avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [8a] 
0x8a avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [99] 
0x99 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [83] 
0x83 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: G [47] 
0x47 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: V [56] 
0x56 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [01] 
0x01 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [93] 
0x93 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: , [2c] 
0x2c avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: , [2c] 
0x2c avrdude: Recv: J [4a] 
0x4a avrdude: Recv: , [2c] 
0x2c avrdude: Recv: Y [59] 
0x59 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: , [2c] 
0x2c avrdude: Recv: i [69] 
0x69 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: F [46] 
0x46 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [96] 
0x96 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [91] 
0x91 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [ec] 
0xec avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [ec] 
0xec avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [83] 
0x83 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: x [78] 
0x78 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,38144,256)
block_size at addr 38144 is 256
STK500V2: stk500v2_loadaddr(-2147464576)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x4a 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x3a 0x00 0x05 0x0e 0x06 0x80 0x00 0x4a 0x80 0x66 , 11)
avrdude: Send: . [1b] : [3a] . [00] . [05] . [0e] . [06] . [80] . [00] J [4a] . [80] f [66] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: : [3a] 
0x3a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: + [2b] 
0x2b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1f , 10)
avrdude: Send: . [1b] ; [3b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ; [3b] 
0x3b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [96] 
0x96 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: & [26] 
0x26 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: H [48] 
0x48 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: Y [59] 
0x59 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: - [2d] 
0x2d avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: I [49] 
0x49 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: F [46] 
0x46 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1d] 
0x1d 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,38400,256)
block_size at addr 38400 is 256
STK500V2: stk500v2_loadaddr(-2147464448)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x4b 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x3c 0x00 0x05 0x0e 0x06 0x80 0x00 0x4b 0x00 0xe1 , 11)
avrdude: Send: . [1b] < [3c] . [00] . [05] . [0e] . [06] . [80] . [00] K [4b] . [00] . [e1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: < [3c] 
0x3c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: - [2d] 
0x2d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x19 , 10)
avrdude: Send: . [1b] = [3d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [19] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: = [3d] 
0x3d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [8e] 
0x8e avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [98] 
0x98 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [ba] 
0xba avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [96] 
0x96 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [90] 
0x90 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [90] 
0x90 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [90] 
0x90 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [97] 
0x97 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [80] 
0x80 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [80] 
0x80 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [80] 
0x80 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [96] 
0x96 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: F [46] 
0x46 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [85] 
0x85 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [85] 
0x85 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [85] 
0x85 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [81] 
0x81 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [ce] 
0xce avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [92] 
0x92 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,38656,256)
block_size at addr 38656 is 256
STK500V2: stk500v2_loadaddr(-2147464320)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x4b 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x3e 0x00 0x05 0x0e 0x06 0x80 0x00 0x4b 0x80 0x63 , 11)
avrdude: Send: . [1b] > [3e] . [00] . [05] . [0e] . [06] . [80] . [00] K [4b] . [80] c [63] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: > [3e] 
0x3e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: / [2f] 
0x2f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1b , 10)
avrdude: Send: . [1b] ? [3f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ? [3f] 
0x3f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [92] 
0x92 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [df] 
0xdf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [01] 
0x01 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [85] 
0x85 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [06] 
0x06 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [15] 
0x15 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ce] 
0xce avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [91] 
0x91 avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: o [6f] 
0x6f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [04] 
0x04 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [10] 
0x10 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [db] 
0xdb avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [11] 
0x11 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,38912,256)
block_size at addr 38912 is 256
STK500V2: stk500v2_loadaddr(-2147464192)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x4c 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x40 0x00 0x05 0x0e 0x06 0x80 0x00 0x4c 0x00 0x9a , 11)
avrdude: Send: . [1b] @ [40] . [00] . [05] . [0e] . [06] . [80] . [00] L [4c] . [00] . [9a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: @ [40] 
0x40 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Q [51] 
0x51 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x41 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x65 , 10)
avrdude: Send: . [1b] A [41] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] e [65] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: A [41] 
0x41 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [11] 
0x11 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [cf] 
0xcf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: , [2c] 
0x2c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [de] 
0xde avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [01] 
0x01 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b5] 
0xb5 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,39168,256)
block_size at addr 39168 is 256
STK500V2: stk500v2_loadaddr(-2147464064)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x4c 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x42 0x00 0x05 0x0e 0x06 0x80 0x00 0x4c 0x80 0x18 , 11)
avrdude: Send: . [1b] B [42] . [00] . [05] . [0e] . [06] . [80] . [00] L [4c] . [80] . [18] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: B [42] 
0x42 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: S [53] 
0x53 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x43 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x67 , 10)
avrdude: Send: . [1b] C [43] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] g [67] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: C [43] 
0x43 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ef] 
0xef avrdude: Recv: i [69] 
0x69 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [06] 
0x06 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [14] 
0x14 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [ee] 
0xee avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [18] 
0x18 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [18] 
0x18 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8c] 
0x8c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: D [44] 
0x44 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: G [47] 
0x47 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [99] 
0x99 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,39424,256)
block_size at addr 39424 is 256
STK500V2: stk500v2_loadaddr(-2147463936)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x4d 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x44 0x00 0x05 0x0e 0x06 0x80 0x00 0x4d 0x00 0x9f , 11)
avrdude: Send: . [1b] D [44] . [00] . [05] . [0e] . [06] . [80] . [00] M [4d] . [00] . [9f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: D [44] 
0x44 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: U [55] 
0x55 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x45 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x61 , 10)
avrdude: Send: . [1b] E [45] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] a [61] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: E [45] 
0x45 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [ad] 
0xad avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: A [41] 
0x41 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: - [2d] 
0x2d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [98] 
0x98 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [81] 
0x81 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [81] 
0x81 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [81] 
0x81 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: # [23] 
0x23 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fa] 
0xfa 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,39680,256)
block_size at addr 39680 is 256
STK500V2: stk500v2_loadaddr(-2147463808)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x4d 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x46 0x00 0x05 0x0e 0x06 0x80 0x00 0x4d 0x80 0x1d , 11)
avrdude: Send: . [1b] F [46] . [00] . [05] . [0e] . [06] . [80] . [00] M [4d] . [80] . [1d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: F [46] 
0x46 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: W [57] 
0x57 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x47 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x63 , 10)
avrdude: Send: . [1b] G [47] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] c [63] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: G [47] 
0x47 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ae] 
0xae avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [91] 
0x91 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: P [50] 
0x50 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [09] 
0x09 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,39936,256)
block_size at addr 39936 is 256
STK500V2: stk500v2_loadaddr(-2147463680)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x4e 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x48 0x00 0x05 0x0e 0x06 0x80 0x00 0x4e 0x00 0x90 , 11)
avrdude: Send: . [1b] H [48] . [00] . [05] . [0e] . [06] . [80] . [00] N [4e] . [00] . [90] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: H [48] 
0x48 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Y [59] 
0x59 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x49 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6d , 10)
avrdude: Send: . [1b] I [49] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] m [6d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: I [49] 
0x49 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [83] 
0x83 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ^ [5e] 
0x5e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,40192,256)
block_size at addr 40192 is 256
STK500V2: stk500v2_loadaddr(-2147463552)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x4e 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x4a 0x00 0x05 0x0e 0x06 0x80 0x00 0x4e 0x80 0x12 , 11)
avrdude: Send: . [1b] J [4a] . [00] . [05] . [0e] . [06] . [80] . [00] N [4e] . [80] . [12] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: J [4a] 
0x4a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: [ [5b] 
0x5b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6f , 10)
avrdude: Send: . [1b] K [4b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] o [6f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: K [4b] 
0x4b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [83] 
0x83 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [de] 
0xde avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [83] 
0x83 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [83] 
0x83 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: = [3d] 
0x3d avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ef] 
0xef 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,40448,256)
block_size at addr 40448 is 256
STK500V2: stk500v2_loadaddr(-2147463424)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x4f 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x4c 0x00 0x05 0x0e 0x06 0x80 0x00 0x4f 0x00 0x95 , 11)
avrdude: Send: . [1b] L [4c] . [00] . [05] . [0e] . [06] . [80] . [00] O [4f] . [00] . [95] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: L [4c] 
0x4c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ] [5d] 
0x5d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x69 , 10)
avrdude: Send: . [1b] M [4d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] i [69] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: M [4d] 
0x4d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [0a] 
0x0a avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [10] 
0x10 avrdude: Recv: f [66] 
0x66 avrdude: Recv: P [50] 
0x50 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [95] 
0x95 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [af] 
0xaf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [10] 
0x10 avrdude: Recv: f [66] 
0x66 avrdude: Recv: P [50] 
0x50 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,40704,256)
block_size at addr 40704 is 256
STK500V2: stk500v2_loadaddr(-2147463296)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x4f 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x4e 0x00 0x05 0x0e 0x06 0x80 0x00 0x4f 0x80 0x17 , 11)
avrdude: Send: . [1b] N [4e] . [00] . [05] . [0e] . [06] . [80] . [00] O [4f] . [80] . [17] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: N [4e] 
0x4e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: _ [5f] 
0x5f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6b , 10)
avrdude: Send: . [1b] O [4f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] k [6b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: O [4f] 
0x4f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [af] 
0xaf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [10] 
0x10 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ae] 
0xae avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [91] 
0x91 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: P [50] 
0x50 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [09] 
0x09 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,40960,256)
block_size at addr 40960 is 256
STK500V2: stk500v2_loadaddr(-2147463168)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x50 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x50 0x00 0x05 0x0e 0x06 0x80 0x00 0x50 0x00 0x96 , 11)
avrdude: Send: . [1b] P [50] . [00] . [05] . [0e] . [06] . [80] . [00] P [50] . [00] . [96] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: P [50] 
0x50 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x51 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x75 , 10)
avrdude: Send: . [1b] Q [51] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] u [75] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Q [51] 
0x51 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ea] 
0xea avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ea] 
0xea avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [dd] 
0xdd avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [df] 
0xdf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,41216,256)
block_size at addr 41216 is 256
STK500V2: stk500v2_loadaddr(-2147463040)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x50 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x52 0x00 0x05 0x0e 0x06 0x80 0x00 0x50 0x80 0x14 , 11)
avrdude: Send: . [1b] R [52] . [00] . [05] . [0e] . [06] . [80] . [00] P [50] . [80] . [14] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: R [52] 
0x52 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: C [43] 
0x43 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x53 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x77 , 10)
avrdude: Send: . [1b] S [53] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] w [77] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: S [53] 
0x53 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ed] 
0xed avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [fe] 
0xfe avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0c] 
0x0c avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [98] 
0x98 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0a] 
0x0a avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [00] 
0x00 avrdude: Recv: k [6b] 
0x6b 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,41472,256)
block_size at addr 41472 is 256
STK500V2: stk500v2_loadaddr(-2147462912)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x51 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x54 0x00 0x05 0x0e 0x06 0x80 0x00 0x51 0x00 0x93 , 11)
avrdude: Send: . [1b] T [54] . [00] . [05] . [0e] . [06] . [80] . [00] Q [51] . [00] . [93] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: T [54] 
0x54 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x55 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x71 , 10)
avrdude: Send: . [1b] U [55] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] q [71] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: U [55] 
0x55 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [17] 
0x17 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [80] 
0x80 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: _ [5f] 
0x5f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,41728,256)
block_size at addr 41728 is 256
STK500V2: stk500v2_loadaddr(-2147462784)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x51 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x56 0x00 0x05 0x0e 0x06 0x80 0x00 0x51 0x80 0x11 , 11)
avrdude: Send: . [1b] V [56] . [00] . [05] . [0e] . [06] . [80] . [00] Q [51] . [80] . [11] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: V [56] 
0x56 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: G [47] 
0x47 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x57 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x73 , 10)
avrdude: Send: . [1b] W [57] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] s [73] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: W [57] 
0x57 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [06] 
0x06 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [07] 
0x07 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [de] 
0xde avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [07] 
0x07 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [ea] 
0xea avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [de] 
0xde avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [06] 
0x06 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [07] 
0x07 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [de] 
0xde avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [11] 
0x11 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [ea] 
0xea avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [de] 
0xde avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0a] 
0x0a avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: U [55] 
0x55 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,41984,256)
block_size at addr 41984 is 256
STK500V2: stk500v2_loadaddr(-2147462656)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x52 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x58 0x00 0x05 0x0e 0x06 0x80 0x00 0x52 0x00 0x9c , 11)
avrdude: Send: . [1b] X [58] . [00] . [05] . [0e] . [06] . [80] . [00] R [52] . [00] . [9c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: X [58] 
0x58 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: I [49] 
0x49 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x59 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7d , 10)
avrdude: Send: . [1b] Y [59] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] } [7d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Y [59] 
0x59 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [83] 
0x83 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [83] 
0x83 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [80] 
0x80 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [80] 
0x80 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [84] 
0x84 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [95] 
0x95 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [82] 
0x82 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f3] 
0xf3 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,42240,256)
block_size at addr 42240 is 256
STK500V2: stk500v2_loadaddr(-2147462528)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x52 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x5a 0x00 0x05 0x0e 0x06 0x80 0x00 0x52 0x80 0x1e , 11)
avrdude: Send: . [1b] Z [5a] . [00] . [05] . [0e] . [06] . [80] . [00] R [52] . [80] . [1e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Z [5a] 
0x5a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: K [4b] 
0x4b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7f , 10)
avrdude: Send: . [1b] [ [5b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [7f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: [ [5b] 
0x5b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [82] 
0x82 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: O [4f] 
0x4f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [81] 
0x81 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [81] 
0x81 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [84] 
0x84 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [95] 
0x95 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [df] 
0xdf 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,42496,256)
block_size at addr 42496 is 256
STK500V2: stk500v2_loadaddr(-2147462400)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x53 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x5c 0x00 0x05 0x0e 0x06 0x80 0x00 0x53 0x00 0x99 , 11)
avrdude: Send: . [1b] \ [5c] . [00] . [05] . [0e] . [06] . [80] . [00] S [53] . [00] . [99] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: \ [5c] 
0x5c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x79 , 10)
avrdude: Send: . [1b] ] [5d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] y [79] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ] [5d] 
0x5d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [83] 
0x83 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [ea] 
0xea avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [ec] 
0xec avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: a [61] 
0x61 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,42752,256)
block_size at addr 42752 is 256
STK500V2: stk500v2_loadaddr(-2147462272)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x53 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x5e 0x00 0x05 0x0e 0x06 0x80 0x00 0x53 0x80 0x1b , 11)
avrdude: Send: . [1b] ^ [5e] . [00] . [05] . [0e] . [06] . [80] . [00] S [53] . [80] . [1b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ^ [5e] 
0x5e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: O [4f] 
0x4f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7b , 10)
avrdude: Send: . [1b] _ [5f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] { [7b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: _ [5f] 
0x5f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [02] 
0x02 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [ed] 
0xed avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [ec] 
0xec avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [83] 
0x83 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [87] 
0x87 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [81] 
0x81 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [83] 
0x83 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [87] 
0x87 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [81] 
0x81 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: o [6f] 
0x6f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,43008,256)
block_size at addr 43008 is 256
STK500V2: stk500v2_loadaddr(-2147462144)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x54 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x60 0x00 0x05 0x0e 0x06 0x80 0x00 0x54 0x00 0xa2 , 11)
avrdude: Send: . [1b] ` [60] . [00] . [05] . [0e] . [06] . [80] . [00] T [54] . [00] . [a2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ` [60] 
0x60 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: q [71] 
0x71 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x61 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x45 , 10)
avrdude: Send: . [1b] a [61] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] E [45] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: a [61] 
0x61 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [83] 
0x83 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [87] 
0x87 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c2] 
0xc2 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [0a] 
0x0a avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [0a] 
0x0a avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [87] 
0x87 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [87] 
0x87 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [87] 
0x87 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [87] 
0x87 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [0b] 
0x0b avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [0b] 
0x0b avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [85] 
0x85 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [87] 
0x87 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [87] 
0x87 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [0a] 
0x0a avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [81] 
0x81 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [81] 
0x81 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: , [2c] 
0x2c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,43264,256)
block_size at addr 43264 is 256
STK500V2: stk500v2_loadaddr(-2147462016)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x54 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x62 0x00 0x05 0x0e 0x06 0x80 0x00 0x54 0x80 0x20 , 11)
avrdude: Send: . [1b] b [62] . [00] . [05] . [0e] . [06] . [80] . [00] T [54] . [80]   [20] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: b [62] 
0x62 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: s [73] 
0x73 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x63 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x47 , 10)
avrdude: Send: . [1b] c [63] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] G [47] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: c [63] 
0x63 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [85] 
0x85 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [0a] 
0x0a avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [ef] 
0xef avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ef] 
0xef 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,43520,256)
block_size at addr 43520 is 256
STK500V2: stk500v2_loadaddr(-2147461888)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x55 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x64 0x00 0x05 0x0e 0x06 0x80 0x00 0x55 0x00 0xa7 , 11)
avrdude: Send: . [1b] d [64] . [00] . [05] . [0e] . [06] . [80] . [00] U [55] . [00] . [a7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: d [64] 
0x64 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: u [75] 
0x75 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x65 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x41 , 10)
avrdude: Send: . [1b] e [65] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] A [41] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: e [65] 
0x65 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [ed] 
0xed avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [ee] 
0xee avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [db] 
0xdb avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [83] 
0x83 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [ef] 
0xef avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [ec] 
0xec avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [0a] 
0x0a avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [87] 
0x87 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [87] 
0x87 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [83] 
0x83 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [87] 
0x87 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [da] 
0xda 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,43776,256)
block_size at addr 43776 is 256
STK500V2: stk500v2_loadaddr(-2147461760)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x55 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x66 0x00 0x05 0x0e 0x06 0x80 0x00 0x55 0x80 0x25 , 11)
avrdude: Send: . [1b] f [66] . [00] . [05] . [0e] . [06] . [80] . [00] U [55] . [80] % [25] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: f [66] 
0x66 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: w [77] 
0x77 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x67 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x43 , 10)
avrdude: Send: . [1b] g [67] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] C [43] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: g [67] 
0x67 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [87] 
0x87 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [8b] 
0x8b avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [ed] 
0xed avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [ec] 
0xec avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [85] 
0x85 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [85] 
0x85 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [85] 
0x85 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [89] 
0x89 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [85] 
0x85 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [81] 
0x81 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c1] 
0xc1 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,44032,256)
block_size at addr 44032 is 256
STK500V2: stk500v2_loadaddr(-2147461632)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x56 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x68 0x00 0x05 0x0e 0x06 0x80 0x00 0x56 0x00 0xa8 , 11)
avrdude: Send: . [1b] h [68] . [00] . [05] . [0e] . [06] . [80] . [00] V [56] . [00] . [a8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: h [68] 
0x68 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: y [79] 
0x79 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x69 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4d , 10)
avrdude: Send: . [1b] i [69] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] M [4d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: i [69] 
0x69 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [81] 
0x81 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [85] 
0x85 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [0a] 
0x0a avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0a] 
0x0a avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [ee] 
0xee avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,44288,256)
block_size at addr 44288 is 256
STK500V2: stk500v2_loadaddr(-2147461504)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x56 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x6a 0x00 0x05 0x0e 0x06 0x80 0x00 0x56 0x80 0x2a , 11)
avrdude: Send: . [1b] j [6a] . [00] . [05] . [0e] . [06] . [80] . [00] V [56] . [80] * [2a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: j [6a] 
0x6a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: { [7b] 
0x7b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4f , 10)
avrdude: Send: . [1b] k [6b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] O [4f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: k [6b] 
0x6b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [01] 
0x01 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [86] 
0x86 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: O [4f] 
0x4f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [83] 
0x83 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [83] 
0x83 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [83] 
0x83 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [83] 
0x83 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [83] 
0x83 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fc] 
0xfc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,44544,256)
block_size at addr 44544 is 256
STK500V2: stk500v2_loadaddr(-2147461376)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x57 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x6c 0x00 0x05 0x0e 0x06 0x80 0x00 0x57 0x00 0xad , 11)
avrdude: Send: . [1b] l [6c] . [00] . [05] . [0e] . [06] . [80] . [00] W [57] . [00] . [ad] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: l [6c] 
0x6c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: } [7d] 
0x7d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x49 , 10)
avrdude: Send: . [1b] m [6d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] I [49] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: m [6d] 
0x6d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [97] 
0x97 avrdude: Recv: E [45] 
0x45 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [df] 
0xdf avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: $ [24] 
0x24 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [05] 
0x05 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [05] 
0x05 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: G [47] 
0x47 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [05] 
0x05 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [05] 
0x05 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: o [6f] 
0x6f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv: S [53] 
0x53 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,44800,256)
block_size at addr 44800 is 256
STK500V2: stk500v2_loadaddr(-2147461248)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x57 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x6e 0x00 0x05 0x0e 0x06 0x80 0x00 0x57 0x80 0x2f , 11)
avrdude: Send: . [1b] n [6e] . [00] . [05] . [0e] . [06] . [80] . [00] W [57] . [80] / [2f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: n [6e] 
0x6e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [7f] 
0x7f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4b , 10)
avrdude: Send: . [1b] o [6f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] K [4b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: o [6f] 
0x6f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [07] 
0x07 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [0b] 
0x0b avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [0b] 
0x0b avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [95] 
0x95 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [af] 
0xaf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [85] 
0x85 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [11] 
0x11 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [01] 
0x01 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8d] 
0x8d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,45056,256)
block_size at addr 45056 is 256
STK500V2: stk500v2_loadaddr(-2147461120)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x58 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x70 0x00 0x05 0x0e 0x06 0x80 0x00 0x58 0x00 0xbe , 11)
avrdude: Send: . [1b] p [70] . [00] . [05] . [0e] . [06] . [80] . [00] X [58] . [00] . [be] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: p [70] 
0x70 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: a [61] 
0x61 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x71 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x55 , 10)
avrdude: Send: . [1b] q [71] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] U [55] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: q [71] 
0x71 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8d] 
0x8d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [85] 
0x85 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [85] 
0x85 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv:   [20] 
0x20 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [81] 
0x81 avrdude: Recv:   [20] 
0x20 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [1b] 
0x1b avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1c] 
0x1c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,45312,256)
block_size at addr 45312 is 256
STK500V2: stk500v2_loadaddr(-2147460992)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x58 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x72 0x00 0x05 0x0e 0x06 0x80 0x00 0x58 0x80 0x3c , 11)
avrdude: Send: . [1b] r [72] . [00] . [05] . [0e] . [06] . [80] . [00] X [58] . [80] < [3c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: r [72] 
0x72 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: c [63] 
0x63 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x73 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x57 , 10)
avrdude: Send: . [1b] s [73] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] W [57] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: s [73] 
0x73 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8d] 
0x8d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [85] 
0x85 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [85] 
0x85 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8c] 
0x8c avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [84] 
0x84 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [01] 
0x01 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: P [50] 
0x50 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [83] 
0x83 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [93] 
0x93 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [e1] 
0xe1 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [84] 
0x84 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [85] 
0x85 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e4] 
0xe4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,45568,256)
block_size at addr 45568 is 256
STK500V2: stk500v2_loadaddr(-2147460864)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x59 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x74 0x00 0x05 0x0e 0x06 0x80 0x00 0x59 0x00 0xbb , 11)
avrdude: Send: . [1b] t [74] . [00] . [05] . [0e] . [06] . [80] . [00] Y [59] . [00] . [bb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: t [74] 
0x74 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: e [65] 
0x65 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x75 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x51 , 10)
avrdude: Send: . [1b] u [75] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] Q [51] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: u [75] 
0x75 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: " [22] 
0x22 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [84] 
0x84 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [82] 
0x82 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [89] 
0x89 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [dd] 
0xdd avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [87] 
0x87 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [82] 
0x82 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [93] 
0x93 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: A [41] 
0x41 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: Q [51] 
0x51 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [06] 
0x06 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [93] 
0x93 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ? [3f] 
0x3f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,45824,256)
block_size at addr 45824 is 256
STK500V2: stk500v2_loadaddr(-2147460736)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x59 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x76 0x00 0x05 0x0e 0x06 0x80 0x00 0x59 0x80 0x39 , 11)
avrdude: Send: . [1b] v [76] . [00] . [05] . [0e] . [06] . [80] . [00] Y [59] . [80] 9 [39] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: v [76] 
0x76 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: g [67] 
0x67 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x77 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x53 , 10)
avrdude: Send: . [1b] w [77] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] S [53] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: w [77] 
0x77 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [85] 
0x85 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: c [63] 
0x63 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,46080,256)
block_size at addr 46080 is 256
STK500V2: stk500v2_loadaddr(-2147460608)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x5a 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x78 0x00 0x05 0x0e 0x06 0x80 0x00 0x5a 0x00 0xb4 , 11)
avrdude: Send: . [1b] x [78] . [00] . [05] . [0e] . [06] . [80] . [00] Z [5a] . [00] . [b4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: x [78] 
0x78 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: i [69] 
0x69 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x79 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5d , 10)
avrdude: Send: . [1b] y [79] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ] [5d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: y [79] 
0x79 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [ee] 
0xee avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [15] 
0x15 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,46336,256)
block_size at addr 46336 is 256
STK500V2: stk500v2_loadaddr(-2147460480)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x5a 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x7a 0x00 0x05 0x0e 0x06 0x80 0x00 0x5a 0x80 0x36 , 11)
avrdude: Send: . [1b] z [7a] . [00] . [05] . [0e] . [06] . [80] . [00] Z [5a] . [80] 6 [36] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: z [7a] 
0x7a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: k [6b] 
0x6b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5f , 10)
avrdude: Send: . [1b] { [7b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] _ [5f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: { [7b] 
0x7b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [06] 
0x06 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: f [66] 
0x66 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: f [66] 
0x66 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [10] 
0x10 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8d] 
0x8d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [87] 
0x87 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [82] 
0x82 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8b] 
0x8b avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv: % [25] 
0x25 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,46592,256)
block_size at addr 46592 is 256
STK500V2: stk500v2_loadaddr(-2147460352)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x5b 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x7c 0x00 0x05 0x0e 0x06 0x80 0x00 0x5b 0x00 0xb1 , 11)
avrdude: Send: . [1b] | [7c] . [00] . [05] . [0e] . [06] . [80] . [00] [ [5b] . [00] . [b1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: | [7c] 
0x7c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: m [6d] 
0x6d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x59 , 10)
avrdude: Send: . [1b] } [7d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] Y [59] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: } [7d] 
0x7d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [18] 
0x18 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [16] 
0x16 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [05] 
0x05 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [05] 
0x05 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [be] 
0xbe avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [cd] 
0xcd avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [be] 
0xbe avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bd] 
0xbd 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,46848,256)
block_size at addr 46848 is 256
STK500V2: stk500v2_loadaddr(-2147460224)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x5b 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x7e 0x00 0x05 0x0e 0x06 0x80 0x00 0x5b 0x80 0x33 , 11)
avrdude: Send: . [1b] ~ [7e] . [00] . [05] . [0e] . [06] . [80] . [00] [ [5b] . [80] 3 [33] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ~ [7e] 
0x7e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: o [6f] 
0x6f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5b , 10)
avrdude: Send: . [1b] . [7f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] [ [5b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [7f] 
0x7f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [be] 
0xbe avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [98] 
0x98 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [cd] 
0xcd avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ed] 
0xed avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: F [46] 
0x46 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [be] 
0xbe avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,47104,256)
block_size at addr 47104 is 256
STK500V2: stk500v2_loadaddr(-2147460096)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x5c 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x80 0x00 0x05 0x0e 0x06 0x80 0x00 0x5c 0x00 0x4a , 11)
avrdude: Send: . [1b] . [80] . [00] . [05] . [0e] . [06] . [80] . [00] \ [5c] . [00] J [4a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [80] 
0x80 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x81 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa5 , 10)
avrdude: Send: . [1b] . [81] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [81] 
0x81 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8e] 
0x8e 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,47360,256)
block_size at addr 47360 is 256
STK500V2: stk500v2_loadaddr(-2147459968)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x5c 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x82 0x00 0x05 0x0e 0x06 0x80 0x00 0x5c 0x80 0xc8 , 11)
avrdude: Send: . [1b] . [82] . [00] . [05] . [0e] . [06] . [80] . [00] \ [5c] . [80] . [c8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [82] 
0x82 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x83 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa7 , 10)
avrdude: Send: . [1b] . [83] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [83] 
0x83 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [ce] 
0xce avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [ee] 
0xee avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [81] 
0x81 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [81] 
0x81 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [81] 
0x81 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [11] 
0x11 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [eb] 
0xeb avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,47616,256)
block_size at addr 47616 is 256
STK500V2: stk500v2_loadaddr(-2147459840)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x5d 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x84 0x00 0x05 0x0e 0x06 0x80 0x00 0x5d 0x00 0x4f , 11)
avrdude: Send: . [1b] . [84] . [00] . [05] . [0e] . [06] . [80] . [00] ] [5d] . [00] O [4f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [84] 
0x84 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [95] 
0x95 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x85 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa1 , 10)
avrdude: Send: . [1b] . [85] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [85] 
0x85 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e6] 
0xe6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,47872,256)
block_size at addr 47872 is 256
STK500V2: stk500v2_loadaddr(-2147459712)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x5d 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x86 0x00 0x05 0x0e 0x06 0x80 0x00 0x5d 0x80 0xcd , 11)
avrdude: Send: . [1b] . [86] . [00] . [05] . [0e] . [06] . [80] . [00] ] [5d] . [80] . [cd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [86] 
0x86 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x87 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa3 , 10)
avrdude: Send: . [1b] . [87] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [87] 
0x87 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [05] 
0x05 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,48128,256)
block_size at addr 48128 is 256
STK500V2: stk500v2_loadaddr(-2147459584)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x5e 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x88 0x00 0x05 0x0e 0x06 0x80 0x00 0x5e 0x00 0x40 , 11)
avrdude: Send: . [1b] . [88] . [00] . [05] . [0e] . [06] . [80] . [00] ^ [5e] . [00] @ [40] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [88] 
0x88 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [99] 
0x99 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x89 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xad , 10)
avrdude: Send: . [1b] . [89] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ad] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [89] 
0x89 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [df] 
0xdf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [10] 
0x10 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [ea] 
0xea avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: - [2d] 
0x2d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,48384,256)
block_size at addr 48384 is 256
STK500V2: stk500v2_loadaddr(-2147459456)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x5e 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x8a 0x00 0x05 0x0e 0x06 0x80 0x00 0x5e 0x80 0xc2 , 11)
avrdude: Send: . [1b] . [8a] . [00] . [05] . [0e] . [06] . [80] . [00] ^ [5e] . [80] . [c2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8a] 
0x8a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9b] 
0x9b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xaf , 10)
avrdude: Send: . [1b] . [8b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [af] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8b] 
0x8b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [17] 
0x17 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [97] 
0x97 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [17] 
0x17 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [97] 
0x97 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ea] 
0xea 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,48640,256)
block_size at addr 48640 is 256
STK500V2: stk500v2_loadaddr(-2147459328)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x5f 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x8c 0x00 0x05 0x0e 0x06 0x80 0x00 0x5f 0x00 0x45 , 11)
avrdude: Send: . [1b] . [8c] . [00] . [05] . [0e] . [06] . [80] . [00] _ [5f] . [00] E [45] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8c] 
0x8c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9d] 
0x9d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa9 , 10)
avrdude: Send: . [1b] . [8d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8d] 
0x8d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: C [43] 
0x43 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,48896,256)
block_size at addr 48896 is 256
STK500V2: stk500v2_loadaddr(-2147459200)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x5f 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x8e 0x00 0x05 0x0e 0x06 0x80 0x00 0x5f 0x80 0xc7 , 11)
avrdude: Send: . [1b] . [8e] . [00] . [05] . [0e] . [06] . [80] . [00] _ [5f] . [80] . [c7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8e] 
0x8e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xab , 10)
avrdude: Send: . [1b] . [8f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ab] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8f] 
0x8f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [cf] 
0xcf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [df] 
0xdf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [10] 
0x10 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Y [59] 
0x59 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,49152,256)
block_size at addr 49152 is 256
STK500V2: stk500v2_loadaddr(-2147459072)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x60 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x90 0x00 0x05 0x0e 0x06 0x80 0x00 0x60 0x00 0x66 , 11)
avrdude: Send: . [1b] . [90] . [00] . [05] . [0e] . [06] . [80] . [00] ` [60] . [00] f [66] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [90] 
0x90 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x91 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb5 , 10)
avrdude: Send: . [1b] . [91] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [91] 
0x91 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [ea] 
0xea avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: a [61] 
0x61 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [1f] 
0x1f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [15] 
0x15 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [10] 
0x10 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ac] 
0xac 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,49408,256)
block_size at addr 49408 is 256
STK500V2: stk500v2_loadaddr(-2147458944)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x60 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x92 0x00 0x05 0x0e 0x06 0x80 0x00 0x60 0x80 0xe4 , 11)
avrdude: Send: . [1b] . [92] . [00] . [05] . [0e] . [06] . [80] . [00] ` [60] . [80] . [e4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [92] 
0x92 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [83] 
0x83 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x93 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb7 , 10)
avrdude: Send: . [1b] . [93] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [93] 
0x93 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [04] 
0x04 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [cf] 
0xcf avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [18] 
0x18 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [11] 
0x11 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [12] 
0x12 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: o [6f] 
0x6f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,49664,256)
block_size at addr 49664 is 256
STK500V2: stk500v2_loadaddr(-2147458816)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x61 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x94 0x00 0x05 0x0e 0x06 0x80 0x00 0x61 0x00 0x63 , 11)
avrdude: Send: . [1b] . [94] . [00] . [05] . [0e] . [06] . [80] . [00] a [61] . [00] c [63] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [94] 
0x94 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [85] 
0x85 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x95 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb1 , 10)
avrdude: Send: . [1b] . [95] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [95] 
0x95 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: o [6f] 
0x6f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: o [6f] 
0x6f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: o [6f] 
0x6f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [da] 
0xda avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f5] 
0xf5 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,49920,256)
block_size at addr 49920 is 256
STK500V2: stk500v2_loadaddr(-2147458688)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x61 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x96 0x00 0x05 0x0e 0x06 0x80 0x00 0x61 0x80 0xe1 , 11)
avrdude: Send: . [1b] . [96] . [00] . [05] . [0e] . [06] . [80] . [00] a [61] . [80] . [e1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [96] 
0x96 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x97 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb3 , 10)
avrdude: Send: . [1b] . [97] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [97] 
0x97 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [ef] 
0xef avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [ee] 
0xee avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [ed] 
0xed avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [cf] 
0xcf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [df] 
0xdf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [10] 
0x10 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ` [60] 
0x60 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,50176,256)
block_size at addr 50176 is 256
STK500V2: stk500v2_loadaddr(-2147458560)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x62 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x98 0x00 0x05 0x0e 0x06 0x80 0x00 0x62 0x00 0x6c , 11)
avrdude: Send: . [1b] . [98] . [00] . [05] . [0e] . [06] . [80] . [00] b [62] . [00] l [6c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [98] 
0x98 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [89] 
0x89 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x99 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbd , 10)
avrdude: Send: . [1b] . [99] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [99] 
0x99 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [ec] 
0xec avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [ce] 
0xce avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [ce] 
0xce avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [ce] 
0xce avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [ec] 
0xec avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [be] 
0xbe avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [90] 
0x90 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [94] 
0x94 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [94] 
0x94 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [01] 
0x01 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [ed] 
0xed avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [10] 
0x10 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: " [22] 
0x22 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,50432,256)
block_size at addr 50432 is 256
STK500V2: stk500v2_loadaddr(-2147458432)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x62 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x9a 0x00 0x05 0x0e 0x06 0x80 0x00 0x62 0x80 0xee , 11)
avrdude: Send: . [1b] . [9a] . [00] . [05] . [0e] . [06] . [80] . [00] b [62] . [80] . [ee] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9a] 
0x9a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8b] 
0x8b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbf , 10)
avrdude: Send: . [1b] . [9b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9b] 
0x9b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: e [65] 
0x65 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [12] 
0x12 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [12] 
0x12 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [ee] 
0xee avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c7] 
0xc7 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,50688,256)
block_size at addr 50688 is 256
STK500V2: stk500v2_loadaddr(-2147458304)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x63 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x9c 0x00 0x05 0x0e 0x06 0x80 0x00 0x63 0x00 0x69 , 11)
avrdude: Send: . [1b] . [9c] . [00] . [05] . [0e] . [06] . [80] . [00] c [63] . [00] i [69] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9c] 
0x9c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb9 , 10)
avrdude: Send: . [1b] . [9d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9d] 
0x9d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [12] 
0x12 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [10] 
0x10 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [16] 
0x16 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,50944,256)
block_size at addr 50944 is 256
STK500V2: stk500v2_loadaddr(-2147458176)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x63 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x9e 0x00 0x05 0x0e 0x06 0x80 0x00 0x63 0x80 0xeb , 11)
avrdude: Send: . [1b] . [9e] . [00] . [05] . [0e] . [06] . [80] . [00] c [63] . [80] . [eb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9e] 
0x9e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbb , 10)
avrdude: Send: . [1b] . [9f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9f] 
0x9f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ea] 
0xea avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: c [63] 
0x63 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [ea] 
0xea avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [ee] 
0xee avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8c] 
0x8c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,51200,256)
block_size at addr 51200 is 256
STK500V2: stk500v2_loadaddr(-2147458048)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x64 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa0 0x00 0x05 0x0e 0x06 0x80 0x00 0x64 0x00 0x52 , 11)
avrdude: Send: . [1b] . [a0] . [00] . [05] . [0e] . [06] . [80] . [00] d [64] . [00] R [52] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a0] 
0xa0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b1] 
0xb1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x85 , 10)
avrdude: Send: . [1b] . [a1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [85] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a1] 
0xa1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [ea] 
0xea avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [83] 
0x83 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,51456,256)
block_size at addr 51456 is 256
STK500V2: stk500v2_loadaddr(-2147457920)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x64 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xa2 0x00 0x05 0x0e 0x06 0x80 0x00 0x64 0x80 0xd0 , 11)
avrdude: Send: . [1b] . [a2] . [00] . [05] . [0e] . [06] . [80] . [00] d [64] . [80] . [d0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a2] 
0xa2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b3] 
0xb3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x87 , 10)
avrdude: Send: . [1b] . [a3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [87] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a3] 
0xa3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [ef] 
0xef avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [89] 
0x89 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,51712,256)
block_size at addr 51712 is 256
STK500V2: stk500v2_loadaddr(-2147457792)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x65 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa4 0x00 0x05 0x0e 0x06 0x80 0x00 0x65 0x00 0x57 , 11)
avrdude: Send: . [1b] . [a4] . [00] . [05] . [0e] . [06] . [80] . [00] e [65] . [00] W [57] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a4] 
0xa4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b5] 
0xb5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x81 , 10)
avrdude: Send: . [1b] . [a5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [81] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a5] 
0xa5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ed] 
0xed avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [89] 
0x89 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [ee] 
0xee avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: c [63] 
0x63 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ca] 
0xca avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [ed] 
0xed avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [00] 
0x00 avrdude: Recv: u [75] 
0x75 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,51968,256)
block_size at addr 51968 is 256
STK500V2: stk500v2_loadaddr(-2147457664)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x65 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xa6 0x00 0x05 0x0e 0x06 0x80 0x00 0x65 0x80 0xd5 , 11)
avrdude: Send: . [1b] . [a6] . [00] . [05] . [0e] . [06] . [80] . [00] e [65] . [80] . [d5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a6] 
0xa6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b7] 
0xb7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x83 , 10)
avrdude: Send: . [1b] . [a7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [83] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a7] 
0xa7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [cb] 
0xcb avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [10] 
0x10 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [ea] 
0xea avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f1] 
0xf1 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,52224,256)
block_size at addr 52224 is 256
STK500V2: stk500v2_loadaddr(-2147457536)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x66 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa8 0x00 0x05 0x0e 0x06 0x80 0x00 0x66 0x00 0x58 , 11)
avrdude: Send: . [1b] . [a8] . [00] . [05] . [0e] . [06] . [80] . [00] f [66] . [00] X [58] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a8] 
0xa8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b9] 
0xb9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8d , 10)
avrdude: Send: . [1b] . [a9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a9] 
0xa9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [ce] 
0xce avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: c [63] 
0x63 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [87] 
0x87 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [87] 
0x87 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ef] 
0xef avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: c [63] 
0x63 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv: G [47] 
0x47 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,52480,256)
block_size at addr 52480 is 256
STK500V2: stk500v2_loadaddr(-2147457408)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x66 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xaa 0x00 0x05 0x0e 0x06 0x80 0x00 0x66 0x80 0xda , 11)
avrdude: Send: . [1b] . [aa] . [00] . [05] . [0e] . [06] . [80] . [00] f [66] . [80] . [da] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [aa] 
0xaa hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bb] 
0xbb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xab 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8f , 10)
avrdude: Send: . [1b] . [ab] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ab] 
0xab hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [86] 
0x86 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [96] 
0x96 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ~ [7e] 
0x7e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,52736,256)
block_size at addr 52736 is 256
STK500V2: stk500v2_loadaddr(-2147457280)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x67 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xac 0x00 0x05 0x0e 0x06 0x80 0x00 0x67 0x00 0x5d , 11)
avrdude: Send: . [1b] . [ac] . [00] . [05] . [0e] . [06] . [80] . [00] g [67] . [00] ] [5d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ac] 
0xac hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bd] 
0xbd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xad 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x89 , 10)
avrdude: Send: . [1b] . [ad] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [89] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ad] 
0xad hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [ce] 
0xce avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [ec] 
0xec avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: c [63] 
0x63 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [16] 
0x16 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [01] 
0x01 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [89] 
0x89 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [80] 
0x80 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [96] 
0x96 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [14] 
0x14 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,52992,256)
block_size at addr 52992 is 256
STK500V2: stk500v2_loadaddr(-2147457152)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x67 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xae 0x00 0x05 0x0e 0x06 0x80 0x00 0x67 0x80 0xdf , 11)
avrdude: Send: . [1b] . [ae] . [00] . [05] . [0e] . [06] . [80] . [00] g [67] . [80] . [df] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ae] 
0xae hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bf] 
0xbf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xaf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8b , 10)
avrdude: Send: . [1b] . [af] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [af] 
0xaf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [06] 
0x06 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [11] 
0x11 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [18] 
0x18 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [1c] 
0x1c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [01] 
0x01 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [01] 
0x01 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [01] 
0x01 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: " [22] 
0x22 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [94] 
0x94 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [83] 
0x83 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [01] 
0x01 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d7] 
0xd7 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,53248,256)
block_size at addr 53248 is 256
STK500V2: stk500v2_loadaddr(-2147457024)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x68 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb0 0x00 0x05 0x0e 0x06 0x80 0x00 0x68 0x00 0x4e , 11)
avrdude: Send: . [1b] . [b0] . [00] . [05] . [0e] . [06] . [80] . [00] h [68] . [00] N [4e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b0] 
0xb0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a1] 
0xa1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x95 , 10)
avrdude: Send: . [1b] . [b1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [95] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b1] 
0xb1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: m [6d] 
0x6d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: q [71] 
0x71 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [ff] 
0xff avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ee] 
0xee avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [05] 
0x05 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [08] 
0x08 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [00] 
0x00 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [08] 
0x08 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [df] 
0xdf avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [94] 
0x94 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv:   [20] 
0x20 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [00] 
0x00 avrdude: Recv: e [65] 
0x65 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,53504,256)
block_size at addr 53504 is 256
STK500V2: stk500v2_loadaddr(-2147456896)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x68 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xb2 0x00 0x05 0x0e 0x06 0x80 0x00 0x68 0x80 0xcc , 11)
avrdude: Send: . [1b] . [b2] . [00] . [05] . [0e] . [06] . [80] . [00] h [68] . [80] . [cc] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b2] 
0xb2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a3] 
0xa3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x97 , 10)
avrdude: Send: . [1b] . [b3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [97] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b3] 
0xb3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: N [4e] 
0x4e avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: N [4e] 
0x4e avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [90] 
0x90 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [90] 
0x90 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [90] 
0x90 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ec] 
0xec avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [fc] 
0xfc avrdude: Recv: N [4e] 
0x4e avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [91] 
0x91 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [91] 
0x91 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: p [70] 
0x70 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [fc] 
0xfc avrdude: Recv: N [4e] 
0x4e avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [91] 
0x91 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [fc] 
0xfc avrdude: Recv: N [4e] 
0x4e avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [90] 
0x90 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [90] 
0x90 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [90] 
0x90 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [90] 
0x90 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,53760,256)
block_size at addr 53760 is 256
STK500V2: stk500v2_loadaddr(-2147456768)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x69 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb4 0x00 0x05 0x0e 0x06 0x80 0x00 0x69 0x00 0x4b , 11)
avrdude: Send: . [1b] . [b4] . [00] . [05] . [0e] . [06] . [80] . [00] i [69] . [00] K [4b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b4] 
0xb4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a5] 
0xa5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x91 , 10)
avrdude: Send: . [1b] . [b5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [91] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b5] 
0xb5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [98] 
0x98 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [fc] 
0xfc avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ea] 
0xea avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [83] 
0x83 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: : [3a] 
0x3a avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bc] 
0xbc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,54016,256)
block_size at addr 54016 is 256
STK500V2: stk500v2_loadaddr(-2147456640)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x69 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xb6 0x00 0x05 0x0e 0x06 0x80 0x00 0x69 0x80 0xc9 , 11)
avrdude: Send: . [1b] . [b6] . [00] . [05] . [0e] . [06] . [80] . [00] i [69] . [80] . [c9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b6] 
0xb6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a7] 
0xa7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x93 , 10)
avrdude: Send: . [1b] . [b7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [93] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b7] 
0xb7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [80] 
0x80 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [90] 
0x90 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [80] 
0x80 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [90] 
0x90 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [cf] 
0xcf avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f4] 
0xf4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,54272,256)
block_size at addr 54272 is 256
STK500V2: stk500v2_loadaddr(-2147456512)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x6a 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb8 0x00 0x05 0x0e 0x06 0x80 0x00 0x6a 0x00 0x44 , 11)
avrdude: Send: . [1b] . [b8] . [00] . [05] . [0e] . [06] . [80] . [00] j [6a] . [00] D [44] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b8] 
0xb8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a9] 
0xa9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9d , 10)
avrdude: Send: . [1b] . [b9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b9] 
0xb9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [0c] 
0x0c avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [1d] 
0x1d avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [83] 
0x83 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [17] 
0x17 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [0c] 
0x0c avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [1d] 
0x1d avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1c] 
0x1c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,54528,256)
block_size at addr 54528 is 256
STK500V2: stk500v2_loadaddr(-2147456384)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x6a 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xba 0x00 0x05 0x0e 0x06 0x80 0x00 0x6a 0x80 0xc6 , 11)
avrdude: Send: . [1b] . [ba] . [00] . [05] . [0e] . [06] . [80] . [00] j [6a] . [80] . [c6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ba] 
0xba hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ab] 
0xab 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9f , 10)
avrdude: Send: . [1b] . [bb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bb] 
0xbb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [06] 
0x06 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [8e] 
0x8e avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [92] 
0x92 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [01] 
0x01 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [83] 
0x83 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [83] 
0x83 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [17] 
0x17 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [10] 
0x10 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ae] 
0xae 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,54784,256)
block_size at addr 54784 is 256
STK500V2: stk500v2_loadaddr(-2147456256)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x6b 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xbc 0x00 0x05 0x0e 0x06 0x80 0x00 0x6b 0x00 0x41 , 11)
avrdude: Send: . [1b] . [bc] . [00] . [05] . [0e] . [06] . [80] . [00] k [6b] . [00] A [41] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bc] 
0xbc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ad] 
0xad 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x99 , 10)
avrdude: Send: . [1b] . [bd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [99] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bd] 
0xbd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ! [21] 
0x21 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [89] 
0x89 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [89] 
0x89 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [89] 
0x89 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: E [45] 
0x45 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: F [46] 
0x46 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: G [47] 
0x47 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: E [45] 
0x45 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: F [46] 
0x46 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: G [47] 
0x47 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: E [45] 
0x45 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: F [46] 
0x46 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: G [47] 
0x47 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [01] 
0x01 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [89] 
0x89 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: O [4f] 
0x4f avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [81] 
0x81 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [01] 
0x01 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: - [2d] 
0x2d avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ec] 
0xec avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [cf] 
0xcf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [02] 
0x02 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [02] 
0x02 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Q [51] 
0x51 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,55040,256)
block_size at addr 55040 is 256
STK500V2: stk500v2_loadaddr(-2147456128)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x6b 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xbe 0x00 0x05 0x0e 0x06 0x80 0x00 0x6b 0x80 0xc3 , 11)
avrdude: Send: . [1b] . [be] . [00] . [05] . [0e] . [06] . [80] . [00] k [6b] . [80] . [c3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [be] 
0xbe hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [af] 
0xaf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9b , 10)
avrdude: Send: . [1b] . [bf] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bf] 
0xbf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [01] 
0x01 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [81] 
0x81 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [83] 
0x83 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [02] 
0x02 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [01] 
0x01 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: / [2f] 
0x2f avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [01] 
0x01 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [81] 
0x81 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ed] 
0xed avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [ea] 
0xea avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [ee] 
0xee avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: g [67] 
0x67 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [82] 
0x82 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: - [2d] 
0x2d avrdude: Recv: ! [21] 
0x21 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [00] 
0x00 avrdude: Recv: # [23] 
0x23 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,55296,256)
block_size at addr 55296 is 256
STK500V2: stk500v2_loadaddr(-2147456000)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x6c 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc0 0x00 0x05 0x0e 0x06 0x80 0x00 0x6c 0x00 0x3a , 11)
avrdude: Send: . [1b] . [c0] . [00] . [05] . [0e] . [06] . [80] . [00] l [6c] . [00] : [3a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c0] 
0xc0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d1] 
0xd1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe5 , 10)
avrdude: Send: . [1b] . [c1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c1] 
0xc1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [da] 
0xda avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [90] 
0x90 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [90] 
0x90 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: V [56] 
0x56 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [03] 
0x03 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [03] 
0x03 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [09] 
0x09 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [09] 
0x09 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [da] 
0xda avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8e] 
0x8e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,55552,256)
block_size at addr 55552 is 256
STK500V2: stk500v2_loadaddr(-2147455872)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x6c 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xc2 0x00 0x05 0x0e 0x06 0x80 0x00 0x6c 0x80 0xb8 , 11)
avrdude: Send: . [1b] . [c2] . [00] . [05] . [0e] . [06] . [80] . [00] l [6c] . [80] . [b8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c2] 
0xc2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d3] 
0xd3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe7 , 10)
avrdude: Send: . [1b] . [c3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c3] 
0xc3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [cc] 
0xcc avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [0c] 
0x0c avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [81] 
0x81 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: a [61] 
0x61 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [df] 
0xdf 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,55808,256)
block_size at addr 55808 is 256
STK500V2: stk500v2_loadaddr(-2147455744)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x6d 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc4 0x00 0x05 0x0e 0x06 0x80 0x00 0x6d 0x00 0x3f , 11)
avrdude: Send: . [1b] . [c4] . [00] . [05] . [0e] . [06] . [80] . [00] m [6d] . [00] ? [3f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c4] 
0xc4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d5] 
0xd5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe1 , 10)
avrdude: Send: . [1b] . [c5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c5] 
0xc5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [0c] 
0x0c avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [03] 
0x03 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [03] 
0x03 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [02] 
0x02 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [17] 
0x17 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [0c] 
0x0c avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [03] 
0x03 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [03] 
0x03 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [ec] 
0xec avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [fd] 
0xfd avrdude: Recv: O [4f] 
0x4f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [81] 
0x81 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [81] 
0x81 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: > [3e] 
0x3e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,56064,256)
block_size at addr 56064 is 256
STK500V2: stk500v2_loadaddr(-2147455616)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x6d 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xc6 0x00 0x05 0x0e 0x06 0x80 0x00 0x6d 0x80 0xbd , 11)
avrdude: Send: . [1b] . [c6] . [00] . [05] . [0e] . [06] . [80] . [00] m [6d] . [80] . [bd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c6] 
0xc6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d7] 
0xd7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe3 , 10)
avrdude: Send: . [1b] . [c7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c7] 
0xc7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [02] 
0x02 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [02] 
0x02 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [02] 
0x02 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ed] 
0xed avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [83] 
0x83 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [83] 
0x83 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: % [25] 
0x25 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,56320,256)
block_size at addr 56320 is 256
STK500V2: stk500v2_loadaddr(-2147455488)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x6e 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc8 0x00 0x05 0x0e 0x06 0x80 0x00 0x6e 0x00 0x30 , 11)
avrdude: Send: . [1b] . [c8] . [00] . [05] . [0e] . [06] . [80] . [00] n [6e] . [00] 0 [30] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c8] 
0xc8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d9] 
0xd9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xed , 10)
avrdude: Send: . [1b] . [c9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ed] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c9] 
0xc9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [cd] 
0xcd avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [83] 
0x83 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [cd] 
0xcd avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [87] 
0x87 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [05] 
0x05 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [ca] 
0xca avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c5] 
0xc5 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,56576,256)
block_size at addr 56576 is 256
STK500V2: stk500v2_loadaddr(-2147455360)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x6e 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xca 0x00 0x05 0x0e 0x06 0x80 0x00 0x6e 0x80 0xb2 , 11)
avrdude: Send: . [1b] . [ca] . [00] . [05] . [0e] . [06] . [80] . [00] n [6e] . [80] . [b2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ca] 
0xca hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [db] 
0xdb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xef , 10)
avrdude: Send: . [1b] . [cb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ef] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cb] 
0xcb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv:   [20] 
0x20 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [9a] 
0x9a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [05] 
0x05 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [81] 
0x81 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [14] 
0x14 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [97] 
0x97 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [0b] 
0x0b avrdude: Recv:   [20] 
0x20 avrdude: Recv: S [53] 
0x53 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [09] 
0x09 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv:   [20] 
0x20 avrdude: Recv: S [53] 
0x53 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f3] 
0xf3 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,56832,256)
block_size at addr 56832 is 256
STK500V2: stk500v2_loadaddr(-2147455232)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x6f 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xcc 0x00 0x05 0x0e 0x06 0x80 0x00 0x6f 0x00 0x35 , 11)
avrdude: Send: . [1b] . [cc] . [00] . [05] . [0e] . [06] . [80] . [00] o [6f] . [00] 5 [35] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cc] 
0xcc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [dd] 
0xdd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe9 , 10)
avrdude: Send: . [1b] . [cd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cd] 
0xcd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [01] 
0x01 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [91] 
0x91 avrdude: Recv:   [20] 
0x20 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [87] 
0x87 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [07] 
0x07 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [01] 
0x01 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [91] 
0x91 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: q [71] 
0x71 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: q [71] 
0x71 avrdude: Recv: T [54] 
0x54 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ` [60] 
0x60 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [ed] 
0xed avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: * [2a] 
0x2a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [ed] 
0xed avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: : [3a] 
0x3a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [81] 
0x81 avrdude: Recv:   [20] 
0x20 avrdude: Recv: S [53] 
0x53 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [00] 
0x00 avrdude: Recv: , [2c] 
0x2c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,57088,256)
block_size at addr 57088 is 256
STK500V2: stk500v2_loadaddr(-2147455104)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x6f 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xce 0x00 0x05 0x0e 0x06 0x80 0x00 0x6f 0x80 0xb7 , 11)
avrdude: Send: . [1b] . [ce] . [00] . [05] . [0e] . [06] . [80] . [00] o [6f] . [80] . [b7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ce] 
0xce hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [df] 
0xdf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xeb , 10)
avrdude: Send: . [1b] . [cf] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [eb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cf] 
0xcf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [01] 
0x01 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [09] 
0x09 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [15] 
0x15 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [15] 
0x15 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: T [54] 
0x54 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [91] 
0x91 avrdude: Recv: f [66] 
0x66 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [ed] 
0xed avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: z [7a] 
0x7a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [ed] 
0xed avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: r [72] 
0x72 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [1b] 
0x1b avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [cc] 
0xcc avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 0 [30] 
0x30 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,57344,256)
block_size at addr 57344 is 256
STK500V2: stk500v2_loadaddr(-2147454976)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x70 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd0 0x00 0x05 0x0e 0x06 0x80 0x00 0x70 0x00 0x36 , 11)
avrdude: Send: . [1b] . [d0] . [00] . [05] . [0e] . [06] . [80] . [00] p [70] . [00] 6 [36] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d0] 
0xd0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c1] 
0xc1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf5 , 10)
avrdude: Send: . [1b] . [d1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d1] 
0xd1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [0d] 
0x0d avrdude: Recv: b [62] 
0x62 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1d] 
0x1d 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,57600,256)
block_size at addr 57600 is 256
STK500V2: stk500v2_loadaddr(-2147454848)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x70 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xd2 0x00 0x05 0x0e 0x06 0x80 0x00 0x70 0x80 0xb4 , 11)
avrdude: Send: . [1b] . [d2] . [00] . [05] . [0e] . [06] . [80] . [00] p [70] . [80] . [b4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d2] 
0xd2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c3] 
0xc3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf7 , 10)
avrdude: Send: . [1b] . [d3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d3] 
0xd3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [87] 
0x87 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [af] 
0xaf avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [97] 
0x97 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [aa] 
0xaa avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [aa] 
0xaa avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a0] 
0xa0 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,57856,256)
block_size at addr 57856 is 256
STK500V2: stk500v2_loadaddr(-2147454720)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x71 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd4 0x00 0x05 0x0e 0x06 0x80 0x00 0x71 0x00 0x33 , 11)
avrdude: Send: . [1b] . [d4] . [00] . [05] . [0e] . [06] . [80] . [00] q [71] . [00] 3 [33] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d4] 
0xd4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c5] 
0xc5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf1 , 10)
avrdude: Send: . [1b] . [d5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d5] 
0xd5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [83] 
0x83 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [83] 
0x83 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [87] 
0x87 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [86] 
0x86 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ae] 
0xae avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [97] 
0x97 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ae] 
0xae avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: U [55] 
0x55 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [96] 
0x96 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [af] 
0xaf avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: U [55] 
0x55 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: O [4f] 
0x4f avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [83] 
0x83 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [91] 
0x91 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [af] 
0xaf avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [af] 
0xaf avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [97] 
0x97 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [0a] 
0x0a avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [af] 
0xaf avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [97] 
0x97 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [96] 
0x96 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ad] 
0xad avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: C [43] 
0x43 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [96] 
0x96 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [97] 
0x97 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [8d] 
0x8d avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ad] 
0xad avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [8f] 
0x8f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [8e] 
0x8e avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [8e] 
0x8e avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,58112,256)
block_size at addr 58112 is 256
STK500V2: stk500v2_loadaddr(-2147454592)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x71 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xd6 0x00 0x05 0x0e 0x06 0x80 0x00 0x71 0x80 0xb1 , 11)
avrdude: Send: . [1b] . [d6] . [00] . [05] . [0e] . [06] . [80] . [00] q [71] . [80] . [b1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d6] 
0xd6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c7] 
0xc7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf3 , 10)
avrdude: Send: . [1b] . [d7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d7] 
0xd7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ad] 
0xad avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [8d] 
0x8d avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [8d] 
0x8d avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [96] 
0x96 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [ad] 
0xad avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [97] 
0x97 avrdude: Recv: r [72] 
0x72 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [83] 
0x83 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ad] 
0xad avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [8e] 
0x8e avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ad] 
0xad avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8f] 
0x8f avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [96] 
0x96 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ad] 
0xad avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: C [43] 
0x43 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [96] 
0x96 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [97] 
0x97 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [85] 
0x85 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [11] 
0x11 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [81] 
0x81 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [81] 
0x81 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [81] 
0x81 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [81] 
0x81 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [19] 
0x19 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [09] 
0x09 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [09] 
0x09 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [81] 
0x81 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ad] 
0xad avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [81] 
0x81 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [81] 
0x81 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [81] 
0x81 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [81] 
0x81 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [81] 
0x81 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a6] 
0xa6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,58368,256)
block_size at addr 58368 is 256
STK500V2: stk500v2_loadaddr(-2147454464)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x72 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd8 0x00 0x05 0x0e 0x06 0x80 0x00 0x72 0x00 0x3c , 11)
avrdude: Send: . [1b] . [d8] . [00] . [05] . [0e] . [06] . [80] . [00] r [72] . [00] < [3c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d8] 
0xd8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c9] 
0xc9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xfd , 10)
avrdude: Send: . [1b] . [d9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [fd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d9] 
0xd9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [01] 
0x01 avrdude: Recv: H [48] 
0x48 avrdude: Recv: X [58] 
0x58 avrdude: Recv: S [53] 
0x53 avrdude: Recv: A [41] 
0x41 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [09] 
0x09 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [09] 
0x09 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [85] 
0x85 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [96] 
0x96 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ad] 
0xad avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: C [43] 
0x43 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [96] 
0x96 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [81] 
0x81 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: a [61] 
0x61 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [98] 
0x98 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [af] 
0xaf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [ad] 
0xad avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [ad] 
0xad avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [96] 
0x96 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [ad] 
0xad avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [97] 
0x97 avrdude: Recv: r [72] 
0x72 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [83] 
0x83 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f5] 
0xf5 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [96] 
0x96 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [ad] 
0xad avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [97] 
0x97 avrdude: Recv: r [72] 
0x72 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [83] 
0x83 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [af] 
0xaf avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [81] 
0x81 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [1f] 
0x1f avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [1f] 
0x1f avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [af] 
0xaf avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [af] 
0xaf avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [00] 
0x00 avrdude: Recv: h [68] 
0x68 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,58624,256)
block_size at addr 58624 is 256
STK500V2: stk500v2_loadaddr(-2147454336)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x72 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xda 0x00 0x05 0x0e 0x06 0x80 0x00 0x72 0x80 0xbe , 11)
avrdude: Send: . [1b] . [da] . [00] . [05] . [0e] . [06] . [80] . [00] r [72] . [80] . [be] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [da] 
0xda hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cb] 
0xcb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xff , 10)
avrdude: Send: . [1b] . [db] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ff] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [db] 
0xdb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [af] 
0xaf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ec] 
0xec avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [85] 
0x85 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [96] 
0x96 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ad] 
0xad avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: C [43] 
0x43 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [96] 
0x96 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ab] 
0xab avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [81] 
0x81 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [ad] 
0xad avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [ad] 
0xad avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [ad] 
0xad avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ad] 
0xad avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [85] 
0x85 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [96] 
0x96 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [ad] 
0xad avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [97] 
0x97 avrdude: Recv: r [72] 
0x72 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [83] 
0x83 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [96] 
0x96 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ad] 
0xad avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [97] 
0x97 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [85] 
0x85 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [85] 
0x85 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 7 [37] 
0x37 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,58880,256)
block_size at addr 58880 is 256
STK500V2: stk500v2_loadaddr(-2147454208)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x73 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xdc 0x00 0x05 0x0e 0x06 0x80 0x00 0x73 0x00 0x39 , 11)
avrdude: Send: . [1b] . [dc] . [00] . [05] . [0e] . [06] . [80] . [00] s [73] . [00] 9 [39] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [dc] 
0xdc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cd] 
0xcd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf9 , 10)
avrdude: Send: . [1b] . [dd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [dd] 
0xdd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [83] 
0x83 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [81] 
0x81 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [81] 
0x81 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [89] 
0x89 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [89] 
0x89 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [89] 
0x89 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [81] 
0x81 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [89] 
0x89 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [89] 
0x89 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [11] 
0x11 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [ff] 
0xff avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [89] 
0x89 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [89] 
0x89 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,59136,256)
block_size at addr 59136 is 256
STK500V2: stk500v2_loadaddr(-2147454080)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x73 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xde 0x00 0x05 0x0e 0x06 0x80 0x00 0x73 0x80 0xbb , 11)
avrdude: Send: . [1b] . [de] . [00] . [05] . [0e] . [06] . [80] . [00] s [73] . [80] . [bb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [de] 
0xde hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cf] 
0xcf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xfb , 10)
avrdude: Send: . [1b] . [df] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [fb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [df] 
0xdf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [0b] 
0x0b avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [89] 
0x89 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [89] 
0x89 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [cb] 
0xcb avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [df] 
0xdf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [01] 
0x01 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [1e] 
0x1e avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [1e] 
0x1e avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [84] 
0x84 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [01] 
0x01 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1d] 
0x1d 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,59392,256)
block_size at addr 59392 is 256
STK500V2: stk500v2_loadaddr(-2147453952)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x74 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe0 0x00 0x05 0x0e 0x06 0x80 0x00 0x74 0x00 0x02 , 11)
avrdude: Send: . [1b] . [e0] . [00] . [05] . [0e] . [06] . [80] . [00] t [74] . [00] . [02] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e0] 
0xe0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f1] 
0xf1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc5 , 10)
avrdude: Send: . [1b] . [e1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e1] 
0xe1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [83] 
0x83 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [87] 
0x87 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: = [3d] 
0x3d avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [8d] 
0x8d avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [8d] 
0x8d avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [8d] 
0x8d avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [03] 
0x03 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [8d] 
0x8d avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [8d] 
0x8d avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [8d] 
0x8d avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [ed] 
0xed avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: w [77] 
0x77 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,59648,256)
block_size at addr 59648 is 256
STK500V2: stk500v2_loadaddr(-2147453824)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x74 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xe2 0x00 0x05 0x0e 0x06 0x80 0x00 0x74 0x80 0x80 , 11)
avrdude: Send: . [1b] . [e2] . [00] . [05] . [0e] . [06] . [80] . [00] t [74] . [80] . [80] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e2] 
0xe2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f3] 
0xf3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc7 , 10)
avrdude: Send: . [1b] . [e3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e3] 
0xe3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [8b] 
0x8b avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [89] 
0x89 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [89] 
0x89 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [89] 
0x89 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [89] 
0x89 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [89] 
0x89 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ad] 
0xad avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b6] 
0xb6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,59904,256)
block_size at addr 59904 is 256
STK500V2: stk500v2_loadaddr(-2147453696)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x75 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe4 0x00 0x05 0x0e 0x06 0x80 0x00 0x75 0x00 0x07 , 11)
avrdude: Send: . [1b] . [e4] . [00] . [05] . [0e] . [06] . [80] . [00] u [75] . [00] . [07] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e4] 
0xe4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f5] 
0xf5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc1 , 10)
avrdude: Send: . [1b] . [e5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e5] 
0xe5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8f] 
0x8f avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [80] 
0x80 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [80] 
0x80 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [80] 
0x80 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [cb] 
0xcb avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [df] 
0xdf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [09] 
0x09 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [16] 
0x16 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: a [61] 
0x61 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,60160,256)
block_size at addr 60160 is 256
STK500V2: stk500v2_loadaddr(-2147453568)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x75 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xe6 0x00 0x05 0x0e 0x06 0x80 0x00 0x75 0x80 0x85 , 11)
avrdude: Send: . [1b] . [e6] . [00] . [05] . [0e] . [06] . [80] . [00] u [75] . [80] . [85] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e6] 
0xe6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f7] 
0xf7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc3 , 10)
avrdude: Send: . [1b] . [e7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e7] 
0xe7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [03] 
0x03 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [90] 
0x90 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [90] 
0x90 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [90] 
0x90 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [90] 
0x90 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [90] 
0x90 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [90] 
0x90 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cb] 
0xcb 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,60416,256)
block_size at addr 60416 is 256
STK500V2: stk500v2_loadaddr(-2147453440)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x76 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe8 0x00 0x05 0x0e 0x06 0x80 0x00 0x76 0x00 0x08 , 11)
avrdude: Send: . [1b] . [e8] . [00] . [05] . [0e] . [06] . [80] . [00] v [76] . [00] . [08] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e8] 
0xe8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f9] 
0xf9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcd , 10)
avrdude: Send: . [1b] . [e9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e9] 
0xe9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b3] 
0xb3 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,60672,256)
block_size at addr 60672 is 256
STK500V2: stk500v2_loadaddr(-2147453312)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x76 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xea 0x00 0x05 0x0e 0x06 0x80 0x00 0x76 0x80 0x8a , 11)
avrdude: Send: . [1b] . [ea] . [00] . [05] . [0e] . [06] . [80] . [00] v [76] . [80] . [8a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ea] 
0xea hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fb] 
0xfb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xeb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcf , 10)
avrdude: Send: . [1b] . [eb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [eb] 
0xeb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [ed] 
0xed avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ed] 
0xed avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [ed] 
0xed avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ed] 
0xed avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [93] 
0x93 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [91] 
0x91 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [83] 
0x83 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [83] 
0x83 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [00] 
0x00 avrdude: Recv: + [2b] 
0x2b 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,60928,256)
block_size at addr 60928 is 256
STK500V2: stk500v2_loadaddr(-2147453184)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x77 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xec 0x00 0x05 0x0e 0x06 0x80 0x00 0x77 0x00 0x0d , 11)
avrdude: Send: . [1b] . [ec] . [00] . [05] . [0e] . [06] . [80] . [00] w [77] . [00] . [0d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ec] 
0xec hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fd] 
0xfd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xed 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc9 , 10)
avrdude: Send: . [1b] . [ed] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ed] 
0xed hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [87] 
0x87 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [13] 
0x13 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,61184,256)
block_size at addr 61184 is 256
STK500V2: stk500v2_loadaddr(-2147453056)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x77 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xee 0x00 0x05 0x0e 0x06 0x80 0x00 0x77 0x80 0x8f , 11)
avrdude: Send: . [1b] . [ee] . [00] . [05] . [0e] . [06] . [80] . [00] w [77] . [80] . [8f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ee] 
0xee hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xef 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcb , 10)
avrdude: Send: . [1b] . [ef] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ef] 
0xef hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [82] 
0x82 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [cf] 
0xcf avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: B [42] 
0x42 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: g [67] 
0x67 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a2] 
0xa2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,61440,256)
block_size at addr 61440 is 256
STK500V2: stk500v2_loadaddr(-2147452928)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x78 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf0 0x00 0x05 0x0e 0x06 0x80 0x00 0x78 0x00 0x1e , 11)
avrdude: Send: . [1b] . [f0] . [00] . [05] . [0e] . [06] . [80] . [00] x [78] . [00] . [1e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f0] 
0xf0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e1] 
0xe1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd5 , 10)
avrdude: Send: . [1b] . [f1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f1] 
0xf1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: V [56] 
0x56 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [81] 
0x81 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [11] 
0x11 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [9e] 
0x9e avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [83] 
0x83 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [81] 
0x81 avrdude: Recv: U [55] 
0x55 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [83] 
0x83 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [eb] 
0xeb avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [89] 
0x89 avrdude: Recv: s [73] 
0x73 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [05] 
0x05 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [05] 
0x05 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [13] 
0x13 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,61696,256)
block_size at addr 61696 is 256
STK500V2: stk500v2_loadaddr(-2147452800)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x78 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xf2 0x00 0x05 0x0e 0x06 0x80 0x00 0x78 0x80 0x9c , 11)
avrdude: Send: . [1b] . [f2] . [00] . [05] . [0e] . [06] . [80] . [00] x [78] . [80] . [9c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f2] 
0xf2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e3] 
0xe3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd7 , 10)
avrdude: Send: . [1b] . [f3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f3] 
0xf3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [8a] 
0x8a avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [8a] 
0x8a avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [85] 
0x85 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [85] 
0x85 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [85] 
0x85 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [af] 
0xaf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: a [61] 
0x61 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [98] 
0x98 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [af] 
0xaf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [01] 
0x01 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [19] 
0x19 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [09] 
0x09 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [ee] 
0xee avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ef] 
0xef avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e4] 
0xe4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,61952,256)
block_size at addr 61952 is 256
STK500V2: stk500v2_loadaddr(-2147452672)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x79 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf4 0x00 0x05 0x0e 0x06 0x80 0x00 0x79 0x00 0x1b , 11)
avrdude: Send: . [1b] . [f4] . [00] . [05] . [0e] . [06] . [80] . [00] y [79] . [00] . [1b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f4] 
0xf4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e5] 
0xe5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd1 , 10)
avrdude: Send: . [1b] . [f5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f5] 
0xf5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0c] 
0x0c avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [05] 
0x05 avrdude: Recv: " [22] 
0x22 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: : [3a] 
0x3a avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [89] 
0x89 avrdude: Recv: s [73] 
0x73 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [01] 
0x01 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [81] 
0x81 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [81] 
0x81 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [81] 
0x81 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [81] 
0x81 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [15] 
0x15 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [05] 
0x05 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [05] 
0x05 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [05] 
0x05 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fd] 
0xfd avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [85] 
0x85 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ec] 
0xec avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [95] 
0x95 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [af] 
0xaf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [83] 
0x83 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9a] 
0x9a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,62208,256)
block_size at addr 62208 is 256
STK500V2: stk500v2_loadaddr(-2147452544)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x79 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xf6 0x00 0x05 0x0e 0x06 0x80 0x00 0x79 0x80 0x99 , 11)
avrdude: Send: . [1b] . [f6] . [00] . [05] . [0e] . [06] . [80] . [00] y [79] . [80] . [99] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f6] 
0xf6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e7] 
0xe7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd3 , 10)
avrdude: Send: . [1b] . [f7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f7] 
0xf7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [ce] 
0xce avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ce] 
0xce avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [09] 
0x09 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,62464,256)
block_size at addr 62464 is 256
STK500V2: stk500v2_loadaddr(-2147452416)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x7a 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf8 0x00 0x05 0x0e 0x06 0x80 0x00 0x7a 0x00 0x14 , 11)
avrdude: Send: . [1b] . [f8] . [00] . [05] . [0e] . [06] . [80] . [00] z [7a] . [00] . [14] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f8] 
0xf8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e9] 
0xe9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdd , 10)
avrdude: Send: . [1b] . [f9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [dd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f9] 
0xf9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [03] 
0x03 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: P [50] 
0x50 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: q [71] 
0x71 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,62720,256)
block_size at addr 62720 is 256
STK500V2: stk500v2_loadaddr(-2147452288)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x7a 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xfa 0x00 0x05 0x0e 0x06 0x80 0x00 0x7a 0x80 0x96 , 11)
avrdude: Send: . [1b] . [fa] . [00] . [05] . [0e] . [06] . [80] . [00] z [7a] . [80] . [96] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fa] 
0xfa hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [eb] 
0xeb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xfb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdf , 10)
avrdude: Send: . [1b] . [fb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [df] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fb] 
0xfb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [98] 
0x98 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [df] 
0xdf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [81] 
0x81 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [81] 
0x81 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [81] 
0x81 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b8] 
0xb8 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,62976,256)
block_size at addr 62976 is 256
STK500V2: stk500v2_loadaddr(-2147452160)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x7b 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xfc 0x00 0x05 0x0e 0x06 0x80 0x00 0x7b 0x00 0x11 , 11)
avrdude: Send: . [1b] . [fc] . [00] . [05] . [0e] . [06] . [80] . [00] { [7b] . [00] . [11] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fc] 
0xfc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ed] 
0xed 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xfd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd9 , 10)
avrdude: Send: . [1b] . [fd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fd] 
0xfd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: " [22] 
0x22 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [81] 
0x81 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [81] 
0x81 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [81] 
0x81 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [83] 
0x83 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [83] 
0x83 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [83] 
0x83 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 6 [36] 
0x36 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,63232,256)
block_size at addr 63232 is 256
STK500V2: stk500v2_loadaddr(-2147452032)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x7b 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xfe 0x00 0x05 0x0e 0x06 0x80 0x00 0x7b 0x80 0x93 , 11)
avrdude: Send: . [1b] . [fe] . [00] . [05] . [0e] . [06] . [80] . [00] { [7b] . [80] . [93] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fe] 
0xfe hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ef] 
0xef 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xff 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdb , 10)
avrdude: Send: . [1b] . [ff] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [db] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ff] 
0xff hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [82] 
0x82 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [2e] 
0x2e avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8a] 
0x8a avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [00] 
0x00 avrdude: Recv: ` [60] 
0x60 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,63488,256)
block_size at addr 63488 is 256
STK500V2: stk500v2_loadaddr(-2147451904)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x7c 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x00 0x00 0x05 0x0e 0x06 0x80 0x00 0x7c 0x00 0xea , 11)
avrdude: Send: . [1b] . [00] . [00] . [05] . [0e] . [06] . [80] . [00] | [7c] . [00] . [ea] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [00] 
0x00 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x01 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x25 , 10)
avrdude: Send: . [1b] . [01] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] % [25] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [01] 
0x01 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [00] 
0x00 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [1d] 
0x1d avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [18] 
0x18 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,63744,256)
block_size at addr 63744 is 256
STK500V2: stk500v2_loadaddr(-2147451776)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x7c 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x02 0x00 0x05 0x0e 0x06 0x80 0x00 0x7c 0x80 0x68 , 11)
avrdude: Send: . [1b] . [02] . [00] . [05] . [0e] . [06] . [80] . [00] | [7c] . [80] h [68] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [02] 
0x02 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [13] 
0x13 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x03 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x27 , 10)
avrdude: Send: . [1b] . [03] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ' [27] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [03] 
0x03 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [1d] 
0x1d avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [1d] 
0x1d avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [1d] 
0x1d avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [1d] 
0x1d avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: p [70] 
0x70 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,64000,256)
block_size at addr 64000 is 256
STK500V2: stk500v2_loadaddr(-2147451648)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x7d 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x04 0x00 0x05 0x0e 0x06 0x80 0x00 0x7d 0x00 0xef , 11)
avrdude: Send: . [1b] . [04] . [00] . [05] . [0e] . [06] . [80] . [00] } [7d] . [00] . [ef] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [04] 
0x04 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [15] 
0x15 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x05 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x21 , 10)
avrdude: Send: . [1b] . [05] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ! [21] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [05] 
0x05 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [1d] 
0x1d avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [1d] 
0x1d avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [1d] 
0x1d avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [17] 
0x17 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [19] 
0x19 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [09] 
0x09 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [09] 
0x09 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [98] 
0x98 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: / [2f] 
0x2f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,64256,256)
block_size at addr 64256 is 256
STK500V2: stk500v2_loadaddr(-2147451520)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x7d 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x06 0x00 0x05 0x0e 0x06 0x80 0x00 0x7d 0x80 0x6d , 11)
avrdude: Send: . [1b] . [06] . [00] . [05] . [0e] . [06] . [80] . [00] } [7d] . [80] m [6d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [06] 
0x06 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [17] 
0x17 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x07 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x23 , 10)
avrdude: Send: . [1b] . [07] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] # [23] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [07] 
0x07 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [19] 
0x19 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [09] 
0x09 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [09] 
0x09 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [98] 
0x98 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [19] 
0x19 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [09] 
0x09 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [09] 
0x09 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0c] 
0x0c avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: p [70] 
0x70 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [01] 
0x01 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [19] 
0x19 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [09] 
0x09 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [09] 
0x09 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [98] 
0x98 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: P [50] 
0x50 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [17] 
0x17 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8a] 
0x8a avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,64512,256)
block_size at addr 64512 is 256
STK500V2: stk500v2_loadaddr(-2147451392)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x7e 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x08 0x00 0x05 0x0e 0x06 0x80 0x00 0x7e 0x00 0xe0 , 11)
avrdude: Send: . [1b] . [08] . [00] . [05] . [0e] . [06] . [80] . [00] ~ [7e] . [00] . [e0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [08] 
0x08 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [19] 
0x19 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x09 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2d , 10)
avrdude: Send: . [1b] . [09] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] - [2d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [09] 
0x09 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [0c] 
0x0c avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [17] 
0x17 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [07] 
0x07 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [07] 
0x07 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [ff] 
0xff avrdude: Recv: $ [24] 
0x24 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [01] 
0x01 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [9f] 
0x9f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [9f] 
0x9f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [9f] 
0x9f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [06] 
0x06 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: _ [5f] 
0x5f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,64768,256)
block_size at addr 64768 is 256
STK500V2: stk500v2_loadaddr(-2147451264)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x7e 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x0a 0x00 0x05 0x0e 0x06 0x80 0x00 0x7e 0x80 0x62 , 11)
avrdude: Send: . [1b] . [0a] . [00] . [05] . [0e] . [06] . [80] . [00] ~ [7e] . [80] b [62] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0a] 
0x0a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1b] 
0x1b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2f , 10)
avrdude: Send: . [1b] . [0b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] / [2f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0b] 
0x0b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [17] 
0x17 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [07] 
0x07 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [07] 
0x07 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [ff] 
0xff avrdude: Recv: $ [24] 
0x24 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [01] 
0x01 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [9f] 
0x9f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [9f] 
0x9f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [9f] 
0x9f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [04] 
0x04 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [01] 
0x01 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,65024,256)
block_size at addr 65024 is 256
STK500V2: stk500v2_loadaddr(-2147451136)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x7f 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x0c 0x00 0x05 0x0e 0x06 0x80 0x00 0x7f 0x00 0xe5 , 11)
avrdude: Send: . [1b] . [0c] . [00] . [05] . [0e] . [06] . [80] . [00] . [7f] . [00] . [e5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0c] 
0x0c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1d] 
0x1d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x29 , 10)
avrdude: Send: . [1b] . [0d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ) [29] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0d] 
0x0d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [ff] 
0xff avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [ad] 
0xad avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [06] 
0x06 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: , [2c] 
0x2c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [07] 
0x07 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [15] 
0x15 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: X [58] 
0x58 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [96] 
0x96 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [91] 
0x91 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [94] 
0x94 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [1f] 
0x1f avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [91] 
0x91 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [02] 
0x02 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [02] 
0x02 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [02] 
0x02 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,65280,256)
block_size at addr 65280 is 256
STK500V2: stk500v2_loadaddr(-2147451008)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x7f 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x0e 0x00 0x05 0x0e 0x06 0x80 0x00 0x7f 0x80 0x67 , 11)
avrdude: Send: . [1b] . [0e] . [00] . [05] . [0e] . [06] . [80] . [00] . [7f] . [80] g [67] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0e] 
0x0e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1f] 
0x1f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2b , 10)
avrdude: Send: . [1b] . [0f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] + [2b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0f] 
0x0f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ff] 
0xff avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [81] 
0x81 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [96] 
0x96 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [90] 
0x90 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [90] 
0x90 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [90] 
0x90 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [90] 
0x90 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [14] 
0x14 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [04] 
0x04 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [04] 
0x04 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [81] 
0x81 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [96] 
0x96 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [91] 
0x91 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [91] 
0x91 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [97] 
0x97 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [15] 
0x15 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [05] 
0x05 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [05] 
0x05 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ~ [7e] 
0x7e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,65536,256)
block_size at addr 65536 is 256
STK500V2: stk500v2_loadaddr(-2147450880)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x80 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x10 0x00 0x05 0x0e 0x06 0x80 0x00 0x80 0x00 0x06 , 11)
avrdude: Send: . [1b] . [10] . [00] . [05] . [0e] . [06] . [80] . [00] . [80] . [00] . [06] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [10] 
0x10 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x11 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x35 , 10)
avrdude: Send: . [1b] . [11] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 5 [35] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [11] 
0x11 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [99] 
0x99 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [92] 
0x92 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [92] 
0x92 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [92] 
0x92 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1f] 
0x1f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,65792,256)
block_size at addr 65792 is 256
STK500V2: stk500v2_loadaddr(-2147450752)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x80 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x12 0x00 0x05 0x0e 0x06 0x80 0x00 0x80 0x80 0x84 , 11)
avrdude: Send: . [1b] . [12] . [00] . [05] . [0e] . [06] . [80] . [00] . [80] . [80] . [84] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [12] 
0x12 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x13 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x37 , 10)
avrdude: Send: . [1b] . [13] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 7 [37] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [13] 
0x13 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [07] 
0x07 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [da] 
0xda avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [02] 
0x02 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [02] 
0x02 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [06] 
0x06 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: , [2c] 
0x2c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [16] 
0x16 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [06] 
0x06 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: X [58] 
0x58 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [96] 
0x96 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [91] 
0x91 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a9] 
0xa9 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,66048,256)
block_size at addr 66048 is 256
STK500V2: stk500v2_loadaddr(-2147450624)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x81 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x14 0x00 0x05 0x0e 0x06 0x80 0x00 0x81 0x00 0x03 , 11)
avrdude: Send: . [1b] . [14] . [00] . [05] . [0e] . [06] . [80] . [00] . [81] . [00] . [03] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [14] 
0x14 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [05] 
0x05 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x15 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x31 , 10)
avrdude: Send: . [1b] . [15] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 1 [31] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [15] 
0x15 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [1f] 
0x1f avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ef] 
0xef avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ef] 
0xef avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [11] 
0x11 avrdude: Recv: P [50] 
0x50 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [81] 
0x81 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [81] 
0x81 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [83] 
0x83 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [83] 
0x83 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [81] 
0x81 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [81] 
0x81 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [00] 
0x00 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [94] 
0x94 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [cd] 
0xcd avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [14] 
0x14 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 1 [31] 
0x31 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,66304,256)
block_size at addr 66304 is 256
STK500V2: stk500v2_loadaddr(-2147450496)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x81 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x16 0x00 0x05 0x0e 0x06 0x80 0x00 0x81 0x80 0x81 , 11)
avrdude: Send: . [1b] . [16] . [00] . [05] . [0e] . [06] . [80] . [00] . [81] . [80] . [81] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [16] 
0x16 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [07] 
0x07 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x17 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x33 , 10)
avrdude: Send: . [1b] . [17] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 3 [33] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [17] 
0x17 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [93] 
0x93 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [96] 
0x96 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [ee] 
0xee avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [97] 
0x97 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [96] 
0x96 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [1d] 
0x1d avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [94] 
0x94 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [cd] 
0xcd avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [14] 
0x14 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [93] 
0x93 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [96] 
0x96 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ba] 
0xba 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,66560,256)
block_size at addr 66560 is 256
STK500V2: stk500v2_loadaddr(-2147450368)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x82 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x18 0x00 0x05 0x0e 0x06 0x80 0x00 0x82 0x00 0x0c , 11)
avrdude: Send: . [1b] . [18] . [00] . [05] . [0e] . [06] . [80] . [00] . [82] . [00] . [0c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [18] 
0x18 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [09] 
0x09 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x19 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3d , 10)
avrdude: Send: . [1b] . [19] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] = [3d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [19] 
0x19 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [ee] 
0xee avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [97] 
0x97 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [96] 
0x96 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [1d] 
0x1d avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [01] 
0x01 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [95] 
0x95 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [01] 
0x01 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: X [58] 
0x58 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [91] 
0x91 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [96] 
0x96 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [91] 
0x91 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [87] 
0x87 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [01] 
0x01 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [95] 
0x95 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [01] 
0x01 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: X [58] 
0x58 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [94] 
0x94 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,66816,256)
block_size at addr 66816 is 256
STK500V2: stk500v2_loadaddr(-2147450240)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x82 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x1a 0x00 0x05 0x0e 0x06 0x80 0x00 0x82 0x80 0x8e , 11)
avrdude: Send: . [1b] . [1a] . [00] . [05] . [0e] . [06] . [80] . [00] . [82] . [80] . [8e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1a] 
0x1a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0b] 
0x0b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3f , 10)
avrdude: Send: . [1b] . [1b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ? [3f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1b] 
0x1b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [96] 
0x96 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [91] 
0x91 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [87] 
0x87 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [98] 
0x98 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,67072,256)
block_size at addr 67072 is 256
STK500V2: stk500v2_loadaddr(-2147450112)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x83 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x1c 0x00 0x05 0x0e 0x06 0x80 0x00 0x83 0x00 0x09 , 11)
avrdude: Send: . [1b] . [1c] . [00] . [05] . [0e] . [06] . [80] . [00] . [83] . [00] . [09] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1c] 
0x1c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0d] 
0x0d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x39 , 10)
avrdude: Send: . [1b] . [1d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 9 [39] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1d] 
0x1d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: V [56] 
0x56 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [90] 
0x90 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: w [77] 
0x77 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,67328,256)
block_size at addr 67328 is 256
STK500V2: stk500v2_loadaddr(-2147449984)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x83 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x1e 0x00 0x05 0x0e 0x06 0x80 0x00 0x83 0x80 0x8b , 11)
avrdude: Send: . [1b] . [1e] . [00] . [05] . [0e] . [06] . [80] . [00] . [83] . [80] . [8b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1e] 
0x1e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3b , 10)
avrdude: Send: . [1b] . [1f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ; [3b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1f] 
0x1f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: V [56] 
0x56 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [03] 
0x03 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [03] 
0x03 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [09] 
0x09 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [03] 
0x03 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [03] 
0x03 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [07] 
0x07 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [07] 
0x07 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [07] 
0x07 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: V [56] 
0x56 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [df] 
0xdf avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [02] 
0x02 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [02] 
0x02 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1c] 
0x1c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,67584,256)
block_size at addr 67584 is 256
STK500V2: stk500v2_loadaddr(-2147449856)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x84 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x20 0x00 0x05 0x0e 0x06 0x80 0x00 0x84 0x00 0x32 , 11)
avrdude: Send: . [1b]   [20] . [00] . [05] . [0e] . [06] . [80] . [00] . [84] . [00] 2 [32] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv:   [20] 
0x20 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 1 [31] 
0x31 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x21 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x05 , 10)
avrdude: Send: . [1b] ! [21] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [05] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ! [21] 
0x21 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: Q [51] 
0x51 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [01] 
0x01 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [94] 
0x94 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [91] 
0x91 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [93] 
0x93 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [16] 
0x16 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [06] 
0x06 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [06] 
0x06 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e2] 
0xe2 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [05] 
0x05 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [05] 
0x05 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [93] 
0x93 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [07] 
0x07 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9e] 
0x9e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,67840,256)
block_size at addr 67840 is 256
STK500V2: stk500v2_loadaddr(-2147449728)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x84 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x22 0x00 0x05 0x0e 0x06 0x80 0x00 0x84 0x80 0xb0 , 11)
avrdude: Send: . [1b] " [22] . [00] . [05] . [0e] . [06] . [80] . [00] . [84] . [80] . [b0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: " [22] 
0x22 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 3 [33] 
0x33 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x23 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x07 , 10)
avrdude: Send: . [1b] # [23] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [07] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: # [23] 
0x23 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [ea] 
0xea avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [ea] 
0xea avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [90] 
0x90 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [87] 
0x87 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [87] 
0x87 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [87] 
0x87 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [94] 
0x94 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [85] 
0x85 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [81] 
0x81 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [81] 
0x81 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [85] 
0x85 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [07] 
0x07 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [07] 
0x07 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: Q [51] 
0x51 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: a [61] 
0x61 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: q [71] 
0x71 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c2] 
0xc2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,68096,256)
block_size at addr 68096 is 256
STK500V2: stk500v2_loadaddr(-2147449600)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x85 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x24 0x00 0x05 0x0e 0x06 0x80 0x00 0x85 0x00 0x37 , 11)
avrdude: Send: . [1b] $ [24] . [00] . [05] . [0e] . [06] . [80] . [00] . [85] . [00] 7 [37] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: $ [24] 
0x24 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 5 [35] 
0x35 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x25 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x01 , 10)
avrdude: Send: . [1b] % [25] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [01] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: % [25] 
0x25 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8a] 
0x8a avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: + [2b] 
0x2b avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [81] 
0x81 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [81] 
0x81 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [85] 
0x85 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [83] 
0x83 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [83] 
0x83 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [83] 
0x83 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [87] 
0x87 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ef] 
0xef avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [96] 
0x96 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [91] 
0x91 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [91] 
0x91 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [97] 
0x97 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [15] 
0x15 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [05] 
0x05 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [05] 
0x05 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [96] 
0x96 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [92] 
0x92 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [92] 
0x92 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [92] 
0x92 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv:   [20] 
0x20 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8a] 
0x8a avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: + [2b] 
0x2b avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [96] 
0x96 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [92] 
0x92 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [92] 
0x92 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [92] 
0x92 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [92] 
0x92 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [80] 
0x80 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b9] 
0xb9 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,68352,256)
block_size at addr 68352 is 256
STK500V2: stk500v2_loadaddr(-2147449472)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x85 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x26 0x00 0x05 0x0e 0x06 0x80 0x00 0x85 0x80 0xb5 , 11)
avrdude: Send: . [1b] & [26] . [00] . [05] . [0e] . [06] . [80] . [00] . [85] . [80] . [b5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: & [26] 
0x26 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 7 [37] 
0x37 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x27 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x03 , 10)
avrdude: Send: . [1b] ' [27] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [03] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ' [27] 
0x27 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [89] 
0x89 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [07] 
0x07 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [07] 
0x07 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [8d] 
0x8d avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [09] 
0x09 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [09] 
0x09 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [95] 
0x95 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [07] 
0x07 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: ( [28] 
0x28 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [89] 
0x89 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [89] 
0x89 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [89] 
0x89 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [83] 
0x83 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [83] 
0x83 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [83] 
0x83 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [01] 
0x01 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d3] 
0xd3 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,68608,256)
block_size at addr 68608 is 256
STK500V2: stk500v2_loadaddr(-2147449344)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x86 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x28 0x00 0x05 0x0e 0x06 0x80 0x00 0x86 0x00 0x38 , 11)
avrdude: Send: . [1b] ( [28] . [00] . [05] . [0e] . [06] . [80] . [00] . [86] . [00] 8 [38] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ( [28] 
0x28 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 9 [39] 
0x39 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x29 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0d , 10)
avrdude: Send: . [1b] ) [29] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ) [29] 
0x29 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [81] 
0x81 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [81] 
0x81 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [81] 
0x81 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [91] 
0x91 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [91] 
0x91 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [96] 
0x96 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [91] 
0x91 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [91] 
0x91 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [01] 
0x01 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: a [61] 
0x61 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [96] 
0x96 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [85] 
0x85 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,68864,256)
block_size at addr 68864 is 256
STK500V2: stk500v2_loadaddr(-2147449216)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x86 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x2a 0x00 0x05 0x0e 0x06 0x80 0x00 0x86 0x80 0xba , 11)
avrdude: Send: . [1b] * [2a] . [00] . [05] . [0e] . [06] . [80] . [00] . [86] . [80] . [ba] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: * [2a] 
0x2a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ; [3b] 
0x3b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0f , 10)
avrdude: Send: . [1b] + [2b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: + [2b] 
0x2b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [91] 
0x91 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [91] 
0x91 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [97] 
0x97 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [db] 
0xdb avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [81] 
0x81 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [01] 
0x01 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [94] 
0x94 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [94] 
0x94 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [94] 
0x94 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [94] 
0x94 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: " [22] 
0x22 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [01] 
0x01 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [12] 
0x12 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: E [45] 
0x45 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: F [46] 
0x46 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: G [47] 
0x47 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [96] 
0x96 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [91] 
0x91 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [91] 
0x91 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [97] 
0x97 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [81] 
0x81 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [81] 
0x81 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [85] 
0x85 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [85] 
0x85 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [89] 
0x89 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [01] 
0x01 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [19] 
0x19 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [15] 
0x15 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [07] 
0x07 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [13] 
0x13 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [13] 
0x13 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [13] 
0x13 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [17] 
0x17 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,69120,256)
block_size at addr 69120 is 256
STK500V2: stk500v2_loadaddr(-2147449088)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x87 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x2c 0x00 0x05 0x0e 0x06 0x80 0x00 0x87 0x00 0x3d , 11)
avrdude: Send: . [1b] , [2c] . [00] . [05] . [0e] . [06] . [80] . [00] . [87] . [00] = [3d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: , [2c] 
0x2c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: = [3d] 
0x3d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x09 , 10)
avrdude: Send: . [1b] - [2d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [09] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: - [2d] 
0x2d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [13] 
0x13 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [17] 
0x17 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: Y [59] 
0x59 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [8b] 
0x8b avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [8b] 
0x8b avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [8b] 
0x8b avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [84] 
0x84 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,69376,256)
block_size at addr 69376 is 256
STK500V2: stk500v2_loadaddr(-2147448960)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x87 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x2e 0x00 0x05 0x0e 0x06 0x80 0x00 0x87 0x80 0xbf , 11)
avrdude: Send: . [1b] . [2e] . [00] . [05] . [0e] . [06] . [80] . [00] . [87] . [80] . [bf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [2e] 
0x2e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ? [3f] 
0x3f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0b , 10)
avrdude: Send: . [1b] / [2f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: / [2f] 
0x2f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [01] 
0x01 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [85] 
0x85 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [89] 
0x89 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [85] 
0x85 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c5] 
0xc5 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,69632,256)
block_size at addr 69632 is 256
STK500V2: stk500v2_loadaddr(-2147448832)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x88 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x30 0x00 0x05 0x0e 0x06 0x80 0x00 0x88 0x00 0x2e , 11)
avrdude: Send: . [1b] 0 [30] . [00] . [05] . [0e] . [06] . [80] . [00] . [88] . [00] . [2e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 0 [30] 
0x30 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ! [21] 
0x21 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x31 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x15 , 10)
avrdude: Send: . [1b] 1 [31] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [15] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 1 [31] 
0x31 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: " [22] 
0x22 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [de] 
0xde avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [81] 
0x81 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [01] 
0x01 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [17] 
0x17 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: g [67] 
0x67 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [cf] 
0xcf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [bd] 
0xbd avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [19] 
0x19 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,69888,256)
block_size at addr 69888 is 256
STK500V2: stk500v2_loadaddr(-2147448704)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x88 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x32 0x00 0x05 0x0e 0x06 0x80 0x00 0x88 0x80 0xac , 11)
avrdude: Send: . [1b] 2 [32] . [00] . [05] . [0e] . [06] . [80] . [00] . [88] . [80] . [ac] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 2 [32] 
0x32 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: # [23] 
0x23 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x33 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x17 , 10)
avrdude: Send: . [1b] 3 [33] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [17] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 3 [33] 
0x33 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: V [56] 
0x56 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [18] 
0x18 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: V [56] 
0x56 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: g [67] 
0x67 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: V [56] 
0x56 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [89] 
0x89 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [89] 
0x89 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [89] 
0x89 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [07] 
0x07 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [80] 
0x80 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [01] 
0x01 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [01] 
0x01 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [94] 
0x94 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [94] 
0x94 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [94] 
0x94 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [94] 
0x94 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: b [62] 
0x62 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,70144,256)
block_size at addr 70144 is 256
STK500V2: stk500v2_loadaddr(-2147448576)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x89 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x34 0x00 0x05 0x0e 0x06 0x80 0x00 0x89 0x00 0x2b , 11)
avrdude: Send: . [1b] 4 [34] . [00] . [05] . [0e] . [06] . [80] . [00] . [89] . [00] + [2b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 4 [34] 
0x34 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: % [25] 
0x25 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x35 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x11 , 10)
avrdude: Send: . [1b] 5 [35] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [11] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 5 [35] 
0x35 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: t [74] 
0x74 avrdude: Recv:   [20] 
0x20 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ff] 
0xff avrdude: Recv: " [22] 
0x22 avrdude: Recv: w [77] 
0x77 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [09] 
0x09 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [96] 
0x96 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [85] 
0x85 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [85] 
0x85 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [89] 
0x89 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [01] 
0x01 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [01] 
0x01 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [13] 
0x13 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [16] 
0x16 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [06] 
0x06 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [06] 
0x06 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [06] 
0x06 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [96] 
0x96 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [91] 
0x91 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [91] 
0x91 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f9] 
0xf9 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,70400,256)
block_size at addr 70400 is 256
STK500V2: stk500v2_loadaddr(-2147448448)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x89 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x36 0x00 0x05 0x0e 0x06 0x80 0x00 0x89 0x80 0xa9 , 11)
avrdude: Send: . [1b] 6 [36] . [00] . [05] . [0e] . [06] . [80] . [00] . [89] . [80] . [a9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 6 [36] 
0x36 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ' [27] 
0x27 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x37 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x13 , 10)
avrdude: Send: . [1b] 7 [37] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [13] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 7 [37] 
0x37 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [96] 
0x96 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [91] 
0x91 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [91] 
0x91 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [97] 
0x97 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [15] 
0x15 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [05] 
0x05 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [05] 
0x05 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [89] 
0x89 avrdude: Recv:   [20] 
0x20 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [07] 
0x07 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [07] 
0x07 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [83] 
0x83 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [96] 
0x96 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [91] 
0x91 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [91] 
0x91 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [97] 
0x97 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [17] 
0x17 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [07] 
0x07 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [07] 
0x07 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [13] 
0x13 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [92] 
0x92 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [13] 
0x13 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [92] 
0x92 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [13] 
0x13 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [92] 
0x92 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [13] 
0x13 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [92] 
0x92 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 7 [37] 
0x37 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,70656,256)
block_size at addr 70656 is 256
STK500V2: stk500v2_loadaddr(-2147448320)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x8a 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x38 0x00 0x05 0x0e 0x06 0x80 0x00 0x8a 0x00 0x24 , 11)
avrdude: Send: . [1b] 8 [38] . [00] . [05] . [0e] . [06] . [80] . [00] . [8a] . [00] $ [24] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 8 [38] 
0x38 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ) [29] 
0x29 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x39 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1d , 10)
avrdude: Send: . [1b] 9 [39] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 9 [39] 
0x39 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [07] 
0x07 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [01] 
0x01 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [85] 
0x85 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [89] 
0x89 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [89] 
0x89 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [89] 
0x89 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ff] 
0xff avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: { [7b] 
0x7b 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,70912,256)
block_size at addr 70912 is 256
STK500V2: stk500v2_loadaddr(-2147448192)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x8a 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x3a 0x00 0x05 0x0e 0x06 0x80 0x00 0x8a 0x80 0xa6 , 11)
avrdude: Send: . [1b] : [3a] . [00] . [05] . [0e] . [06] . [80] . [00] . [8a] . [80] . [a6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: : [3a] 
0x3a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: + [2b] 
0x2b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1f , 10)
avrdude: Send: . [1b] ; [3b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ; [3b] 
0x3b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [85] 
0x85 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: Y [59] 
0x59 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: N [4e] 
0x4e avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [15] 
0x15 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [99] 
0x99 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [cf] 
0xcf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [99] 
0x99 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [82] 
0x82 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [99] 
0x99 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [01] 
0x01 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: Y [59] 
0x59 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [82] 
0x82 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: N [4e] 
0x4e avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [96] 
0x96 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [91] 
0x91 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [97] 
0x97 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [00] 
0x00 avrdude: Recv: z [7a] 
0x7a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,71168,256)
block_size at addr 71168 is 256
STK500V2: stk500v2_loadaddr(-2147448064)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x8b 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x3c 0x00 0x05 0x0e 0x06 0x80 0x00 0x8b 0x00 0x21 , 11)
avrdude: Send: . [1b] < [3c] . [00] . [05] . [0e] . [06] . [80] . [00] . [8b] . [00] ! [21] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: < [3c] 
0x3c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: - [2d] 
0x2d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x19 , 10)
avrdude: Send: . [1b] = [3d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [19] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: = [3d] 
0x3d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: Y [59] 
0x59 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: j [6a] 
0x6a avrdude: Recv: + [2b] 
0x2b avrdude: Recv: { [7b] 
0x7b avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [96] 
0x96 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [93] 
0x93 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [88] 
0x88 avrdude: Recv: q [71] 
0x71 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [92] 
0x92 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [80] 
0x80 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [af] 
0xaf avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [96] 
0x96 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c4] 
0xc4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,71424,256)
block_size at addr 71424 is 256
STK500V2: stk500v2_loadaddr(-2147447936)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x8b 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x3e 0x00 0x05 0x0e 0x06 0x80 0x00 0x8b 0x80 0xa3 , 11)
avrdude: Send: . [1b] > [3e] . [00] . [05] . [0e] . [06] . [80] . [00] . [8b] . [80] . [a3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: > [3e] 
0x3e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: / [2f] 
0x2f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1b , 10)
avrdude: Send: . [1b] ? [3f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ? [3f] 
0x3f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [84] 
0x84 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [84] 
0x84 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [88] 
0x88 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [88] 
0x88 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [1e] 
0x1e avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [13] 
0x13 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [92] 
0x92 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [13] 
0x13 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [92] 
0x92 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [13] 
0x13 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [92] 
0x92 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [13] 
0x13 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [92] 
0x92 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [92] 
0x92 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: P [50] 
0x50 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [89] 
0x89 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [89] 
0x89 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [89] 
0x89 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [92] 
0x92 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [8b] 
0x8b avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [87] 
0x87 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [87] 
0x87 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [8f] 
0x8f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [89] 
0x89 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [89] 
0x89 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [89] 
0x89 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cc] 
0xcc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,71680,256)
block_size at addr 71680 is 256
STK500V2: stk500v2_loadaddr(-2147447808)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x8c 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x40 0x00 0x05 0x0e 0x06 0x80 0x00 0x8c 0x00 0x5a , 11)
avrdude: Send: . [1b] @ [40] . [00] . [05] . [0e] . [06] . [80] . [00] . [8c] . [00] Z [5a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: @ [40] 
0x40 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Q [51] 
0x51 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x41 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x65 , 10)
avrdude: Send: . [1b] A [41] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] e [65] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: A [41] 
0x41 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [01] 
0x01 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [01] 
0x01 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [8e] 
0x8e avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [15] 
0x15 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ae] 
0xae avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [97] 
0x97 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [00] 
0x00 avrdude: Recv: N [4e] 
0x4e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,71936,256)
block_size at addr 71936 is 256
STK500V2: stk500v2_loadaddr(-2147447680)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x8c 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x42 0x00 0x05 0x0e 0x06 0x80 0x00 0x8c 0x80 0xd8 , 11)
avrdude: Send: . [1b] B [42] . [00] . [05] . [0e] . [06] . [80] . [00] . [8c] . [80] . [d8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: B [42] 
0x42 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: S [53] 
0x53 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x43 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x67 , 10)
avrdude: Send: . [1b] C [43] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] g [67] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: C [43] 
0x43 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [91] 
0x91 avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [cf] 
0xcf avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [81] 
0x81 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [9a] 
0x9a avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [cf] 
0xcf avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [01] 
0x01 avrdude: Recv: I [49] 
0x49 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [db] 
0xdb avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [04] 
0x04 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [82] 
0x82 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [94] 
0x94 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [85] 
0x85 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: # [23] 
0x23 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [01] 
0x01 avrdude: Recv: I [49] 
0x49 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [18] 
0x18 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ce] 
0xce avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [df] 
0xdf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [05] 
0x05 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,72192,256)
block_size at addr 72192 is 256
STK500V2: stk500v2_loadaddr(-2147447552)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x8d 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x44 0x00 0x05 0x0e 0x06 0x80 0x00 0x8d 0x00 0x5f , 11)
avrdude: Send: . [1b] D [44] . [00] . [05] . [0e] . [06] . [80] . [00] . [8d] . [00] _ [5f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: D [44] 
0x44 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: U [55] 
0x55 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x45 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x61 , 10)
avrdude: Send: . [1b] E [45] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] a [61] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: E [45] 
0x45 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [10] 
0x10 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [07] 
0x07 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [ec] 
0xec avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [83] 
0x83 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: t [74] 
0x74 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,72448,256)
block_size at addr 72448 is 256
STK500V2: stk500v2_loadaddr(-2147447424)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x8d 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x46 0x00 0x05 0x0e 0x06 0x80 0x00 0x8d 0x80 0xdd , 11)
avrdude: Send: . [1b] F [46] . [00] . [05] . [0e] . [06] . [80] . [00] . [8d] . [80] . [dd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: F [46] 
0x46 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: W [57] 
0x57 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x47 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x63 , 10)
avrdude: Send: . [1b] G [47] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] c [63] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: G [47] 
0x47 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [ec] 
0xec avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [97] 
0x97 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [83] 
0x83 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [10] 
0x10 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [07] 
0x07 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: k [6b] 
0x6b 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,72704,256)
block_size at addr 72704 is 256
STK500V2: stk500v2_loadaddr(-2147447296)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x8e 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x48 0x00 0x05 0x0e 0x06 0x80 0x00 0x8e 0x00 0x50 , 11)
avrdude: Send: . [1b] H [48] . [00] . [05] . [0e] . [06] . [80] . [00] . [8e] . [00] P [50] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: H [48] 
0x48 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Y [59] 
0x59 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x49 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6d , 10)
avrdude: Send: . [1b] I [49] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] m [6d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: I [49] 
0x49 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [ec] 
0xec avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [83] 
0x83 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [ec] 
0xec avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [97] 
0x97 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [83] 
0x83 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [09] 
0x09 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,72960,256)
block_size at addr 72960 is 256
STK500V2: stk500v2_loadaddr(-2147447168)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x8e 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x4a 0x00 0x05 0x0e 0x06 0x80 0x00 0x8e 0x80 0xd2 , 11)
avrdude: Send: . [1b] J [4a] . [00] . [05] . [0e] . [06] . [80] . [00] . [8e] . [80] . [d2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: J [4a] 
0x4a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: [ [5b] 
0x5b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6f , 10)
avrdude: Send: . [1b] K [4b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] o [6f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: K [4b] 
0x4b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [10] 
0x10 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [07] 
0x07 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ed] 
0xed avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [83] 
0x83 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: u [75] 
0x75 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,73216,256)
block_size at addr 73216 is 256
STK500V2: stk500v2_loadaddr(-2147447040)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x8f 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x4c 0x00 0x05 0x0e 0x06 0x80 0x00 0x8f 0x00 0x55 , 11)
avrdude: Send: . [1b] L [4c] . [00] . [05] . [0e] . [06] . [80] . [00] . [8f] . [00] U [55] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: L [4c] 
0x4c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ] [5d] 
0x5d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x69 , 10)
avrdude: Send: . [1b] M [4d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] i [69] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: M [4d] 
0x4d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ed] 
0xed avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [97] 
0x97 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [83] 
0x83 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [10] 
0x10 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: r [72] 
0x72 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,73472,256)
block_size at addr 73472 is 256
STK500V2: stk500v2_loadaddr(-2147446912)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x8f 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x4e 0x00 0x05 0x0e 0x06 0x80 0x00 0x8f 0x80 0xd7 , 11)
avrdude: Send: . [1b] N [4e] . [00] . [05] . [0e] . [06] . [80] . [00] . [8f] . [80] . [d7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: N [4e] 
0x4e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: _ [5f] 
0x5f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6b , 10)
avrdude: Send: . [1b] O [4f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] k [6b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: O [4f] 
0x4f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [07] 
0x07 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ed] 
0xed avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [83] 
0x83 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ed] 
0xed avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [97] 
0x97 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [83] 
0x83 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,73728,256)
block_size at addr 73728 is 256
STK500V2: stk500v2_loadaddr(-2147446784)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x90 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x50 0x00 0x05 0x0e 0x06 0x80 0x00 0x90 0x00 0x56 , 11)
avrdude: Send: . [1b] P [50] . [00] . [05] . [0e] . [06] . [80] . [00] . [90] . [00] V [56] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: P [50] 
0x50 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x51 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x75 , 10)
avrdude: Send: . [1b] Q [51] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] u [75] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Q [51] 
0x51 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [10] 
0x10 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [07] 
0x07 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [83] 
0x83 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [02] 
0x02 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,73984,256)
block_size at addr 73984 is 256
STK500V2: stk500v2_loadaddr(-2147446656)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x90 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x52 0x00 0x05 0x0e 0x06 0x80 0x00 0x90 0x80 0xd4 , 11)
avrdude: Send: . [1b] R [52] . [00] . [05] . [0e] . [06] . [80] . [00] . [90] . [80] . [d4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: R [52] 
0x52 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: C [43] 
0x43 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x53 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x77 , 10)
avrdude: Send: . [1b] S [53] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] w [77] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: S [53] 
0x53 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [97] 
0x97 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [83] 
0x83 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: } [7d] 
0x7d 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,74240,256)
block_size at addr 74240 is 256
STK500V2: stk500v2_loadaddr(-2147446528)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x91 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x54 0x00 0x05 0x0e 0x06 0x80 0x00 0x91 0x00 0x53 , 11)
avrdude: Send: . [1b] T [54] . [00] . [05] . [0e] . [06] . [80] . [00] . [91] . [00] S [53] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: T [54] 
0x54 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x55 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x71 , 10)
avrdude: Send: . [1b] U [55] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] q [71] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: U [55] 
0x55 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [10] 
0x10 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [07] 
0x07 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ed] 
0xed avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [83] 
0x83 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ed] 
0xed avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d8] 
0xd8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,74496,256)
block_size at addr 74496 is 256
STK500V2: stk500v2_loadaddr(-2147446400)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x91 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x56 0x00 0x05 0x0e 0x06 0x80 0x00 0x91 0x80 0xd1 , 11)
avrdude: Send: . [1b] V [56] . [00] . [05] . [0e] . [06] . [80] . [00] . [91] . [80] . [d1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: V [56] 
0x56 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: G [47] 
0x47 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x57 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x73 , 10)
avrdude: Send: . [1b] W [57] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] s [73] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: W [57] 
0x57 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [83] 
0x83 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [10] 
0x10 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [07] 
0x07 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [1f] 
0x1f avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9c] 
0x9c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,74752,256)
block_size at addr 74752 is 256
STK500V2: stk500v2_loadaddr(-2147446272)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x92 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x58 0x00 0x05 0x0e 0x06 0x80 0x00 0x92 0x00 0x5c , 11)
avrdude: Send: . [1b] X [58] . [00] . [05] . [0e] . [06] . [80] . [00] . [92] . [00] \ [5c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: X [58] 
0x58 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: I [49] 
0x49 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x59 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7d , 10)
avrdude: Send: . [1b] Y [59] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] } [7d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Y [59] 
0x59 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [1f] 
0x1f avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [97] 
0x97 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [83] 
0x83 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: X [58] 
0x58 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,75008,256)
block_size at addr 75008 is 256
STK500V2: stk500v2_loadaddr(-2147446144)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x92 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x5a 0x00 0x05 0x0e 0x06 0x80 0x00 0x92 0x80 0xde , 11)
avrdude: Send: . [1b] Z [5a] . [00] . [05] . [0e] . [06] . [80] . [00] . [92] . [80] . [de] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Z [5a] 
0x5a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: K [4b] 
0x4b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7f , 10)
avrdude: Send: . [1b] [ [5b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [7f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: [ [5b] 
0x5b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [07] 
0x07 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b2] 
0xb2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,75264,256)
block_size at addr 75264 is 256
STK500V2: stk500v2_loadaddr(-2147446016)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x93 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x5c 0x00 0x05 0x0e 0x06 0x80 0x00 0x93 0x00 0x59 , 11)
avrdude: Send: . [1b] \ [5c] . [00] . [05] . [0e] . [06] . [80] . [00] . [93] . [00] Y [59] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: \ [5c] 
0x5c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x79 , 10)
avrdude: Send: . [1b] ] [5d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] y [79] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ] [5d] 
0x5d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [13] 
0x13 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0c] 
0x0c avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [ea] 
0xea avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: O [4f] 
0x4f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [83] 
0x83 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [01] 
0x01 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [ea] 
0xea avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [ea] 
0xea avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ff] 
0xff avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [89] 
0x89 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [af] 
0xaf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: g [67] 
0x67 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [11] 
0x11 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e6] 
0xe6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,75520,256)
block_size at addr 75520 is 256
STK500V2: stk500v2_loadaddr(-2147445888)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x93 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x5e 0x00 0x05 0x0e 0x06 0x80 0x00 0x93 0x80 0xdb , 11)
avrdude: Send: . [1b] ^ [5e] . [00] . [05] . [0e] . [06] . [80] . [00] . [93] . [80] . [db] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ^ [5e] 
0x5e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: O [4f] 
0x4f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7b , 10)
avrdude: Send: . [1b] _ [5f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] { [7b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: _ [5f] 
0x5f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [ef] 
0xef avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [12] 
0x12 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [af] 
0xaf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: c [63] 
0x63 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,75776,256)
block_size at addr 75776 is 256
STK500V2: stk500v2_loadaddr(-2147445760)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x94 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x60 0x00 0x05 0x0e 0x06 0x80 0x00 0x94 0x00 0x62 , 11)
avrdude: Send: . [1b] ` [60] . [00] . [05] . [0e] . [06] . [80] . [00] . [94] . [00] b [62] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ` [60] 
0x60 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: q [71] 
0x71 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x61 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x45 , 10)
avrdude: Send: . [1b] a [61] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] E [45] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: a [61] 
0x61 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [09] 
0x09 avrdude: Recv: h [68] 
0x68 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [95] 
0x95 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [19] 
0x19 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f5] 
0xf5 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,76032,256)
block_size at addr 76032 is 256
STK500V2: stk500v2_loadaddr(-2147445632)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x94 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x62 0x00 0x05 0x0e 0x06 0x80 0x00 0x94 0x80 0xe0 , 11)
avrdude: Send: . [1b] b [62] . [00] . [05] . [0e] . [06] . [80] . [00] . [94] . [80] . [e0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: b [62] 
0x62 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: s [73] 
0x73 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x63 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x47 , 10)
avrdude: Send: . [1b] c [63] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] G [47] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: c [63] 
0x63 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [95] 
0x95 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [af] 
0xaf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [84] 
0x84 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [97] 
0x97 avrdude: Recv: E [45] 
0x45 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: " [22] 
0x22 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [05] 
0x05 avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: " [22] 
0x22 avrdude: Recv: ` [60] 
0x60 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [17] 
0x17 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: h [68] 
0x68 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,76288,256)
block_size at addr 76288 is 256
STK500V2: stk500v2_loadaddr(-2147445504)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x95 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x64 0x00 0x05 0x0e 0x06 0x80 0x00 0x95 0x00 0x67 , 11)
avrdude: Send: . [1b] d [64] . [00] . [05] . [0e] . [06] . [80] . [00] . [95] . [00] g [67] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: d [64] 
0x64 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: u [75] 
0x75 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x65 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x41 , 10)
avrdude: Send: . [1b] e [65] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] A [41] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: e [65] 
0x65 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [06] 
0x06 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [19] 
0x19 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [09] 
0x09 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [84] 
0x84 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [97] 
0x97 avrdude: Recv: E [45] 
0x45 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [cd] 
0xcd avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [12] 
0x12 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ce] 
0xce avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [9e] 
0x9e avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,76544,256)
block_size at addr 76544 is 256
STK500V2: stk500v2_loadaddr(-2147445376)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x95 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x66 0x00 0x05 0x0e 0x06 0x80 0x00 0x95 0x80 0xe5 , 11)
avrdude: Send: . [1b] f [66] . [00] . [05] . [0e] . [06] . [80] . [00] . [95] . [80] . [e5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: f [66] 
0x66 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: w [77] 
0x77 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x67 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x43 , 10)
avrdude: Send: . [1b] g [67] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] C [43] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: g [67] 
0x67 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [06] 
0x06 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [19] 
0x19 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [09] 
0x09 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [91] 
0x91 avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [91] 
0x91 avrdude: Recv:   [20] 
0x20 avrdude: Recv: | [7c] 
0x7c avrdude: Recv:   [20] 
0x20 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [90] 
0x90 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [98] 
0x98 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [98] 
0x98 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [98] 
0x98 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,76800,256)
block_size at addr 76800 is 256
STK500V2: stk500v2_loadaddr(-2147445248)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x96 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x68 0x00 0x05 0x0e 0x06 0x80 0x00 0x96 0x00 0x68 , 11)
avrdude: Send: . [1b] h [68] . [00] . [05] . [0e] . [06] . [80] . [00] . [96] . [00] h [68] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: h [68] 
0x68 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: y [79] 
0x79 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x69 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4d , 10)
avrdude: Send: . [1b] i [69] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] M [4d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: i [69] 
0x69 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: V [56] 
0x56 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [81] 
0x81 avrdude: Recv: H [48] 
0x48 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: G [47] 
0x47 avrdude: Recv: p [70] 
0x70 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [95] 
0x95 avrdude: Recv: V [56] 
0x56 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: W [57] 
0x57 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: @ [40] 
0x40 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [95] 
0x95 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [95] 
0x95 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [81] 
0x81 avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [83] 
0x83 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ae] 
0xae 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,77056,256)
block_size at addr 77056 is 256
STK500V2: stk500v2_loadaddr(-2147445120)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x96 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x6a 0x00 0x05 0x0e 0x06 0x80 0x00 0x96 0x80 0xea , 11)
avrdude: Send: . [1b] j [6a] . [00] . [05] . [0e] . [06] . [80] . [00] . [96] . [80] . [ea] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: j [6a] 
0x6a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: { [7b] 
0x7b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4f , 10)
avrdude: Send: . [1b] k [6b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] O [4f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: k [6b] 
0x6b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,77312,256)
block_size at addr 77312 is 256
STK500V2: stk500v2_loadaddr(-2147444992)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x97 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x6c 0x00 0x05 0x0e 0x06 0x80 0x00 0x97 0x00 0x6d , 11)
avrdude: Send: . [1b] l [6c] . [00] . [05] . [0e] . [06] . [80] . [00] . [97] . [00] m [6d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: l [6c] 
0x6c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: } [7d] 
0x7d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x49 , 10)
avrdude: Send: . [1b] m [6d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] I [49] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: m [6d] 
0x6d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,77568,256)
block_size at addr 77568 is 256
STK500V2: stk500v2_loadaddr(-2147444864)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x97 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x6e 0x00 0x05 0x0e 0x06 0x80 0x00 0x97 0x80 0xef , 11)
avrdude: Send: . [1b] n [6e] . [00] . [05] . [0e] . [06] . [80] . [00] . [97] . [80] . [ef] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: n [6e] 
0x6e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [7f] 
0x7f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4b , 10)
avrdude: Send: . [1b] o [6f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] K [4b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: o [6f] 
0x6f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,77824,256)
block_size at addr 77824 is 256
STK500V2: stk500v2_loadaddr(-2147444736)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x98 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x70 0x00 0x05 0x0e 0x06 0x80 0x00 0x98 0x00 0x7e , 11)
avrdude: Send: . [1b] p [70] . [00] . [05] . [0e] . [06] . [80] . [00] . [98] . [00] ~ [7e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: p [70] 
0x70 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: a [61] 
0x61 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x71 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x55 , 10)
avrdude: Send: . [1b] q [71] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] U [55] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: q [71] 
0x71 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8a] 
0x8a avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: + [2b] 
0x2b avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [89] 
0x89 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ee] 
0xee avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [94] 
0x94 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a9] 
0xa9 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,78080,256)
block_size at addr 78080 is 256
STK500V2: stk500v2_loadaddr(-2147444608)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x98 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x72 0x00 0x05 0x0e 0x06 0x80 0x00 0x98 0x80 0xfc , 11)
avrdude: Send: . [1b] r [72] . [00] . [05] . [0e] . [06] . [80] . [00] . [98] . [80] . [fc] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: r [72] 
0x72 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: c [63] 
0x63 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x73 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x57 , 10)
avrdude: Send: . [1b] s [73] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] W [57] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: s [73] 
0x73 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [97] 
0x97 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [17] 
0x17 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [97] 
0x97 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [91] 
0x91 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [83] 
0x83 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [17] 
0x17 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [17] 
0x17 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [17] 
0x17 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [17] 
0x17 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: P [50] 
0x50 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [17] 
0x17 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [17] 
0x17 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [17] 
0x17 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [06] 
0x06 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [14] 
0x14 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [81] 
0x81 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: \ [5c] 
0x5c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,78336,256)
block_size at addr 78336 is 256
STK500V2: stk500v2_loadaddr(-2147444480)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x99 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x74 0x00 0x05 0x0e 0x06 0x80 0x00 0x99 0x00 0x7b , 11)
avrdude: Send: . [1b] t [74] . [00] . [05] . [0e] . [06] . [80] . [00] . [99] . [00] { [7b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: t [74] 
0x74 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: e [65] 
0x65 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x75 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x51 , 10)
avrdude: Send: . [1b] u [75] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] Q [51] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: u [75] 
0x75 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [81] 
0x81 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [81] 
0x81 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [81] 
0x81 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [15] 
0x15 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [81] 
0x81 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [15] 
0x15 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [14] 
0x14 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [89] 
0x89 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0a] 
0x0a avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [10] 
0x10 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [8b] 
0x8b avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [92] 
0x92 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [82] 
0x82 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [8b] 
0x8b avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: p [70] 
0x70 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ef] 
0xef avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ea] 
0xea avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0f] 
0x0f avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d4] 
0xd4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,78592,256)
block_size at addr 78592 is 256
STK500V2: stk500v2_loadaddr(-2147444352)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x99 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x76 0x00 0x05 0x0e 0x06 0x80 0x00 0x99 0x80 0xf9 , 11)
avrdude: Send: . [1b] v [76] . [00] . [05] . [0e] . [06] . [80] . [00] . [99] . [80] . [f9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: v [76] 
0x76 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: g [67] 
0x67 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x77 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x53 , 10)
avrdude: Send: . [1b] w [77] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] S [53] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: w [77] 
0x77 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: - [2d] 
0x2d avrdude: Recv: - [2d] 
0x2d avrdude: Recv: - [2d] 
0x2d avrdude: Recv: A [41] 
0x41 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: l [6c] 
0x6c avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [94] 
0x94 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: , [2c] 
0x2c avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: m [6d] 
0x6d avrdude: Recv: , [2c] 
0x2c avrdude: Recv: q [71] 
0x71 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: - [2d] 
0x2d avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [81] 
0x81 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [de] 
0xde avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [08] 
0x08 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [1f] 
0x1f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [80] 
0x80 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: X [58] 
0x58 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: S [53] 
0x53 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,78848,256)
block_size at addr 78848 is 256
STK500V2: stk500v2_loadaddr(-2147444224)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x9a 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x78 0x00 0x05 0x0e 0x06 0x80 0x00 0x9a 0x00 0x74 , 11)
avrdude: Send: . [1b] x [78] . [00] . [05] . [0e] . [06] . [80] . [00] . [9a] . [00] t [74] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: x [78] 
0x78 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: i [69] 
0x69 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x79 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5d , 10)
avrdude: Send: . [1b] y [79] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ] [5d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: y [79] 
0x79 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [ea] 
0xea avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [ee] 
0xee avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fb] 
0xfb 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,79104,256)
block_size at addr 79104 is 256
STK500V2: stk500v2_loadaddr(-2147444096)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x9a 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x7a 0x00 0x05 0x0e 0x06 0x80 0x00 0x9a 0x80 0xf6 , 11)
avrdude: Send: . [1b] z [7a] . [00] . [05] . [0e] . [06] . [80] . [00] . [9a] . [80] . [f6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: z [7a] 
0x7a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: k [6b] 
0x6b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5f , 10)
avrdude: Send: . [1b] { [7b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] _ [5f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: { [7b] 
0x7b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [80] 
0x80 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [ee] 
0xee avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: W [57] 
0x57 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,79360,256)
block_size at addr 79360 is 256
STK500V2: stk500v2_loadaddr(-2147443968)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x9b 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x7c 0x00 0x05 0x0e 0x06 0x80 0x00 0x9b 0x00 0x71 , 11)
avrdude: Send: . [1b] | [7c] . [00] . [05] . [0e] . [06] . [80] . [00] . [9b] . [00] q [71] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: | [7c] 
0x7c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: m [6d] 
0x6d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x59 , 10)
avrdude: Send: . [1b] } [7d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] Y [59] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: } [7d] 
0x7d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [80] 
0x80 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: X [58] 
0x58 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Q [51] 
0x51 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,79616,256)
block_size at addr 79616 is 256
STK500V2: stk500v2_loadaddr(-2147443840)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x9b 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x7e 0x00 0x05 0x0e 0x06 0x80 0x00 0x9b 0x80 0xf3 , 11)
avrdude: Send: . [1b] ~ [7e] . [00] . [05] . [0e] . [06] . [80] . [00] . [9b] . [80] . [f3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ~ [7e] 
0x7e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: o [6f] 
0x6f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5b , 10)
avrdude: Send: . [1b] . [7f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] [ [5b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [7f] 
0x7f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [ee] 
0xee avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [80] 
0x80 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [ec] 
0xec avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [7f] 
0x7f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,79872,256)
block_size at addr 79872 is 256
STK500V2: stk500v2_loadaddr(-2147443712)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x9c 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x80 0x00 0x05 0x0e 0x06 0x80 0x00 0x9c 0x00 0x8a , 11)
avrdude: Send: . [1b] . [80] . [00] . [05] . [0e] . [06] . [80] . [00] . [9c] . [00] . [8a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [80] 
0x80 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x81 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa5 , 10)
avrdude: Send: . [1b] . [81] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [81] 
0x81 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [ee] 
0xee avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [80] 
0x80 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: L [4c] 
0x4c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,80128,256)
block_size at addr 80128 is 256
STK500V2: stk500v2_loadaddr(-2147443584)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x9c 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x82 0x00 0x05 0x0e 0x06 0x80 0x00 0x9c 0x80 0x08 , 11)
avrdude: Send: . [1b] . [82] . [00] . [05] . [0e] . [06] . [80] . [00] . [9c] . [80] . [08] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [82] 
0x82 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x83 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa7 , 10)
avrdude: Send: . [1b] . [83] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [83] 
0x83 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [ee] 
0xee avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [15] 
0x15 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,80384,256)
block_size at addr 80384 is 256
STK500V2: stk500v2_loadaddr(-2147443456)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x9d 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x84 0x00 0x05 0x0e 0x06 0x80 0x00 0x9d 0x00 0x8f , 11)
avrdude: Send: . [1b] . [84] . [00] . [05] . [0e] . [06] . [80] . [00] . [9d] . [00] . [8f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [84] 
0x84 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [95] 
0x95 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x85 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa1 , 10)
avrdude: Send: . [1b] . [85] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [85] 
0x85 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [ff] 
0xff avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [07] 
0x07 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [ee] 
0xee avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [ea] 
0xea avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e9] 
0xe9 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,80640,256)
block_size at addr 80640 is 256
STK500V2: stk500v2_loadaddr(-2147443328)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x9d 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x86 0x00 0x05 0x0e 0x06 0x80 0x00 0x9d 0x80 0x0d , 11)
avrdude: Send: . [1b] . [86] . [00] . [05] . [0e] . [06] . [80] . [00] . [9d] . [80] . [0d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [86] 
0x86 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x87 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa3 , 10)
avrdude: Send: . [1b] . [87] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [87] 
0x87 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [10] 
0x10 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [05] 
0x05 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [86] 
0x86 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: i [69] 
0x69 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [17] 
0x17 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [00] 
0x00 avrdude: Recv: z [7a] 
0x7a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,80896,256)
block_size at addr 80896 is 256
STK500V2: stk500v2_loadaddr(-2147443200)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x9e 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x88 0x00 0x05 0x0e 0x06 0x80 0x00 0x9e 0x00 0x80 , 11)
avrdude: Send: . [1b] . [88] . [00] . [05] . [0e] . [06] . [80] . [00] . [9e] . [00] . [80] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [88] 
0x88 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [99] 
0x99 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x89 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xad , 10)
avrdude: Send: . [1b] . [89] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ad] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [89] 
0x89 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [cc] 
0xcc avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8d] 
0x8d avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [0c] 
0x0c avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [84] 
0x84 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [9f] 
0x9f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: ^ [5e] 
0x5e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,81152,256)
block_size at addr 81152 is 256
STK500V2: stk500v2_loadaddr(-2147443072)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x9e 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x8a 0x00 0x05 0x0e 0x06 0x80 0x00 0x9e 0x80 0x02 , 11)
avrdude: Send: . [1b] . [8a] . [00] . [05] . [0e] . [06] . [80] . [00] . [9e] . [80] . [02] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8a] 
0x8a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9b] 
0x9b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xaf , 10)
avrdude: Send: . [1b] . [8b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [af] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8b] 
0x8b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: & [26] 
0x26 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [de] 
0xde avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [cd] 
0xcd avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [91] 
0x91 avrdude: Recv:   [20] 
0x20 avrdude: Recv: | [7c] 
0x7c avrdude: Recv:   [20] 
0x20 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [dd] 
0xdd avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [de] 
0xde avrdude: Recv: . [ce] 
0xce avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [05] 
0x05 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [cd] 
0xcd avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [91] 
0x91 avrdude: Recv:   [20] 
0x20 avrdude: Recv: | [7c] 
0x7c avrdude: Recv:   [20] 
0x20 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ce] 
0xce avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [ed] 
0xed avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: a [61] 
0x61 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a5] 
0xa5 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,81408,256)
block_size at addr 81408 is 256
STK500V2: stk500v2_loadaddr(-2147442944)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x9f 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x8c 0x00 0x05 0x0e 0x06 0x80 0x00 0x9f 0x00 0x85 , 11)
avrdude: Send: . [1b] . [8c] . [00] . [05] . [0e] . [06] . [80] . [00] . [9f] . [00] . [85] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8c] 
0x8c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9d] 
0x9d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa9 , 10)
avrdude: Send: . [1b] . [8d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8d] 
0x8d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: q [71] 
0x71 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [de] 
0xde avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [8d] 
0x8d avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d1] 
0xd1 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,81664,256)
block_size at addr 81664 is 256
STK500V2: stk500v2_loadaddr(-2147442816)
STK500V2: stk500v2_command(0x06 0x80 0x00 0x9f 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x8e 0x00 0x05 0x0e 0x06 0x80 0x00 0x9f 0x80 0x07 , 11)
avrdude: Send: . [1b] . [8e] . [00] . [05] . [0e] . [06] . [80] . [00] . [9f] . [80] . [07] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8e] 
0x8e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xab , 10)
avrdude: Send: . [1b] . [8f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ab] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8f] 
0x8f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [92] 
0x92 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [92] 
0x92 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [92] 
0x92 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [92] 
0x92 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [92] 
0x92 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [92] 
0x92 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [92] 
0x92 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [eb] 
0xeb avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [df] 
0xdf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 7 [37] 
0x37 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,81920,256)
block_size at addr 81920 is 256
STK500V2: stk500v2_loadaddr(-2147442688)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xa0 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x90 0x00 0x05 0x0e 0x06 0x80 0x00 0xa0 0x00 0xa6 , 11)
avrdude: Send: . [1b] . [90] . [00] . [05] . [0e] . [06] . [80] . [00] . [a0] . [00] . [a6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [90] 
0x90 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x91 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb5 , 10)
avrdude: Send: . [1b] . [91] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [91] 
0x91 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [11] 
0x11 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c5] 
0xc5 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,82176,256)
block_size at addr 82176 is 256
STK500V2: stk500v2_loadaddr(-2147442560)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xa0 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x92 0x00 0x05 0x0e 0x06 0x80 0x00 0xa0 0x80 0x24 , 11)
avrdude: Send: . [1b] . [92] . [00] . [05] . [0e] . [06] . [80] . [00] . [a0] . [80] $ [24] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [92] 
0x92 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [83] 
0x83 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x93 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb7 , 10)
avrdude: Send: . [1b] . [93] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [93] 
0x93 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [cf] 
0xcf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [df] 
0xdf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [10] 
0x10 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 7 [37] 
0x37 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,82432,256)
block_size at addr 82432 is 256
STK500V2: stk500v2_loadaddr(-2147442432)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xa1 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x94 0x00 0x05 0x0e 0x06 0x80 0x00 0xa1 0x00 0xa3 , 11)
avrdude: Send: . [1b] . [94] . [00] . [05] . [0e] . [06] . [80] . [00] . [a1] . [00] . [a3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [94] 
0x94 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [85] 
0x85 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x95 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb1 , 10)
avrdude: Send: . [1b] . [95] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [95] 
0x95 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [ea] 
0xea avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [eb] 
0xeb avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [12] 
0x12 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [01] 
0x01 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,82688,256)
block_size at addr 82688 is 256
STK500V2: stk500v2_loadaddr(-2147442304)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xa1 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x96 0x00 0x05 0x0e 0x06 0x80 0x00 0xa1 0x80 0x21 , 11)
avrdude: Send: . [1b] . [96] . [00] . [05] . [0e] . [06] . [80] . [00] . [a1] . [80] ! [21] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [96] 
0x96 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x97 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb3 , 10)
avrdude: Send: . [1b] . [97] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [97] 
0x97 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [ee] 
0xee avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [15] 
0x15 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [eb] 
0xeb avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [81] 
0x81 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [0e] 
0x0e avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,82944,256)
block_size at addr 82944 is 256
STK500V2: stk500v2_loadaddr(-2147442176)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xa2 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x98 0x00 0x05 0x0e 0x06 0x80 0x00 0xa2 0x00 0xac , 11)
avrdude: Send: . [1b] . [98] . [00] . [05] . [0e] . [06] . [80] . [00] . [a2] . [00] . [ac] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [98] 
0x98 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [89] 
0x89 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x99 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbd , 10)
avrdude: Send: . [1b] . [99] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [99] 
0x99 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [83] 
0x83 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [83] 
0x83 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [15] 
0x15 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: D [44] 
0x44 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [db] 
0xdb 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,83200,256)
block_size at addr 83200 is 256
STK500V2: stk500v2_loadaddr(-2147442048)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xa2 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x9a 0x00 0x05 0x0e 0x06 0x80 0x00 0xa2 0x80 0x2e , 11)
avrdude: Send: . [1b] . [9a] . [00] . [05] . [0e] . [06] . [80] . [00] . [a2] . [80] . [2e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9a] 
0x9a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8b] 
0x8b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbf , 10)
avrdude: Send: . [1b] . [9b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9b] 
0x9b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [99] 
0x99 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [94] 
0x94 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ' [27] 
0x27 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,83456,256)
block_size at addr 83456 is 256
STK500V2: stk500v2_loadaddr(-2147441920)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xa3 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x9c 0x00 0x05 0x0e 0x06 0x80 0x00 0xa3 0x00 0xa9 , 11)
avrdude: Send: . [1b] . [9c] . [00] . [05] . [0e] . [06] . [80] . [00] . [a3] . [00] . [a9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9c] 
0x9c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb9 , 10)
avrdude: Send: . [1b] . [9d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9d] 
0x9d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [ef] 
0xef avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [ee] 
0xee avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [92] 
0x92 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,83712,256)
block_size at addr 83712 is 256
STK500V2: stk500v2_loadaddr(-2147441792)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xa3 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x9e 0x00 0x05 0x0e 0x06 0x80 0x00 0xa3 0x80 0x2b , 11)
avrdude: Send: . [1b] . [9e] . [00] . [05] . [0e] . [06] . [80] . [00] . [a3] . [80] + [2b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9e] 
0x9e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbb , 10)
avrdude: Send: . [1b] . [9f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9f] 
0x9f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [df] 
0xdf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [10] 
0x10 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [ec] 
0xec avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [00] 
0x00 avrdude: Recv: ' [27] 
0x27 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,83968,256)
block_size at addr 83968 is 256
STK500V2: stk500v2_loadaddr(-2147441664)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xa4 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa0 0x00 0x05 0x0e 0x06 0x80 0x00 0xa4 0x00 0x92 , 11)
avrdude: Send: . [1b] . [a0] . [00] . [05] . [0e] . [06] . [80] . [00] . [a4] . [00] . [92] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a0] 
0xa0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b1] 
0xb1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x85 , 10)
avrdude: Send: . [1b] . [a1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [85] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a1] 
0xa1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: U [55] 
0x55 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [ed] 
0xed avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [ec] 
0xec avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e8] 
0xe8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,84224,256)
block_size at addr 84224 is 256
STK500V2: stk500v2_loadaddr(-2147441536)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xa4 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xa2 0x00 0x05 0x0e 0x06 0x80 0x00 0xa4 0x80 0x10 , 11)
avrdude: Send: . [1b] . [a2] . [00] . [05] . [0e] . [06] . [80] . [00] . [a4] . [80] . [10] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a2] 
0xa2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b3] 
0xb3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x87 , 10)
avrdude: Send: . [1b] . [a3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [87] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a3] 
0xa3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: % [25] 
0x25 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,84480,256)
block_size at addr 84480 is 256
STK500V2: stk500v2_loadaddr(-2147441408)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xa5 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa4 0x00 0x05 0x0e 0x06 0x80 0x00 0xa5 0x00 0x97 , 11)
avrdude: Send: . [1b] . [a4] . [00] . [05] . [0e] . [06] . [80] . [00] . [a5] . [00] . [97] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a4] 
0xa4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b5] 
0xb5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x81 , 10)
avrdude: Send: . [1b] . [a5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [81] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a5] 
0xa5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [df] 
0xdf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [ec] 
0xec avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [ec] 
0xec avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [ec] 
0xec avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: z [7a] 
0x7a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,84736,256)
block_size at addr 84736 is 256
STK500V2: stk500v2_loadaddr(-2147441280)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xa5 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xa6 0x00 0x05 0x0e 0x06 0x80 0x00 0xa5 0x80 0x15 , 11)
avrdude: Send: . [1b] . [a6] . [00] . [05] . [0e] . [06] . [80] . [00] . [a5] . [80] . [15] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a6] 
0xa6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b7] 
0xb7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x83 , 10)
avrdude: Send: . [1b] . [a7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [83] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a7] 
0xa7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [02] 
0x02 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ed] 
0xed avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [02] 
0x02 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [ea] 
0xea avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [00] 
0x00 avrdude: Recv: ^ [5e] 
0x5e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,84992,256)
block_size at addr 84992 is 256
STK500V2: stk500v2_loadaddr(-2147441152)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xa6 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa8 0x00 0x05 0x0e 0x06 0x80 0x00 0xa6 0x00 0x98 , 11)
avrdude: Send: . [1b] . [a8] . [00] . [05] . [0e] . [06] . [80] . [00] . [a6] . [00] . [98] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a8] 
0xa8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b9] 
0xb9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8d , 10)
avrdude: Send: . [1b] . [a9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a9] 
0xa9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [15] 
0x15 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [03] 
0x03 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [03] 
0x03 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [83] 
0x83 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8b] 
0x8b 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,85248,256)
block_size at addr 85248 is 256
STK500V2: stk500v2_loadaddr(-2147441024)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xa6 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xaa 0x00 0x05 0x0e 0x06 0x80 0x00 0xa6 0x80 0x1a , 11)
avrdude: Send: . [1b] . [aa] . [00] . [05] . [0e] . [06] . [80] . [00] . [a6] . [80] . [1a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [aa] 
0xaa hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bb] 
0xbb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xab 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8f , 10)
avrdude: Send: . [1b] . [ab] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ab] 
0xab hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [90] 
0x90 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [90] 
0x90 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [90] 
0x90 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [14] 
0x14 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [04] 
0x04 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [04] 
0x04 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [81] 
0x81 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: I [49] 
0x49 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,85504,256)
block_size at addr 85504 is 256
STK500V2: stk500v2_loadaddr(-2147440896)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xa7 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xac 0x00 0x05 0x0e 0x06 0x80 0x00 0xa7 0x00 0x9d , 11)
avrdude: Send: . [1b] . [ac] . [00] . [05] . [0e] . [06] . [80] . [00] . [a7] . [00] . [9d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ac] 
0xac hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bd] 
0xbd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xad 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x89 , 10)
avrdude: Send: . [1b] . [ad] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [89] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ad] 
0xad hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [91] 
0x91 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [83] 
0x83 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [ec] 
0xec avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [ec] 
0xec avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [ec] 
0xec avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [cf] 
0xcf avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: a [61] 
0x61 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 9 [39] 
0x39 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,85760,256)
block_size at addr 85760 is 256
STK500V2: stk500v2_loadaddr(-2147440768)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xa7 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xae 0x00 0x05 0x0e 0x06 0x80 0x00 0xa7 0x80 0x1f , 11)
avrdude: Send: . [1b] . [ae] . [00] . [05] . [0e] . [06] . [80] . [00] . [a7] . [80] . [1f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ae] 
0xae hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bf] 
0xbf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xaf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8b , 10)
avrdude: Send: . [1b] . [af] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [af] 
0xaf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [92] 
0x92 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: f [66] 
0x66 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: \ [5c] 
0x5c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,86016,256)
block_size at addr 86016 is 256
STK500V2: stk500v2_loadaddr(-2147440640)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xa8 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb0 0x00 0x05 0x0e 0x06 0x80 0x00 0xa8 0x00 0x8e , 11)
avrdude: Send: . [1b] . [b0] . [00] . [05] . [0e] . [06] . [80] . [00] . [a8] . [00] . [8e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b0] 
0xb0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a1] 
0xa1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x95 , 10)
avrdude: Send: . [1b] . [b1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [95] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b1] 
0xb1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [10] 
0x10 avrdude: Recv: # [23] 
0x23 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [98] 
0x98 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [ed] 
0xed avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: f [66] 
0x66 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [12] 
0x12 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [15] 
0x15 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ed] 
0xed avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: f [66] 
0x66 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [13] 
0x13 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [17] 
0x17 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: z [7a] 
0x7a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,86272,256)
block_size at addr 86272 is 256
STK500V2: stk500v2_loadaddr(-2147440512)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xa8 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xb2 0x00 0x05 0x0e 0x06 0x80 0x00 0xa8 0x80 0x0c , 11)
avrdude: Send: . [1b] . [b2] . [00] . [05] . [0e] . [06] . [80] . [00] . [a8] . [80] . [0c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b2] 
0xb2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a3] 
0xa3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x97 , 10)
avrdude: Send: . [1b] . [b3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [97] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b3] 
0xb3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: f [66] 
0x66 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [ce] 
0xce avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [94] 
0x94 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [94] 
0x94 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [92] 
0x92 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [86] 
0x86 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [18] 
0x18 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,86528,256)
block_size at addr 86528 is 256
STK500V2: stk500v2_loadaddr(-2147440384)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xa9 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb4 0x00 0x05 0x0e 0x06 0x80 0x00 0xa9 0x00 0x8b , 11)
avrdude: Send: . [1b] . [b4] . [00] . [05] . [0e] . [06] . [80] . [00] . [a9] . [00] . [8b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b4] 
0xb4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a5] 
0xa5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x91 , 10)
avrdude: Send: . [1b] . [b5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [91] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b5] 
0xb5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [96] 
0x96 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [87] 
0x87 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [05] 
0x05 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [92] 
0x92 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [ef] 
0xef avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [11] 
0x11 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [ec] 
0xec avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1a] 
0x1a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,86784,256)
block_size at addr 86784 is 256
STK500V2: stk500v2_loadaddr(-2147440256)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xa9 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xb6 0x00 0x05 0x0e 0x06 0x80 0x00 0xa9 0x80 0x09 , 11)
avrdude: Send: . [1b] . [b6] . [00] . [05] . [0e] . [06] . [80] . [00] . [a9] . [80] . [09] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b6] 
0xb6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a7] 
0xa7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x93 , 10)
avrdude: Send: . [1b] . [b7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [93] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b7] 
0xb7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [cf] 
0xcf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [df] 
0xdf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f7] 
0xf7 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,87040,256)
block_size at addr 87040 is 256
STK500V2: stk500v2_loadaddr(-2147440128)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xaa 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb8 0x00 0x05 0x0e 0x06 0x80 0x00 0xaa 0x00 0x84 , 11)
avrdude: Send: . [1b] . [b8] . [00] . [05] . [0e] . [06] . [80] . [00] . [aa] . [00] . [84] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b8] 
0xb8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a9] 
0xa9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9d , 10)
avrdude: Send: . [1b] . [b9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b9] 
0xb9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [11] 
0x11 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c9] 
0xc9 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,87296,256)
block_size at addr 87296 is 256
STK500V2: stk500v2_loadaddr(-2147440000)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xaa 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xba 0x00 0x05 0x0e 0x06 0x80 0x00 0xaa 0x80 0x06 , 11)
avrdude: Send: . [1b] . [ba] . [00] . [05] . [0e] . [06] . [80] . [00] . [aa] . [80] . [06] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ba] 
0xba hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ab] 
0xab 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9f , 10)
avrdude: Send: . [1b] . [bb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bb] 
0xbb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [cf] 
0xcf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [df] 
0xdf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: g [67] 
0x67 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: W [57] 
0x57 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: q [71] 
0x71 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ee] 
0xee avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: 0 [30] 
0x30 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,87552,256)
block_size at addr 87552 is 256
STK500V2: stk500v2_loadaddr(-2147439872)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xab 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xbc 0x00 0x05 0x0e 0x06 0x80 0x00 0xab 0x00 0x81 , 11)
avrdude: Send: . [1b] . [bc] . [00] . [05] . [0e] . [06] . [80] . [00] . [ab] . [00] . [81] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bc] 
0xbc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ad] 
0xad 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x99 , 10)
avrdude: Send: . [1b] . [bd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [99] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bd] 
0xbd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ea] 
0xea avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: g [67] 
0x67 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [ee] 
0xee avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,87808,256)
block_size at addr 87808 is 256
STK500V2: stk500v2_loadaddr(-2147439744)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xab 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xbe 0x00 0x05 0x0e 0x06 0x80 0x00 0xab 0x80 0x03 , 11)
avrdude: Send: . [1b] . [be] . [00] . [05] . [0e] . [06] . [80] . [00] . [ab] . [80] . [03] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [be] 
0xbe hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [af] 
0xaf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9b , 10)
avrdude: Send: . [1b] . [bf] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bf] 
0xbf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [ea] 
0xea avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [ee] 
0xee avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [12] 
0x12 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [ea] 
0xea avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,88064,256)
block_size at addr 88064 is 256
STK500V2: stk500v2_loadaddr(-2147439616)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xac 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc0 0x00 0x05 0x0e 0x06 0x80 0x00 0xac 0x00 0xfa , 11)
avrdude: Send: . [1b] . [c0] . [00] . [05] . [0e] . [06] . [80] . [00] . [ac] . [00] . [fa] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c0] 
0xc0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d1] 
0xd1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe5 , 10)
avrdude: Send: . [1b] . [c1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c1] 
0xc1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [ea] 
0xea avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: , [2c] 
0x2c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,88320,256)
block_size at addr 88320 is 256
STK500V2: stk500v2_loadaddr(-2147439488)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xac 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xc2 0x00 0x05 0x0e 0x06 0x80 0x00 0xac 0x80 0x78 , 11)
avrdude: Send: . [1b] . [c2] . [00] . [05] . [0e] . [06] . [80] . [00] . [ac] . [80] x [78] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c2] 
0xc2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d3] 
0xd3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe7 , 10)
avrdude: Send: . [1b] . [c3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c3] 
0xc3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [ea] 
0xea avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [ee] 
0xee avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [83] 
0x83 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: l [6c] 
0x6c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,88576,256)
block_size at addr 88576 is 256
STK500V2: stk500v2_loadaddr(-2147439360)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xad 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc4 0x00 0x05 0x0e 0x06 0x80 0x00 0xad 0x00 0xff , 11)
avrdude: Send: . [1b] . [c4] . [00] . [05] . [0e] . [06] . [80] . [00] . [ad] . [00] . [ff] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c4] 
0xc4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d5] 
0xd5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe1 , 10)
avrdude: Send: . [1b] . [c5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c5] 
0xc5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [cc] 
0xcc avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [00] 
0x00 avrdude: Recv: w [77] 
0x77 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,88832,256)
block_size at addr 88832 is 256
STK500V2: stk500v2_loadaddr(-2147439232)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xad 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xc6 0x00 0x05 0x0e 0x06 0x80 0x00 0xad 0x80 0x7d , 11)
avrdude: Send: . [1b] . [c6] . [00] . [05] . [0e] . [06] . [80] . [00] . [ad] . [80] } [7d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c6] 
0xc6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d7] 
0xd7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe3 , 10)
avrdude: Send: . [1b] . [c7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c7] 
0xc7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [0a] 
0x0a avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a9] 
0xa9 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,89088,256)
block_size at addr 89088 is 256
STK500V2: stk500v2_loadaddr(-2147439104)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xae 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc8 0x00 0x05 0x0e 0x06 0x80 0x00 0xae 0x00 0xf0 , 11)
avrdude: Send: . [1b] . [c8] . [00] . [05] . [0e] . [06] . [80] . [00] . [ae] . [00] . [f0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c8] 
0xc8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d9] 
0xd9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xed , 10)
avrdude: Send: . [1b] . [c9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ed] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c9] 
0xc9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [00] 
0x00 avrdude: Recv: ^ [5e] 
0x5e 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,89344,256)
block_size at addr 89344 is 256
STK500V2: stk500v2_loadaddr(-2147438976)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xae 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xca 0x00 0x05 0x0e 0x06 0x80 0x00 0xae 0x80 0x72 , 11)
avrdude: Send: . [1b] . [ca] . [00] . [05] . [0e] . [06] . [80] . [00] . [ae] . [80] r [72] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ca] 
0xca hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [db] 
0xdb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xef , 10)
avrdude: Send: . [1b] . [cb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ef] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cb] 
0xcb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [13] 
0x13 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [13] 
0x13 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [13] 
0x13 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [13] 
0x13 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [13] 
0x13 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [13] 
0x13 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [13] 
0x13 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [13] 
0x13 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [13] 
0x13 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [13] 
0x13 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [13] 
0x13 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [13] 
0x13 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ef] 
0xef 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,89600,256)
block_size at addr 89600 is 256
STK500V2: stk500v2_loadaddr(-2147438848)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xaf 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xcc 0x00 0x05 0x0e 0x06 0x80 0x00 0xaf 0x00 0xf5 , 11)
avrdude: Send: . [1b] . [cc] . [00] . [05] . [0e] . [06] . [80] . [00] . [af] . [00] . [f5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cc] 
0xcc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [dd] 
0xdd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe9 , 10)
avrdude: Send: . [1b] . [cd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cd] 
0xcd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e4] 
0xe4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,89856,256)
block_size at addr 89856 is 256
STK500V2: stk500v2_loadaddr(-2147438720)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xaf 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xce 0x00 0x05 0x0e 0x06 0x80 0x00 0xaf 0x80 0x77 , 11)
avrdude: Send: . [1b] . [ce] . [00] . [05] . [0e] . [06] . [80] . [00] . [af] . [80] w [77] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ce] 
0xce hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [df] 
0xdf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xeb , 10)
avrdude: Send: . [1b] . [cf] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [eb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cf] 
0xcf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [03] 
0x03 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [03] 
0x03 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [03] 
0x03 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [03] 
0x03 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [03] 
0x03 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [cc] 
0xcc avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [2e] 
0x2e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,90112,256)
block_size at addr 90112 is 256
STK500V2: stk500v2_loadaddr(-2147438592)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xb0 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd0 0x00 0x05 0x0e 0x06 0x80 0x00 0xb0 0x00 0xf6 , 11)
avrdude: Send: . [1b] . [d0] . [00] . [05] . [0e] . [06] . [80] . [00] . [b0] . [00] . [f6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d0] 
0xd0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c1] 
0xc1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf5 , 10)
avrdude: Send: . [1b] . [d1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d1] 
0xd1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [91] 
0x91 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [91] 
0x91 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [91] 
0x91 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [02] 
0x02 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [05] 
0x05 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [0b] 
0x0b avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [00] 
0x00 avrdude: Recv: 3 [33] 
0x33 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,90368,256)
block_size at addr 90368 is 256
STK500V2: stk500v2_loadaddr(-2147438464)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xb0 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xd2 0x00 0x05 0x0e 0x06 0x80 0x00 0xb0 0x80 0x74 , 11)
avrdude: Send: . [1b] . [d2] . [00] . [05] . [0e] . [06] . [80] . [00] . [b0] . [80] t [74] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d2] 
0xd2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c3] 
0xc3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf7 , 10)
avrdude: Send: . [1b] . [d3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d3] 
0xd3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [0b] 
0x0b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ea] 
0xea avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [ec] 
0xec avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [0a] 
0x0a avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [07] 
0x07 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,90624,256)
block_size at addr 90624 is 256
STK500V2: stk500v2_loadaddr(-2147438336)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xb1 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd4 0x00 0x05 0x0e 0x06 0x80 0x00 0xb1 0x00 0xf3 , 11)
avrdude: Send: . [1b] . [d4] . [00] . [05] . [0e] . [06] . [80] . [00] . [b1] . [00] . [f3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d4] 
0xd4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c5] 
0xc5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf1 , 10)
avrdude: Send: . [1b] . [d5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d5] 
0xd5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ea] 
0xea avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ea] 
0xea avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ea] 
0xea avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [05] 
0x05 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [05] 
0x05 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [05] 
0x05 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [00] 
0x00 avrdude: Recv: S [53] 
0x53 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,90880,256)
block_size at addr 90880 is 256
STK500V2: stk500v2_loadaddr(-2147438208)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xb1 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xd6 0x00 0x05 0x0e 0x06 0x80 0x00 0xb1 0x80 0x71 , 11)
avrdude: Send: . [1b] . [d6] . [00] . [05] . [0e] . [06] . [80] . [00] . [b1] . [80] q [71] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d6] 
0xd6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c7] 
0xc7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf3 , 10)
avrdude: Send: . [1b] . [d7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d7] 
0xd7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,91136,256)
block_size at addr 91136 is 256
STK500V2: stk500v2_loadaddr(-2147438080)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xb2 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd8 0x00 0x05 0x0e 0x06 0x80 0x00 0xb2 0x00 0xfc , 11)
avrdude: Send: . [1b] . [d8] . [00] . [05] . [0e] . [06] . [80] . [00] . [b2] . [00] . [fc] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d8] 
0xd8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c9] 
0xc9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xfd , 10)
avrdude: Send: . [1b] . [d9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [fd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d9] 
0xd9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [99] 
0x99 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [84] 
0x84 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [ea] 
0xea avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: f [66] 
0x66 avrdude: Recv: u [75] 
0x75 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,91392,256)
block_size at addr 91392 is 256
STK500V2: stk500v2_loadaddr(-2147437952)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xb2 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xda 0x00 0x05 0x0e 0x06 0x80 0x00 0xb2 0x80 0x7e , 11)
avrdude: Send: . [1b] . [da] . [00] . [05] . [0e] . [06] . [80] . [00] . [b2] . [80] ~ [7e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [da] 
0xda hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cb] 
0xcb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xff , 10)
avrdude: Send: . [1b] . [db] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ff] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [db] 
0xdb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [91] 
0x91 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8d] 
0x8d avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [01] 
0x01 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [01] 
0x01 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: + [2b] 
0x2b avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [13] 
0x13 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [13] 
0x13 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [13] 
0x13 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [13] 
0x13 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [13] 
0x13 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [13] 
0x13 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [13] 
0x13 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [13] 
0x13 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [15] 
0x15 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [05] 
0x05 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [05] 
0x05 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [15] 
0x15 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,91648,256)
block_size at addr 91648 is 256
STK500V2: stk500v2_loadaddr(-2147437824)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xb3 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xdc 0x00 0x05 0x0e 0x06 0x80 0x00 0xb3 0x00 0xf9 , 11)
avrdude: Send: . [1b] . [dc] . [00] . [05] . [0e] . [06] . [80] . [00] . [b3] . [00] . [f9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [dc] 
0xdc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cd] 
0xcd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf9 , 10)
avrdude: Send: . [1b] . [dd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [dd] 
0xdd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [01] 
0x01 avrdude: Recv: B [42] 
0x42 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [05] 
0x05 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [05] 
0x05 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [bb] 
0xbb avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1e] 
0x1e avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [01] 
0x01 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,91904,256)
block_size at addr 91904 is 256
STK500V2: stk500v2_loadaddr(-2147437696)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xb3 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xde 0x00 0x05 0x0e 0x06 0x80 0x00 0xb3 0x80 0x7b , 11)
avrdude: Send: . [1b] . [de] . [00] . [05] . [0e] . [06] . [80] . [00] . [b3] . [80] { [7b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [de] 
0xde hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cf] 
0xcf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xfb , 10)
avrdude: Send: . [1b] . [df] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [fb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [df] 
0xdf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [ee] 
0xee avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [ff] 
0xff avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ed] 
0xed avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: N [4e] 
0x4e avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [ee] 
0xee avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [ff] 
0xff avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ed] 
0xed avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: N [4e] 
0x4e avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [82] 
0x82 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [82] 
0x82 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [82] 
0x82 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [81] 
0x81 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [81] 
0x81 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [81] 
0x81 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [92] 
0x92 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [96] 
0x96 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [85] 
0x85 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [89] 
0x89 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: m [6d] 
0x6d 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,92160,256)
block_size at addr 92160 is 256
STK500V2: stk500v2_loadaddr(-2147437568)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xb4 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe0 0x00 0x05 0x0e 0x06 0x80 0x00 0xb4 0x00 0xc2 , 11)
avrdude: Send: . [1b] . [e0] . [00] . [05] . [0e] . [06] . [80] . [00] . [b4] . [00] . [c2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e0] 
0xe0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f1] 
0xf1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc5 , 10)
avrdude: Send: . [1b] . [e1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e1] 
0xe1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [13] 
0x13 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [13] 
0x13 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [13] 
0x13 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [07] 
0x07 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: U [55] 
0x55 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: f [66] 
0x66 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: w [77] 
0x77 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ed] 
0xed avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: w [77] 
0x77 avrdude: Recv: U [55] 
0x55 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: f [66] 
0x66 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: w [77] 
0x77 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ed] 
0xed avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [83] 
0x83 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [83] 
0x83 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [83] 
0x83 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [83] 
0x83 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [01] 
0x01 avrdude: Recv: A [41] 
0x41 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: a [61] 
0x61 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: q [71] 
0x71 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [81] 
0x81 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [81] 
0x81 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [81] 
0x81 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e3] 
0xe3 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,92416,256)
block_size at addr 92416 is 256
STK500V2: stk500v2_loadaddr(-2147437440)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xb4 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xe2 0x00 0x05 0x0e 0x06 0x80 0x00 0xb4 0x80 0x40 , 11)
avrdude: Send: . [1b] . [e2] . [00] . [05] . [0e] . [06] . [80] . [00] . [b4] . [80] @ [40] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e2] 
0xe2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f3] 
0xf3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc7 , 10)
avrdude: Send: . [1b] . [e3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e3] 
0xe3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [1e] 
0x1e avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [81] 
0x81 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [81] 
0x81 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [81] 
0x81 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [05] 
0x05 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: o [6f] 
0x6f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [95] 
0x95 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [81] 
0x81 avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: % [25] 
0x25 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [85] 
0x85 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: s [73] 
0x73 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [8d] 
0x8d avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [8d] 
0x8d avrdude: Recv: E [45] 
0x45 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: q [71] 
0x71 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ef] 
0xef avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: P [50] 
0x50 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [01] 
0x01 avrdude: Recv: % [25] 
0x25 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [81] 
0x81 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [93] 
0x93 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [96] 
0x96 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [81] 
0x81 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: y [79] 
0x79 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,92672,256)
block_size at addr 92672 is 256
STK500V2: stk500v2_loadaddr(-2147437312)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xb5 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe4 0x00 0x05 0x0e 0x06 0x80 0x00 0xb5 0x00 0xc7 , 11)
avrdude: Send: . [1b] . [e4] . [00] . [05] . [0e] . [06] . [80] . [00] . [b5] . [00] . [c7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e4] 
0xe4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f5] 
0xf5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc1 , 10)
avrdude: Send: . [1b] . [e5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e5] 
0xe5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [86] 
0x86 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [85] 
0x85 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [cf] 
0xcf avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [01] 
0x01 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: E [45] 
0x45 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [82] 
0x82 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [80] 
0x80 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [80] 
0x80 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,92928,256)
block_size at addr 92928 is 256
STK500V2: stk500v2_loadaddr(-2147437184)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xb5 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xe6 0x00 0x05 0x0e 0x06 0x80 0x00 0xb5 0x80 0x45 , 11)
avrdude: Send: . [1b] . [e6] . [00] . [05] . [0e] . [06] . [80] . [00] . [b5] . [80] E [45] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e6] 
0xe6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f7] 
0xf7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc3 , 10)
avrdude: Send: . [1b] . [e7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e7] 
0xe7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [84] 
0x84 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [ee] 
0xee avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [ff] 
0xff avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [82] 
0x82 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [db] 
0xdb 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,93184,256)
block_size at addr 93184 is 256
STK500V2: stk500v2_loadaddr(-2147437056)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xb6 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe8 0x00 0x05 0x0e 0x06 0x80 0x00 0xb6 0x00 0xc8 , 11)
avrdude: Send: . [1b] . [e8] . [00] . [05] . [0e] . [06] . [80] . [00] . [b6] . [00] . [c8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e8] 
0xe8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f9] 
0xf9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcd , 10)
avrdude: Send: . [1b] . [e9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e9] 
0xe9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [80] 
0x80 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [80] 
0x80 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a0] 
0xa0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,93440,256)
block_size at addr 93440 is 256
STK500V2: stk500v2_loadaddr(-2147436928)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xb6 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xea 0x00 0x05 0x0e 0x06 0x80 0x00 0xb6 0x80 0x4a , 11)
avrdude: Send: . [1b] . [ea] . [00] . [05] . [0e] . [06] . [80] . [00] . [b6] . [80] J [4a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ea] 
0xea hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fb] 
0xfb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xeb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcf , 10)
avrdude: Send: . [1b] . [eb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [eb] 
0xeb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [12] 
0x12 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: W [57] 
0x57 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,93696,256)
block_size at addr 93696 is 256
STK500V2: stk500v2_loadaddr(-2147436800)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xb7 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xec 0x00 0x05 0x0e 0x06 0x80 0x00 0xb7 0x00 0xcd , 11)
avrdude: Send: . [1b] . [ec] . [00] . [05] . [0e] . [06] . [80] . [00] . [b7] . [00] . [cd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ec] 
0xec hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fd] 
0xfd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xed 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc9 , 10)
avrdude: Send: . [1b] . [ed] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ed] 
0xed hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [ce] 
0xce avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [81] 
0x81 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [ef] 
0xef avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [81] 
0x81 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: C [43] 
0x43 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: $ [24] 
0x24 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ee] 
0xee avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [ce] 
0xce avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [81] 
0x81 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [ce] 
0xce avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [81] 
0x81 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [ce] 
0xce avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [dd] 
0xdd avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f3] 
0xf3 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,93952,256)
block_size at addr 93952 is 256
STK500V2: stk500v2_loadaddr(-2147436672)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xb7 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xee 0x00 0x05 0x0e 0x06 0x80 0x00 0xb7 0x80 0x4f , 11)
avrdude: Send: . [1b] . [ee] . [00] . [05] . [0e] . [06] . [80] . [00] . [b7] . [80] O [4f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ee] 
0xee hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xef 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcb , 10)
avrdude: Send: . [1b] . [ef] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ef] 
0xef hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [81] 
0x81 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [81] 
0x81 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: C [43] 
0x43 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: $ [24] 
0x24 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ee] 
0xee avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [dd] 
0xdd avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [80] 
0x80 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [10] 
0x10 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [0f] 
0x0f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [10] 
0x10 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [07] 
0x07 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: f [66] 
0x66 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,94208,256)
block_size at addr 94208 is 256
STK500V2: stk500v2_loadaddr(-2147436544)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xb8 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf0 0x00 0x05 0x0e 0x06 0x80 0x00 0xb8 0x00 0xde , 11)
avrdude: Send: . [1b] . [f0] . [00] . [05] . [0e] . [06] . [80] . [00] . [b8] . [00] . [de] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f0] 
0xf0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e1] 
0xe1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd5 , 10)
avrdude: Send: . [1b] . [f1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f1] 
0xf1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [84] 
0x84 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [83] 
0x83 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [88] 
0x88 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [84] 
0x84 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: P [50] 
0x50 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [89] 
0x89 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 1 [31] 
0x31 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,94464,256)
block_size at addr 94464 is 256
STK500V2: stk500v2_loadaddr(-2147436416)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xb8 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xf2 0x00 0x05 0x0e 0x06 0x80 0x00 0xb8 0x80 0x5c , 11)
avrdude: Send: . [1b] . [f2] . [00] . [05] . [0e] . [06] . [80] . [00] . [b8] . [80] \ [5c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f2] 
0xf2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e3] 
0xe3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd7 , 10)
avrdude: Send: . [1b] . [f3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f3] 
0xf3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [df] 
0xdf avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ff] 
0xff avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8a] 
0x8a avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [da] 
0xda avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,94720,256)
block_size at addr 94720 is 256
STK500V2: stk500v2_loadaddr(-2147436288)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xb9 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf4 0x00 0x05 0x0e 0x06 0x80 0x00 0xb9 0x00 0xdb , 11)
avrdude: Send: . [1b] . [f4] . [00] . [05] . [0e] . [06] . [80] . [00] . [b9] . [00] . [db] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f4] 
0xf4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e5] 
0xe5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd1 , 10)
avrdude: Send: . [1b] . [f5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f5] 
0xf5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: h [68] 
0x68 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e7] 
0xe7 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,94976,256)
block_size at addr 94976 is 256
STK500V2: stk500v2_loadaddr(-2147436160)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xb9 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xf6 0x00 0x05 0x0e 0x06 0x80 0x00 0xb9 0x80 0x59 , 11)
avrdude: Send: . [1b] . [f6] . [00] . [05] . [0e] . [06] . [80] . [00] . [b9] . [80] Y [59] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f6] 
0xf6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e7] 
0xe7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd3 , 10)
avrdude: Send: . [1b] . [f7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f7] 
0xf7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [09] 
0x09 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [95] 
0x95 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0d] 
0x0d avrdude: Recv:   [20] 
0x20 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [18] 
0x18 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f4] 
0xf4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,95232,256)
block_size at addr 95232 is 256
STK500V2: stk500v2_loadaddr(-2147436032)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xba 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf8 0x00 0x05 0x0e 0x06 0x80 0x00 0xba 0x00 0xd4 , 11)
avrdude: Send: . [1b] . [f8] . [00] . [05] . [0e] . [06] . [80] . [00] . [ba] . [00] . [d4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f8] 
0xf8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e9] 
0xe9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdd , 10)
avrdude: Send: . [1b] . [f9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [dd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f9] 
0xf9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [11] 
0x11 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0d] 
0x0d avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [01] 
0x01 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [01] 
0x01 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [96] 
0x96 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [af] 
0xaf avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [01] 
0x01 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [1f] 
0x1f avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [00] 
0x00 avrdude: Recv: s [73] 
0x73 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,95488,256)
block_size at addr 95488 is 256
STK500V2: stk500v2_loadaddr(-2147435904)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xba 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xfa 0x00 0x05 0x0e 0x06 0x80 0x00 0xba 0x80 0x56 , 11)
avrdude: Send: . [1b] . [fa] . [00] . [05] . [0e] . [06] . [80] . [00] . [ba] . [80] V [56] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fa] 
0xfa hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [eb] 
0xeb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xfb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdf , 10)
avrdude: Send: . [1b] . [fb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [df] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fb] 
0xfb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8a] 
0x8a avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [ec] 
0xec avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [da] 
0xda avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [98] 
0x98 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [10] 
0x10 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: P [50] 
0x50 avrdude: Recv: " [22] 
0x22 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [81] 
0x81 avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: % [25] 
0x25 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: p [70] 
0x70 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [96] 
0x96 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [af] 
0xaf avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [96] 
0x96 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [ed] 
0xed avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [ed] 
0xed avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ae] 
0xae avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [97] 
0x97 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ae] 
0xae avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e5] 
0xe5 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,95744,256)
block_size at addr 95744 is 256
STK500V2: stk500v2_loadaddr(-2147435776)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xbb 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xfc 0x00 0x05 0x0e 0x06 0x80 0x00 0xbb 0x00 0xd1 , 11)
avrdude: Send: . [1b] . [fc] . [00] . [05] . [0e] . [06] . [80] . [00] . [bb] . [00] . [d1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fc] 
0xfc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ed] 
0xed 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xfd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd9 , 10)
avrdude: Send: . [1b] . [fd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fd] 
0xfd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [ae] 
0xae avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [97] 
0x97 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [96] 
0x96 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ae] 
0xae avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ae] 
0xae avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [97] 
0x97 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ec] 
0xec avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [ff] 
0xff avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [de] 
0xde avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [96] 
0x96 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ad] 
0xad avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0b] 
0x0b avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [87] 
0x87 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e5] 
0xe5 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,96000,256)
block_size at addr 96000 is 256
STK500V2: stk500v2_loadaddr(-2147435648)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xbb 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xfe 0x00 0x05 0x0e 0x06 0x80 0x00 0xbb 0x80 0x53 , 11)
avrdude: Send: . [1b] . [fe] . [00] . [05] . [0e] . [06] . [80] . [00] . [bb] . [80] S [53] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fe] 
0xfe hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ef] 
0xef 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xff 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdb , 10)
avrdude: Send: . [1b] . [ff] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [db] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ff] 
0xff hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [8d] 
0x8d avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [eb] 
0xeb avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [07] 
0x07 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [96] 
0x96 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [97] 
0x97 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [96] 
0x96 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [ce] 
0xce avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [df] 
0xdf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c7] 
0xc7 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,96256,256)
block_size at addr 96256 is 256
STK500V2: stk500v2_loadaddr(-2147435520)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xbc 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x00 0x00 0x05 0x0e 0x06 0x80 0x00 0xbc 0x00 0x2a , 11)
avrdude: Send: . [1b] . [00] . [00] . [05] . [0e] . [06] . [80] . [00] . [bc] . [00] * [2a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [00] 
0x00 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x01 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x25 , 10)
avrdude: Send: . [1b] . [01] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] % [25] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [01] 
0x01 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [01] 
0x01 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [01] 
0x01 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9a] 
0x9a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,96512,256)
block_size at addr 96512 is 256
STK500V2: stk500v2_loadaddr(-2147435392)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xbc 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x02 0x00 0x05 0x0e 0x06 0x80 0x00 0xbc 0x80 0xa8 , 11)
avrdude: Send: . [1b] . [02] . [00] . [05] . [0e] . [06] . [80] . [00] . [bc] . [80] . [a8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [02] 
0x02 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [13] 
0x13 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x03 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x27 , 10)
avrdude: Send: . [1b] . [03] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ' [27] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [03] 
0x03 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [17] 
0x17 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [ff] 
0xff avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [15] 
0x15 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [be] 
0xbe avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e4] 
0xe4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,96768,256)
block_size at addr 96768 is 256
STK500V2: stk500v2_loadaddr(-2147435264)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xbd 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x04 0x00 0x05 0x0e 0x06 0x80 0x00 0xbd 0x00 0x2f , 11)
avrdude: Send: . [1b] . [04] . [00] . [05] . [0e] . [06] . [80] . [00] . [bd] . [00] / [2f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [04] 
0x04 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [15] 
0x15 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x05 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x21 , 10)
avrdude: Send: . [1b] . [05] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ! [21] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [05] 
0x05 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [ea] 
0xea avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [ff] 
0xff avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [18] 
0x18 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [04] 
0x04 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: @ [40] 
0x40 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [cf] 
0xcf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [08] 
0x08 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [00] 
0x00 avrdude: Recv: I [49] 
0x49 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,97024,256)
block_size at addr 97024 is 256
STK500V2: stk500v2_loadaddr(-2147435136)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xbd 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x06 0x00 0x05 0x0e 0x06 0x80 0x00 0xbd 0x80 0xad , 11)
avrdude: Send: . [1b] . [06] . [00] . [05] . [0e] . [06] . [80] . [00] . [bd] . [80] . [ad] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [06] 
0x06 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [17] 
0x17 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x07 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x23 , 10)
avrdude: Send: . [1b] . [07] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] # [23] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [07] 
0x07 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [14] 
0x14 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [ee] 
0xee avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [18] 
0x18 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [18] 
0x18 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8c] 
0x8c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: D [44] 
0x44 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: G [47] 
0x47 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: H [48] 
0x48 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [18] 
0x18 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [02] 
0x02 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: $ [24] 
0x24 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: F [46] 
0x46 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: h [68] 
0x68 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [00] 
0x00 avrdude: Recv: 5 [35] 
0x35 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,97280,256)
block_size at addr 97280 is 256
STK500V2: stk500v2_loadaddr(-2147435008)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xbe 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x08 0x00 0x05 0x0e 0x06 0x80 0x00 0xbe 0x00 0x20 , 11)
avrdude: Send: . [1b] . [08] . [00] . [05] . [0e] . [06] . [80] . [00] . [be] . [00]   [20] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [08] 
0x08 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [19] 
0x19 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x09 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2d , 10)
avrdude: Send: . [1b] . [09] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] - [2d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [09] 
0x09 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: L [4c] 
0x4c avrdude: Recv: M [4d] 
0x4d avrdude: Recv: / [2f] 
0x2f avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: M [4d] 
0x4d avrdude: Recv: / [2f] 
0x2f avrdude: Recv: l [6c] 
0x6c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [df] 
0xdf avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [ef] 
0xef avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0f] 
0x0f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [14] 
0x14 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [02] 
0x02 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: $ [24] 
0x24 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: F [46] 
0x46 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: h [68] 
0x68 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: A [41] 
0x41 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [8c] 
0x8c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [90] 
0x90 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [07] 
0x07 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [00] 
0x00 avrdude: Recv: l [6c] 
0x6c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,97536,256)
block_size at addr 97536 is 256
STK500V2: stk500v2_loadaddr(-2147434880)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xbe 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x0a 0x00 0x05 0x0e 0x06 0x80 0x00 0xbe 0x80 0xa2 , 11)
avrdude: Send: . [1b] . [0a] . [00] . [05] . [0e] . [06] . [80] . [00] . [be] . [80] . [a2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0a] 
0x0a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1b] 
0x1b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2f , 10)
avrdude: Send: . [1b] . [0b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] / [2f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0b] 
0x0b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: , [2c] 
0x2c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: H [48] 
0x48 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [84] 
0x84 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [06] 
0x06 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: g [67] 
0x67 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [8d] 
0x8d avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [80] 
0x80 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f9] 
0xf9 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,97792,256)
block_size at addr 97792 is 256
STK500V2: stk500v2_loadaddr(-2147434752)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xbf 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x0c 0x00 0x05 0x0e 0x06 0x80 0x00 0xbf 0x00 0x25 , 11)
avrdude: Send: . [1b] . [0c] . [00] . [05] . [0e] . [06] . [80] . [00] . [bf] . [00] % [25] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0c] 
0x0c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1d] 
0x1d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x29 , 10)
avrdude: Send: . [1b] . [0d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ) [29] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0d] 
0x0d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [15] 
0x15 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [ee] 
0xee avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ed] 
0xed avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [fd] 
0xfd avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [ec] 
0xec avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d4] 
0xd4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,98048,256)
block_size at addr 98048 is 256
STK500V2: stk500v2_loadaddr(-2147434624)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xbf 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x0e 0x00 0x05 0x0e 0x06 0x80 0x00 0xbf 0x80 0xa7 , 11)
avrdude: Send: . [1b] . [0e] . [00] . [05] . [0e] . [06] . [80] . [00] . [bf] . [80] . [a7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0e] 
0x0e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1f] 
0x1f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2b , 10)
avrdude: Send: . [1b] . [0f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] + [2b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0f] 
0x0f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ed] 
0xed avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ed] 
0xed avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [fd] 
0xfd avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [16] 
0x16 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [ec] 
0xec avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [de] 
0xde avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: L [4c] 
0x4c avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ed] 
0xed avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [fd] 
0xfd avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [81] 
0x81 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [82] 
0x82 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: b [62] 
0x62 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [83] 
0x83 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: + [2b] 
0x2b avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: + [2b] 
0x2b avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [18] 
0x18 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c1] 
0xc1 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,98304,256)
block_size at addr 98304 is 256
STK500V2: stk500v2_loadaddr(-2147434496)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xc0 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x10 0x00 0x05 0x0e 0x06 0x80 0x00 0xc0 0x00 0x46 , 11)
avrdude: Send: . [1b] . [10] . [00] . [05] . [0e] . [06] . [80] . [00] . [c0] . [00] F [46] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [10] 
0x10 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x11 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x35 , 10)
avrdude: Send: . [1b] . [11] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 5 [35] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [11] 
0x11 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [ff] 
0xff avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [00] 
0x00 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [00] 
0x00 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [00] 
0x00 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [00] 
0x00 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 4 [34] 
0x34 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,98560,256)
block_size at addr 98560 is 256
STK500V2: stk500v2_loadaddr(-2147434368)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xc0 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x12 0x00 0x05 0x0e 0x06 0x80 0x00 0xc0 0x80 0xc4 , 11)
avrdude: Send: . [1b] . [12] . [00] . [05] . [0e] . [06] . [80] . [00] . [c0] . [80] . [c4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [12] 
0x12 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x13 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x37 , 10)
avrdude: Send: . [1b] . [13] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 7 [37] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [13] 
0x13 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [00] 
0x00 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [00] 
0x00 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [cf] 
0xcf avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [88] 
0x88 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [93] 
0x93 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,98816,256)
block_size at addr 98816 is 256
STK500V2: stk500v2_loadaddr(-2147434240)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xc1 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x14 0x00 0x05 0x0e 0x06 0x80 0x00 0xc1 0x00 0x43 , 11)
avrdude: Send: . [1b] . [14] . [00] . [05] . [0e] . [06] . [80] . [00] . [c1] . [00] C [43] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [14] 
0x14 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [05] 
0x05 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x15 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x31 , 10)
avrdude: Send: . [1b] . [15] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 1 [31] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [15] 
0x15 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [9e] 
0x9e avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: O [4f] 
0x4f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [96] 
0x96 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [81] 
0x81 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [81] 
0x81 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [81] 
0x81 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [81] 
0x81 avrdude: Recv: D [44] 
0x44 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [05] 
0x05 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [05] 
0x05 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [01] 
0x01 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [18] 
0x18 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [92] 
0x92 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [11] 
0x11 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [11] 
0x11 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [15] 
0x15 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fa] 
0xfa 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,99072,256)
block_size at addr 99072 is 256
STK500V2: stk500v2_loadaddr(-2147434112)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xc1 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x16 0x00 0x05 0x0e 0x06 0x80 0x00 0xc1 0x80 0xc1 , 11)
avrdude: Send: . [1b] . [16] . [00] . [05] . [0e] . [06] . [80] . [00] . [c1] . [80] . [c1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [16] 
0x16 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [07] 
0x07 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x17 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x33 , 10)
avrdude: Send: . [1b] . [17] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 3 [33] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [17] 
0x17 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [11] 
0x11 avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [0f] 
0x0f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [17] 
0x17 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [07] 
0x07 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0f] 
0x0f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [11] 
0x11 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [11] 
0x11 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [15] 
0x15 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [11] 
0x11 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [11] 
0x11 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [11] 
0x11 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [11] 
0x11 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [01] 
0x01 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [92] 
0x92 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [92] 
0x92 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ef] 
0xef avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ff] 
0xff avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [92] 
0x92 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [0f] 
0x0f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [11] 
0x11 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [11] 
0x11 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [15] 
0x15 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,99328,256)
block_size at addr 99328 is 256
STK500V2: stk500v2_loadaddr(-2147433984)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xc2 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x18 0x00 0x05 0x0e 0x06 0x80 0x00 0xc2 0x00 0x4c , 11)
avrdude: Send: . [1b] . [18] . [00] . [05] . [0e] . [06] . [80] . [00] . [c2] . [00] L [4c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [18] 
0x18 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [09] 
0x09 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x19 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3d , 10)
avrdude: Send: . [1b] . [19] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] = [3d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [19] 
0x19 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [11] 
0x11 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [11] 
0x11 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [11] 
0x11 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [85] 
0x85 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [98] 
0x98 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8b] 
0x8b 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,99584,256)
block_size at addr 99584 is 256
STK500V2: stk500v2_loadaddr(-2147433856)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xc2 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x1a 0x00 0x05 0x0e 0x06 0x80 0x00 0xc2 0x80 0xce , 11)
avrdude: Send: . [1b] . [1a] . [00] . [05] . [0e] . [06] . [80] . [00] . [c2] . [80] . [ce] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1a] 
0x1a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0b] 
0x0b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3f , 10)
avrdude: Send: . [1b] . [1b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ? [3f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1b] 
0x1b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: D [44] 
0x44 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [17] 
0x17 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [01] 
0x01 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8e] 
0x8e avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [01] 
0x01 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c5] 
0xc5 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,99840,256)
block_size at addr 99840 is 256
STK500V2: stk500v2_loadaddr(-2147433728)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xc3 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x1c 0x00 0x05 0x0e 0x06 0x80 0x00 0xc3 0x00 0x49 , 11)
avrdude: Send: . [1b] . [1c] . [00] . [05] . [0e] . [06] . [80] . [00] . [c3] . [00] I [49] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1c] 
0x1c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0d] 
0x0d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x39 , 10)
avrdude: Send: . [1b] . [1d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 9 [39] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1d] 
0x1d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: V [56] 
0x56 avrdude: Recv: p [70] 
0x70 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: D [44] 
0x44 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: i [69] 
0x69 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [00] 
0x00 avrdude: Recv: > [3e] 
0x3e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,100096,256)
block_size at addr 100096 is 256
STK500V2: stk500v2_loadaddr(-2147433600)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xc3 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x1e 0x00 0x05 0x0e 0x06 0x80 0x00 0xc3 0x80 0xcb , 11)
avrdude: Send: . [1b] . [1e] . [00] . [05] . [0e] . [06] . [80] . [00] . [c3] . [80] . [cb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1e] 
0x1e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3b , 10)
avrdude: Send: . [1b] . [1f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ; [3b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1f] 
0x1f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: x [78] 
0x78 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [dd] 
0xdd avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [15] 
0x15 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [15] 
0x15 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: } [7d] 
0x7d 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,100352,256)
block_size at addr 100352 is 256
STK500V2: stk500v2_loadaddr(-2147433472)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xc4 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x20 0x00 0x05 0x0e 0x06 0x80 0x00 0xc4 0x00 0x72 , 11)
avrdude: Send: . [1b]   [20] . [00] . [05] . [0e] . [06] . [80] . [00] . [c4] . [00] r [72] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv:   [20] 
0x20 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 1 [31] 
0x31 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x21 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x05 , 10)
avrdude: Send: . [1b] ! [21] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [05] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ! [21] 
0x21 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [13] 
0x13 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bb] 
0xbb 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,100608,256)
block_size at addr 100608 is 256
STK500V2: stk500v2_loadaddr(-2147433344)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xc4 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x22 0x00 0x05 0x0e 0x06 0x80 0x00 0xc4 0x80 0xf0 , 11)
avrdude: Send: . [1b] " [22] . [00] . [05] . [0e] . [06] . [80] . [00] . [c4] . [80] . [f0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: " [22] 
0x22 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 3 [33] 
0x33 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x23 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x07 , 10)
avrdude: Send: . [1b] # [23] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [07] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: # [23] 
0x23 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: V [56] 
0x56 avrdude: Recv: g [67] 
0x67 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [98] 
0x98 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [9a] 
0x9a avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [11] 
0x11 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: g [67] 
0x67 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [18] 
0x18 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [1b] 
0x1b avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [0b] 
0x0b avrdude: Recv: a [61] 
0x61 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: w [77] 
0x77 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [ea] 
0xea avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: g [67] 
0x67 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [11] 
0x11 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: g [67] 
0x67 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: g [67] 
0x67 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [1b] 
0x1b avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [0b] 
0x0b avrdude: Recv: a [61] 
0x61 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: w [77] 
0x77 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f9] 
0xf9 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,100864,256)
block_size at addr 100864 is 256
STK500V2: stk500v2_loadaddr(-2147433216)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xc5 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x24 0x00 0x05 0x0e 0x06 0x80 0x00 0xc5 0x00 0x77 , 11)
avrdude: Send: . [1b] $ [24] . [00] . [05] . [0e] . [06] . [80] . [00] . [c5] . [00] w [77] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: $ [24] 
0x24 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 5 [35] 
0x35 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x25 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x01 , 10)
avrdude: Send: . [1b] % [25] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [01] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: % [25] 
0x25 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: g [67] 
0x67 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: V [56] 
0x56 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [80] 
0x80 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [80] 
0x80 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: V [56] 
0x56 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,101120,256)
block_size at addr 101120 is 256
STK500V2: stk500v2_loadaddr(-2147433088)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xc5 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x26 0x00 0x05 0x0e 0x06 0x80 0x00 0xc5 0x80 0xf5 , 11)
avrdude: Send: . [1b] & [26] . [00] . [05] . [0e] . [06] . [80] . [00] . [c5] . [80] . [f5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: & [26] 
0x26 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 7 [37] 
0x37 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x27 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x03 , 10)
avrdude: Send: . [1b] ' [27] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [03] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ' [27] 
0x27 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0d] 
0x0d avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [81] 
0x81 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [87] 
0x87 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [87] 
0x87 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [87] 
0x87 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [84] 
0x84 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b0] 
0xb0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,101376,256)
block_size at addr 101376 is 256
STK500V2: stk500v2_loadaddr(-2147432960)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xc6 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x28 0x00 0x05 0x0e 0x06 0x80 0x00 0xc6 0x00 0x78 , 11)
avrdude: Send: . [1b] ( [28] . [00] . [05] . [0e] . [06] . [80] . [00] . [c6] . [00] x [78] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ( [28] 
0x28 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 9 [39] 
0x39 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x29 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0d , 10)
avrdude: Send: . [1b] ) [29] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ) [29] 
0x29 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ee] 
0xee avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [81] 
0x81 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [ed] 
0xed avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: a [61] 
0x61 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: q [71] 
0x71 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ec] 
0xec avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [10] 
0x10 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ed] 
0xed avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,101632,256)
block_size at addr 101632 is 256
STK500V2: stk500v2_loadaddr(-2147432832)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xc6 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x2a 0x00 0x05 0x0e 0x06 0x80 0x00 0xc6 0x80 0xfa , 11)
avrdude: Send: . [1b] * [2a] . [00] . [05] . [0e] . [06] . [80] . [00] . [c6] . [80] . [fa] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: * [2a] 
0x2a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ; [3b] 
0x3b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0f , 10)
avrdude: Send: . [1b] + [2b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: + [2b] 
0x2b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [92] 
0x92 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [cf] 
0xcf avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [12] 
0x12 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [92] 
0x92 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [92] 
0x92 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [92] 
0x92 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [92] 
0x92 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [92] 
0x92 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [10] 
0x10 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ed] 
0xed avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f0] 
0xf0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,101888,256)
block_size at addr 101888 is 256
STK500V2: stk500v2_loadaddr(-2147432704)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xc7 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x2c 0x00 0x05 0x0e 0x06 0x80 0x00 0xc7 0x00 0x7d , 11)
avrdude: Send: . [1b] , [2c] . [00] . [05] . [0e] . [06] . [80] . [00] . [c7] . [00] } [7d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: , [2c] 
0x2c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: = [3d] 
0x3d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x09 , 10)
avrdude: Send: . [1b] - [2d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [09] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: - [2d] 
0x2d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [92] 
0x92 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [13] 
0x13 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ef] 
0xef avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [8c] 
0x8c avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [92] 
0x92 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [92] 
0x92 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [92] 
0x92 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d3] 
0xd3 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,102144,256)
block_size at addr 102144 is 256
STK500V2: stk500v2_loadaddr(-2147432576)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xc7 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x2e 0x00 0x05 0x0e 0x06 0x80 0x00 0xc7 0x80 0xff , 11)
avrdude: Send: . [1b] . [2e] . [00] . [05] . [0e] . [06] . [80] . [00] . [c7] . [80] . [ff] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [2e] 
0x2e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ? [3f] 
0x3f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0b , 10)
avrdude: Send: . [1b] / [2f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: / [2f] 
0x2f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [92] 
0x92 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [92] 
0x92 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [92] 
0x92 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [10] 
0x10 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ed] 
0xed avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [92] 
0x92 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [13] 
0x13 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [83] 
0x83 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [ef] 
0xef avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [15] 
0x15 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: T [54] 
0x54 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,102400,256)
block_size at addr 102400 is 256
STK500V2: stk500v2_loadaddr(-2147432448)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xc8 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x30 0x00 0x05 0x0e 0x06 0x80 0x00 0xc8 0x00 0x6e , 11)
avrdude: Send: . [1b] 0 [30] . [00] . [05] . [0e] . [06] . [80] . [00] . [c8] . [00] n [6e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 0 [30] 
0x30 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ! [21] 
0x21 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x31 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x15 , 10)
avrdude: Send: . [1b] 1 [31] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [15] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 1 [31] 
0x31 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [13] 
0x13 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [83] 
0x83 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [ee] 
0xee avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [16] 
0x16 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [86] 
0x86 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [86] 
0x86 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [13] 
0x13 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ed] 
0xed 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,102656,256)
block_size at addr 102656 is 256
STK500V2: stk500v2_loadaddr(-2147432320)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xc8 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x32 0x00 0x05 0x0e 0x06 0x80 0x00 0xc8 0x80 0xec , 11)
avrdude: Send: . [1b] 2 [32] . [00] . [05] . [0e] . [06] . [80] . [00] . [c8] . [80] . [ec] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 2 [32] 
0x32 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: # [23] 
0x23 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x33 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x17 , 10)
avrdude: Send: . [1b] 3 [33] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [17] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 3 [33] 
0x33 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [83] 
0x83 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [ed] 
0xed avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [17] 
0x17 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [87] 
0x87 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [87] 
0x87 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [13] 
0x13 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [83] 
0x83 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ec] 
0xec avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv: _ [5f] 
0x5f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,102912,256)
block_size at addr 102912 is 256
STK500V2: stk500v2_loadaddr(-2147432192)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xc9 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x34 0x00 0x05 0x0e 0x06 0x80 0x00 0xc9 0x00 0x6b , 11)
avrdude: Send: . [1b] 4 [34] . [00] . [05] . [0e] . [06] . [80] . [00] . [c9] . [00] k [6b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 4 [34] 
0x34 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: % [25] 
0x25 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x35 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x11 , 10)
avrdude: Send: . [1b] 5 [35] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [11] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 5 [35] 
0x35 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [10] 
0x10 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [ec] 
0xec avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: e [65] 
0x65 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv: K [4b] 
0x4b 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,103168,256)
block_size at addr 103168 is 256
STK500V2: stk500v2_loadaddr(-2147432064)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xc9 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x36 0x00 0x05 0x0e 0x06 0x80 0x00 0xc9 0x80 0xe9 , 11)
avrdude: Send: . [1b] 6 [36] . [00] . [05] . [0e] . [06] . [80] . [00] . [c9] . [80] . [e9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 6 [36] 
0x36 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ' [27] 
0x27 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x37 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x13 , 10)
avrdude: Send: . [1b] 7 [37] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [13] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 7 [37] 
0x37 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [12] 
0x12 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [10] 
0x10 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [00] 
0x00 avrdude: Recv: c [63] 
0x63 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,103424,256)
block_size at addr 103424 is 256
STK500V2: stk500v2_loadaddr(-2147431936)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xca 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x38 0x00 0x05 0x0e 0x06 0x80 0x00 0xca 0x00 0x64 , 11)
avrdude: Send: . [1b] 8 [38] . [00] . [05] . [0e] . [06] . [80] . [00] . [ca] . [00] d [64] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 8 [38] 
0x38 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ) [29] 
0x29 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x39 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1d , 10)
avrdude: Send: . [1b] 9 [39] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 9 [39] 
0x39 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e1] 
0xe1 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,103680,256)
block_size at addr 103680 is 256
STK500V2: stk500v2_loadaddr(-2147431808)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xca 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x3a 0x00 0x05 0x0e 0x06 0x80 0x00 0xca 0x80 0xe6 , 11)
avrdude: Send: . [1b] : [3a] . [00] . [05] . [0e] . [06] . [80] . [00] . [ca] . [80] . [e6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: : [3a] 
0x3a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: + [2b] 
0x2b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1f , 10)
avrdude: Send: . [1b] ; [3b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ; [3b] 
0x3b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [cf] 
0xcf avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [86] 
0x86 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [ce] 
0xce avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9c] 
0x9c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,103936,256)
block_size at addr 103936 is 256
STK500V2: stk500v2_loadaddr(-2147431680)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xcb 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x3c 0x00 0x05 0x0e 0x06 0x80 0x00 0xcb 0x00 0x61 , 11)
avrdude: Send: . [1b] < [3c] . [00] . [05] . [0e] . [06] . [80] . [00] . [cb] . [00] a [61] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: < [3c] 
0x3c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: - [2d] 
0x2d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x19 , 10)
avrdude: Send: . [1b] = [3d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [19] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: = [3d] 
0x3d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [96] 
0x96 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [0c] 
0x0c avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: S [53] 
0x53 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,104192,256)
block_size at addr 104192 is 256
STK500V2: stk500v2_loadaddr(-2147431552)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xcb 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x3e 0x00 0x05 0x0e 0x06 0x80 0x00 0xcb 0x80 0xe3 , 11)
avrdude: Send: . [1b] > [3e] . [00] . [05] . [0e] . [06] . [80] . [00] . [cb] . [80] . [e3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: > [3e] 
0x3e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: / [2f] 
0x2f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1b , 10)
avrdude: Send: . [1b] ? [3f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ? [3f] 
0x3f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [ed] 
0xed avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [02] 
0x02 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ed] 
0xed avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [02] 
0x02 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [18] 
0x18 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [15] 
0x15 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ef] 
0xef avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e6] 
0xe6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,104448,256)
block_size at addr 104448 is 256
STK500V2: stk500v2_loadaddr(-2147431424)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xcc 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x40 0x00 0x05 0x0e 0x06 0x80 0x00 0xcc 0x00 0x1a , 11)
avrdude: Send: . [1b] @ [40] . [00] . [05] . [0e] . [06] . [80] . [00] . [cc] . [00] . [1a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: @ [40] 
0x40 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Q [51] 
0x51 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x41 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x65 , 10)
avrdude: Send: . [1b] A [41] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] e [65] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: A [41] 
0x41 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [83] 
0x83 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ef] 
0xef avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [af] 
0xaf 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,104704,256)
block_size at addr 104704 is 256
STK500V2: stk500v2_loadaddr(-2147431296)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xcc 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x42 0x00 0x05 0x0e 0x06 0x80 0x00 0xcc 0x80 0x98 , 11)
avrdude: Send: . [1b] B [42] . [00] . [05] . [0e] . [06] . [80] . [00] . [cc] . [80] . [98] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: B [42] 
0x42 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: S [53] 
0x53 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x43 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x67 , 10)
avrdude: Send: . [1b] C [43] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] g [67] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: C [43] 
0x43 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [0d] 
0x0d avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [0a] 
0x0a avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [0d] 
0x0d avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0d] 
0x0d avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [81] 
0x81 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fa] 
0xfa 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,104960,256)
block_size at addr 104960 is 256
STK500V2: stk500v2_loadaddr(-2147431168)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xcd 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x44 0x00 0x05 0x0e 0x06 0x80 0x00 0xcd 0x00 0x1f , 11)
avrdude: Send: . [1b] D [44] . [00] . [05] . [0e] . [06] . [80] . [00] . [cd] . [00] . [1f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: D [44] 
0x44 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: U [55] 
0x55 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x45 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x61 , 10)
avrdude: Send: . [1b] E [45] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] a [61] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: E [45] 
0x45 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: " [22] 
0x22 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: " [22] 
0x22 avrdude: Recv: ` [60] 
0x60 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [da] 
0xda avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [81] 
0x81 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [81] 
0x81 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ef] 
0xef avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: v [76] 
0x76 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: " [22] 
0x22 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: U [55] 
0x55 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,105216,256)
block_size at addr 105216 is 256
STK500V2: stk500v2_loadaddr(-2147431040)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xcd 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x46 0x00 0x05 0x0e 0x06 0x80 0x00 0xcd 0x80 0x9d , 11)
avrdude: Send: . [1b] F [46] . [00] . [05] . [0e] . [06] . [80] . [00] . [cd] . [80] . [9d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: F [46] 
0x46 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: W [57] 
0x57 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x47 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x63 , 10)
avrdude: Send: . [1b] G [47] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] c [63] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: G [47] 
0x47 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: " [22] 
0x22 avrdude: Recv: ` [60] 
0x60 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [da] 
0xda avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [81] 
0x81 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [81] 
0x81 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [01] 
0x01 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [83] 
0x83 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [96] 
0x96 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [91] 
0x91 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [81] 
0x81 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [81] 
0x81 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [87] 
0x87 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [81] 
0x81 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [91] 
0x91 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [91] 
0x91 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [91] 
0x91 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [87] 
0x87 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [85] 
0x85 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [85] 
0x85 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [85] 
0x85 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [85] 
0x85 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [05] 
0x05 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [05] 
0x05 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [05] 
0x05 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [87] 
0x87 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [85] 
0x85 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ce] 
0xce 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,105472,256)
block_size at addr 105472 is 256
STK500V2: stk500v2_loadaddr(-2147430912)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xce 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x48 0x00 0x05 0x0e 0x06 0x80 0x00 0xce 0x00 0x10 , 11)
avrdude: Send: . [1b] H [48] . [00] . [05] . [0e] . [06] . [80] . [00] . [ce] . [00] . [10] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: H [48] 
0x48 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Y [59] 
0x59 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x49 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6d , 10)
avrdude: Send: . [1b] I [49] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] m [6d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: I [49] 
0x49 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [85] 
0x85 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [89] 
0x89 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [05] 
0x05 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [05] 
0x05 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [05] 
0x05 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ed] 
0xed avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [ff] 
0xff avrdude: Recv: O [4f] 
0x4f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [81] 
0x81 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [81] 
0x81 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [83] 
0x83 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [83] 
0x83 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [83] 
0x83 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [01] 
0x01 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [85] 
0x85 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [8b] 
0x8b avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [89] 
0x89 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [89] 
0x89 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [89] 
0x89 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [83] 
0x83 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [87] 
0x87 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [81] 
0x81 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [de] 
0xde avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [85] 
0x85 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [83] 
0x83 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [83] 
0x83 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,105728,256)
block_size at addr 105728 is 256
STK500V2: stk500v2_loadaddr(-2147430784)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xce 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x4a 0x00 0x05 0x0e 0x06 0x80 0x00 0xce 0x80 0x92 , 11)
avrdude: Send: . [1b] J [4a] . [00] . [05] . [0e] . [06] . [80] . [00] . [ce] . [80] . [92] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: J [4a] 
0x4a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: [ [5b] 
0x5b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6f , 10)
avrdude: Send: . [1b] K [4b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] o [6f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: K [4b] 
0x4b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [81] 
0x81 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [81] 
0x81 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [81] 
0x81 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [8b] 
0x8b avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [89] 
0x89 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [97] 
0x97 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [01] 
0x01 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [01] 
0x01 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [81] 
0x81 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [81] 
0x81 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [81] 
0x81 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [89] 
0x89 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [89] 
0x89 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [89] 
0x89 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [81] 
0x81 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [81] 
0x81 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [81] 
0x81 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: D [44] 
0x44 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,105984,256)
block_size at addr 105984 is 256
STK500V2: stk500v2_loadaddr(-2147430656)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xcf 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x4c 0x00 0x05 0x0e 0x06 0x80 0x00 0xcf 0x00 0x15 , 11)
avrdude: Send: . [1b] L [4c] . [00] . [05] . [0e] . [06] . [80] . [00] . [cf] . [00] . [15] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: L [4c] 
0x4c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ] [5d] 
0x5d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x69 , 10)
avrdude: Send: . [1b] M [4d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] i [69] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: M [4d] 
0x4d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [83] 
0x83 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [83] 
0x83 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [06] 
0x06 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [85] 
0x85 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [85] 
0x85 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [85] 
0x85 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [85] 
0x85 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [af] 
0xaf avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [af] 
0xaf avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [af] 
0xaf avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [96] 
0x96 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [85] 
0x85 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [85] 
0x85 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [85] 
0x85 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [89] 
0x89 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [83] 
0x83 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [83] 
0x83 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [83] 
0x83 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Y [59] 
0x59 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,106240,256)
block_size at addr 106240 is 256
STK500V2: stk500v2_loadaddr(-2147430528)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xcf 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x4e 0x00 0x05 0x0e 0x06 0x80 0x00 0xcf 0x80 0x97 , 11)
avrdude: Send: . [1b] N [4e] . [00] . [05] . [0e] . [06] . [80] . [00] . [cf] . [80] . [97] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: N [4e] 
0x4e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: _ [5f] 
0x5f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6b , 10)
avrdude: Send: . [1b] O [4f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] k [6b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: O [4f] 
0x4f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [13] 
0x13 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [13] 
0x13 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [13] 
0x13 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1d] 
0x1d 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,106496,256)
block_size at addr 106496 is 256
STK500V2: stk500v2_loadaddr(-2147430400)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xd0 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x50 0x00 0x05 0x0e 0x06 0x80 0x00 0xd0 0x00 0x16 , 11)
avrdude: Send: . [1b] P [50] . [00] . [05] . [0e] . [06] . [80] . [00] . [d0] . [00] . [16] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: P [50] 
0x50 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x51 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x75 , 10)
avrdude: Send: . [1b] Q [51] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] u [75] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Q [51] 
0x51 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [84] 
0x84 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: ' [27] 
0x27 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: ' [27] 
0x27 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: ' [27] 
0x27 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: ' [27] 
0x27 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1d] 
0x1d 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,106752,256)
block_size at addr 106752 is 256
STK500V2: stk500v2_loadaddr(-2147430272)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xd0 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x52 0x00 0x05 0x0e 0x06 0x80 0x00 0xd0 0x80 0x94 , 11)
avrdude: Send: . [1b] R [52] . [00] . [05] . [0e] . [06] . [80] . [00] . [d0] . [80] . [94] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: R [52] 
0x52 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: C [43] 
0x43 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x53 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x77 , 10)
avrdude: Send: . [1b] S [53] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] w [77] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: S [53] 
0x53 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [13] 
0x13 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [ba] 
0xba avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [01] 
0x01 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c3] 
0xc3 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,107008,256)
block_size at addr 107008 is 256
STK500V2: stk500v2_loadaddr(-2147430144)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xd1 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x54 0x00 0x05 0x0e 0x06 0x80 0x00 0xd1 0x00 0x13 , 11)
avrdude: Send: . [1b] T [54] . [00] . [05] . [0e] . [06] . [80] . [00] . [d1] . [00] . [13] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: T [54] 
0x54 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x55 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x71 , 10)
avrdude: Send: . [1b] U [55] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] q [71] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: U [55] 
0x55 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [13] 
0x13 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [13] 
0x13 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [13] 
0x13 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [13] 
0x13 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: 7 [37] 
0x37 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: G [47] 
0x47 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,107264,256)
block_size at addr 107264 is 256
STK500V2: stk500v2_loadaddr(-2147430016)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xd1 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x56 0x00 0x05 0x0e 0x06 0x80 0x00 0xd1 0x80 0x91 , 11)
avrdude: Send: . [1b] V [56] . [00] . [05] . [0e] . [06] . [80] . [00] . [d1] . [80] . [91] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: V [56] 
0x56 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: G [47] 
0x47 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x57 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x73 , 10)
avrdude: Send: . [1b] W [57] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] s [73] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: W [57] 
0x57 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [84] 
0x84 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [84] 
0x84 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [00] 
0x00 avrdude: Recv: ^ [5e] 
0x5e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,107520,256)
block_size at addr 107520 is 256
STK500V2: stk500v2_loadaddr(-2147429888)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xd2 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x58 0x00 0x05 0x0e 0x06 0x80 0x00 0xd2 0x00 0x1c , 11)
avrdude: Send: . [1b] X [58] . [00] . [05] . [0e] . [06] . [80] . [00] . [d2] . [00] . [1c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: X [58] 
0x58 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: I [49] 
0x49 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x59 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7d , 10)
avrdude: Send: . [1b] Y [59] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] } [7d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Y [59] 
0x59 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [eb] 
0xeb 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,107776,256)
block_size at addr 107776 is 256
STK500V2: stk500v2_loadaddr(-2147429760)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xd2 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x5a 0x00 0x05 0x0e 0x06 0x80 0x00 0xd2 0x80 0x9e , 11)
avrdude: Send: . [1b] Z [5a] . [00] . [05] . [0e] . [06] . [80] . [00] . [d2] . [80] . [9e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Z [5a] 
0x5a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: K [4b] 
0x4b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7f , 10)
avrdude: Send: . [1b] [ [5b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [7f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: [ [5b] 
0x5b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: s [73] 
0x73 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [ed] 
0xed avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 3 [33] 
0x33 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,108032,256)
block_size at addr 108032 is 256
STK500V2: stk500v2_loadaddr(-2147429632)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xd3 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x5c 0x00 0x05 0x0e 0x06 0x80 0x00 0xd3 0x00 0x19 , 11)
avrdude: Send: . [1b] \ [5c] . [00] . [05] . [0e] . [06] . [80] . [00] . [d3] . [00] . [19] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: \ [5c] 
0x5c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x79 , 10)
avrdude: Send: . [1b] ] [5d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] y [79] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ] [5d] 
0x5d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [84] 
0x84 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [ef] 
0xef avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [02] 
0x02 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: M [4d] 
0x4d avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [03] 
0x03 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: M [4d] 
0x4d avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: O [4f] 
0x4f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: O [4f] 
0x4f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c2] 
0xc2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,108288,256)
block_size at addr 108288 is 256
STK500V2: stk500v2_loadaddr(-2147429504)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xd3 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x5e 0x00 0x05 0x0e 0x06 0x80 0x00 0xd3 0x80 0x9b , 11)
avrdude: Send: . [1b] ^ [5e] . [00] . [05] . [0e] . [06] . [80] . [00] . [d3] . [80] . [9b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ^ [5e] 
0x5e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: O [4f] 
0x4f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7b , 10)
avrdude: Send: . [1b] _ [5f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] { [7b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: _ [5f] 
0x5f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [90] 
0x90 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [86] 
0x86 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [03] 
0x03 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [98] 
0x98 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [82] 
0x82 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [01] 
0x01 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [98] 
0x98 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [9a] 
0x9a avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [98] 
0x98 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [01] 
0x01 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [ed] 
0xed avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [02] 
0x02 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [9a] 
0x9a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [02] 
0x02 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [84] 
0x84 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [84] 
0x84 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [02] 
0x02 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [9a] 
0x9a avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [9a] 
0x9a avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c1] 
0xc1 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,108544,256)
block_size at addr 108544 is 256
STK500V2: stk500v2_loadaddr(-2147429376)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xd4 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x60 0x00 0x05 0x0e 0x06 0x80 0x00 0xd4 0x00 0x22 , 11)
avrdude: Send: . [1b] ` [60] . [00] . [05] . [0e] . [06] . [80] . [00] . [d4] . [00] " [22] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ` [60] 
0x60 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: q [71] 
0x71 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x61 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x45 , 10)
avrdude: Send: . [1b] a [61] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] E [45] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: a [61] 
0x61 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [9a] 
0x9a avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [98] 
0x98 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [88] 
0x88 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [03] 
0x03 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [db] 
0xdb avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [99] 
0x99 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [02] 
0x02 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [10] 
0x10 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [00] 
0x00 avrdude: Recv: s [73] 
0x73 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,108800,256)
block_size at addr 108800 is 256
STK500V2: stk500v2_loadaddr(-2147429248)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xd4 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x62 0x00 0x05 0x0e 0x06 0x80 0x00 0xd4 0x80 0xa0 , 11)
avrdude: Send: . [1b] b [62] . [00] . [05] . [0e] . [06] . [80] . [00] . [d4] . [80] . [a0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: b [62] 
0x62 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: s [73] 
0x73 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x63 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x47 , 10)
avrdude: Send: . [1b] c [63] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] G [47] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: c [63] 
0x63 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [eb] 
0xeb avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [8e] 
0x8e avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ec] 
0xec avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [ec] 
0xec avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ( [28] 
0x28 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [82] 
0x82 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ca] 
0xca 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,109056,256)
block_size at addr 109056 is 256
STK500V2: stk500v2_loadaddr(-2147429120)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xd5 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x64 0x00 0x05 0x0e 0x06 0x80 0x00 0xd5 0x00 0x27 , 11)
avrdude: Send: . [1b] d [64] . [00] . [05] . [0e] . [06] . [80] . [00] . [d5] . [00] ' [27] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: d [64] 
0x64 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: u [75] 
0x75 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x65 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x41 , 10)
avrdude: Send: . [1b] e [65] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] A [41] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: e [65] 
0x65 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8a] 
0x8a avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8b] 
0x8b avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [05] 
0x05 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: O [4f] 
0x4f avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [ed] 
0xed avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [de] 
0xde avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [10] 
0x10 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: g [67] 
0x67 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,109312,256)
block_size at addr 109312 is 256
STK500V2: stk500v2_loadaddr(-2147428992)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xd5 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x66 0x00 0x05 0x0e 0x06 0x80 0x00 0xd5 0x80 0xa5 , 11)
avrdude: Send: . [1b] f [66] . [00] . [05] . [0e] . [06] . [80] . [00] . [d5] . [80] . [a5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: f [66] 
0x66 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: w [77] 
0x77 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x67 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x43 , 10)
avrdude: Send: . [1b] g [67] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] C [43] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: g [67] 
0x67 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [01] 
0x01 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: T [54] 
0x54 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [84] 
0x84 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: % [25] 
0x25 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,109568,256)
block_size at addr 109568 is 256
STK500V2: stk500v2_loadaddr(-2147428864)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xd6 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x68 0x00 0x05 0x0e 0x06 0x80 0x00 0xd6 0x00 0x28 , 11)
avrdude: Send: . [1b] h [68] . [00] . [05] . [0e] . [06] . [80] . [00] . [d6] . [00] ( [28] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: h [68] 
0x68 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: y [79] 
0x79 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x69 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4d , 10)
avrdude: Send: . [1b] i [69] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] M [4d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: i [69] 
0x69 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ef] 
0xef avrdude: Recv: i [69] 
0x69 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [14] 
0x14 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ce] 
0xce avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [94] 
0x94 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [16] 
0x16 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ce] 
0xce avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: D [44] 
0x44 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8f] 
0x8f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f1] 
0xf1 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,109824,256)
block_size at addr 109824 is 256
STK500V2: stk500v2_loadaddr(-2147428736)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xd6 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x6a 0x00 0x05 0x0e 0x06 0x80 0x00 0xd6 0x80 0xaa , 11)
avrdude: Send: . [1b] j [6a] . [00] . [05] . [0e] . [06] . [80] . [00] . [d6] . [80] . [aa] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: j [6a] 
0x6a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: { [7b] 
0x7b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4f , 10)
avrdude: Send: . [1b] k [6b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] O [4f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: k [6b] 
0x6b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [80] 
0x80 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [de] 
0xde avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [85] 
0x85 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [85] 
0x85 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [85] 
0x85 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [85] 
0x85 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [87] 
0x87 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: i [69] 
0x69 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [ca] 
0xca avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b4] 
0xb4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,110080,256)
block_size at addr 110080 is 256
STK500V2: stk500v2_loadaddr(-2147428608)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xd7 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x6c 0x00 0x05 0x0e 0x06 0x80 0x00 0xd7 0x00 0x2d , 11)
avrdude: Send: . [1b] l [6c] . [00] . [05] . [0e] . [06] . [80] . [00] . [d7] . [00] - [2d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: l [6c] 
0x6c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: } [7d] 
0x7d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x49 , 10)
avrdude: Send: . [1b] m [6d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] I [49] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: m [6d] 
0x6d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [01] 
0x01 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [01] 
0x01 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [01] 
0x01 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [01] 
0x01 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [ec] 
0xec avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [ec] 
0xec avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [10] 
0x10 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [ec] 
0xec avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [81] 
0x81 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [da] 
0xda 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,110336,256)
block_size at addr 110336 is 256
STK500V2: stk500v2_loadaddr(-2147428480)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xd7 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x6e 0x00 0x05 0x0e 0x06 0x80 0x00 0xd7 0x80 0xaf , 11)
avrdude: Send: . [1b] n [6e] . [00] . [05] . [0e] . [06] . [80] . [00] . [d7] . [80] . [af] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: n [6e] 
0x6e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [7f] 
0x7f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4b , 10)
avrdude: Send: . [1b] o [6f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] K [4b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: o [6f] 
0x6f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [86] 
0x86 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [01] 
0x01 avrdude: Recv: i [69] 
0x69 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: # [23] 
0x23 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0d] 
0x0d 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,110592,256)
block_size at addr 110592 is 256
STK500V2: stk500v2_loadaddr(-2147428352)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xd8 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x70 0x00 0x05 0x0e 0x06 0x80 0x00 0xd8 0x00 0x3e , 11)
avrdude: Send: . [1b] p [70] . [00] . [05] . [0e] . [06] . [80] . [00] . [d8] . [00] > [3e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: p [70] 
0x70 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: a [61] 
0x61 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x71 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x55 , 10)
avrdude: Send: . [1b] q [71] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] U [55] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: q [71] 
0x71 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [01] 
0x01 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [92] 
0x92 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [92] 
0x92 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ec] 
0xec 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,110848,256)
block_size at addr 110848 is 256
STK500V2: stk500v2_loadaddr(-2147428224)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xd8 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x72 0x00 0x05 0x0e 0x06 0x80 0x00 0xd8 0x80 0xbc , 11)
avrdude: Send: . [1b] r [72] . [00] . [05] . [0e] . [06] . [80] . [00] . [d8] . [80] . [bc] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: r [72] 
0x72 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: c [63] 
0x63 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x73 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x57 , 10)
avrdude: Send: . [1b] s [73] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] W [57] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: s [73] 
0x73 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [8a] 
0x8a avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [ef] 
0xef avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [86] 
0x86 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: i [69] 
0x69 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [12] 
0x12 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,111104,256)
block_size at addr 111104 is 256
STK500V2: stk500v2_loadaddr(-2147428096)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xd9 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x74 0x00 0x05 0x0e 0x06 0x80 0x00 0xd9 0x00 0x3b , 11)
avrdude: Send: . [1b] t [74] . [00] . [05] . [0e] . [06] . [80] . [00] . [d9] . [00] ; [3b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: t [74] 
0x74 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: e [65] 
0x65 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x75 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x51 , 10)
avrdude: Send: . [1b] u [75] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] Q [51] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: u [75] 
0x75 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [0c] 
0x0c avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,111360,256)
block_size at addr 111360 is 256
STK500V2: stk500v2_loadaddr(-2147427968)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xd9 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x76 0x00 0x05 0x0e 0x06 0x80 0x00 0xd9 0x80 0xb9 , 11)
avrdude: Send: . [1b] v [76] . [00] . [05] . [0e] . [06] . [80] . [00] . [d9] . [80] . [b9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: v [76] 
0x76 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: g [67] 
0x67 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x77 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x53 , 10)
avrdude: Send: . [1b] w [77] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] S [53] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: w [77] 
0x77 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [01] 
0x01 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [01] 
0x01 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [01] 
0x01 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [01] 
0x01 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [81] 
0x81 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [01] 
0x01 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [da] 
0xda 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,111616,256)
block_size at addr 111616 is 256
STK500V2: stk500v2_loadaddr(-2147427840)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xda 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x78 0x00 0x05 0x0e 0x06 0x80 0x00 0xda 0x00 0x34 , 11)
avrdude: Send: . [1b] x [78] . [00] . [05] . [0e] . [06] . [80] . [00] . [da] . [00] 4 [34] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: x [78] 
0x78 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: i [69] 
0x69 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x79 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5d , 10)
avrdude: Send: . [1b] y [79] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ] [5d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: y [79] 
0x79 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ed] 
0xed avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [10] 
0x10 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [81] 
0x81 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ed] 
0xed avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [10] 
0x10 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [17] 
0x17 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [8d] 
0x8d avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8a] 
0x8a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,111872,256)
block_size at addr 111872 is 256
STK500V2: stk500v2_loadaddr(-2147427712)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xda 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x7a 0x00 0x05 0x0e 0x06 0x80 0x00 0xda 0x80 0xb6 , 11)
avrdude: Send: . [1b] z [7a] . [00] . [05] . [0e] . [06] . [80] . [00] . [da] . [80] . [b6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: z [7a] 
0x7a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: k [6b] 
0x6b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5f , 10)
avrdude: Send: . [1b] { [7b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] _ [5f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: { [7b] 
0x7b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [01] 
0x01 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [15] 
0x15 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0d] 
0x0d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [97] 
0x97 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [ee] 
0xee avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [96] 
0x96 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [ee] 
0xee avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [ee] 
0xee avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b8] 
0xb8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,112128,256)
block_size at addr 112128 is 256
STK500V2: stk500v2_loadaddr(-2147427584)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xdb 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x7c 0x00 0x05 0x0e 0x06 0x80 0x00 0xdb 0x00 0x31 , 11)
avrdude: Send: . [1b] | [7c] . [00] . [05] . [0e] . [06] . [80] . [00] . [db] . [00] 1 [31] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: | [7c] 
0x7c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: m [6d] 
0x6d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x59 , 10)
avrdude: Send: . [1b] } [7d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] Y [59] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: } [7d] 
0x7d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [15] 
0x15 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [91] 
0x91 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [01] 
0x01 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [0d] 
0x0d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: ( [28] 
0x28 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [07] 
0x07 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [07] 
0x07 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [16] 
0x16 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [18] 
0x18 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [85] 
0x85 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [10] 
0x10 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [96] 
0x96 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [07] 
0x07 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [0f] 
0x0f avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [1f] 
0x1f avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [80] 
0x80 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [95] 
0x95 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,112384,256)
block_size at addr 112384 is 256
STK500V2: stk500v2_loadaddr(-2147427456)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xdb 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x7e 0x00 0x05 0x0e 0x06 0x80 0x00 0xdb 0x80 0xb3 , 11)
avrdude: Send: . [1b] ~ [7e] . [00] . [05] . [0e] . [06] . [80] . [00] . [db] . [80] . [b3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ~ [7e] 
0x7e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: o [6f] 
0x6f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5b , 10)
avrdude: Send: . [1b] . [7f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] [ [5b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [7f] 
0x7f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: # [23] 
0x23 avrdude: Recv: p [70] 
0x70 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [94] 
0x94 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [05] 
0x05 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [91] 
0x91 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [91] 
0x91 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: K [4b] 
0x4b avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [04] 
0x04 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [05] 
0x05 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [8b] 
0x8b avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,112640,256)
block_size at addr 112640 is 256
STK500V2: stk500v2_loadaddr(-2147427328)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xdc 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x80 0x00 0x05 0x0e 0x06 0x80 0x00 0xdc 0x00 0xca , 11)
avrdude: Send: . [1b] . [80] . [00] . [05] . [0e] . [06] . [80] . [00] . [dc] . [00] . [ca] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [80] 
0x80 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x81 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa5 , 10)
avrdude: Send: . [1b] . [81] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [81] 
0x81 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [15] 
0x15 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [1d] 
0x1d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [81] 
0x81 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [2e] 
0x2e avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [98] 
0x98 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [2e] 
0x2e avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [81] 
0x81 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [01] 
0x01 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [88] 
0x88 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [81] 
0x81 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [02] 
0x02 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [81] 
0x81 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,112896,256)
block_size at addr 112896 is 256
STK500V2: stk500v2_loadaddr(-2147427200)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xdc 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x82 0x00 0x05 0x0e 0x06 0x80 0x00 0xdc 0x80 0x48 , 11)
avrdude: Send: . [1b] . [82] . [00] . [05] . [0e] . [06] . [80] . [00] . [dc] . [80] H [48] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [82] 
0x82 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x83 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa7 , 10)
avrdude: Send: . [1b] . [83] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [83] 
0x83 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [08] 
0x08 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [ed] 
0xed avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [15] 
0x15 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [eb] 
0xeb avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: * [2a] 
0x2a avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [ec] 
0xec avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: * [2a] 
0x2a avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [ea] 
0xea avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: # [23] 
0x23 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [15] 
0x15 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [06] 
0x06 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: a [61] 
0x61 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [05] 
0x05 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [cf] 
0xcf avrdude: Recv:   [20] 
0x20 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: ! [21] 
0x21 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: D [44] 
0x44 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [13] 
0x13 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: F [46] 
0x46 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: ( [28] 
0x28 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c4] 
0xc4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,113152,256)
block_size at addr 113152 is 256
STK500V2: stk500v2_loadaddr(-2147427072)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xdd 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x84 0x00 0x05 0x0e 0x06 0x80 0x00 0xdd 0x00 0xcf , 11)
avrdude: Send: . [1b] . [84] . [00] . [05] . [0e] . [06] . [80] . [00] . [dd] . [00] . [cf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [84] 
0x84 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [95] 
0x95 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x85 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa1 , 10)
avrdude: Send: . [1b] . [85] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [85] 
0x85 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [13] 
0x13 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [cf] 
0xcf avrdude: Recv: d [64] 
0x64 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: s [73] 
0x73 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [82] 
0x82 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [01] 
0x01 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [15] 
0x15 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [1d] 
0x1d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [88] 
0x88 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [81] 
0x81 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [02] 
0x02 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [88] 
0x88 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [98] 
0x98 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [00] 
0x00 avrdude: Recv: u [75] 
0x75 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,113408,256)
block_size at addr 113408 is 256
STK500V2: stk500v2_loadaddr(-2147426944)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xdd 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x86 0x00 0x05 0x0e 0x06 0x80 0x00 0xdd 0x80 0x4d , 11)
avrdude: Send: . [1b] . [86] . [00] . [05] . [0e] . [06] . [80] . [00] . [dd] . [80] M [4d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [86] 
0x86 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x87 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa3 , 10)
avrdude: Send: . [1b] . [87] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [87] 
0x87 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [88] 
0x88 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [98] 
0x98 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [01] 
0x01 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [98] 
0x98 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [08] 
0x08 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [ed] 
0xed avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [15] 
0x15 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [eb] 
0xeb avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: * [2a] 
0x2a avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [ec] 
0xec avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: * [2a] 
0x2a avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [ea] 
0xea avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: # [23] 
0x23 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [15] 
0x15 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: # [23] 
0x23 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [17] 
0x17 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: D [44] 
0x44 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0d] 
0x0d 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,113664,256)
block_size at addr 113664 is 256
STK500V2: stk500v2_loadaddr(-2147426816)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xde 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x88 0x00 0x05 0x0e 0x06 0x80 0x00 0xde 0x00 0xc0 , 11)
avrdude: Send: . [1b] . [88] . [00] . [05] . [0e] . [06] . [80] . [00] . [de] . [00] . [c0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [88] 
0x88 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [99] 
0x99 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x89 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xad , 10)
avrdude: Send: . [1b] . [89] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ad] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [89] 
0x89 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ef] 
0xef avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: F [46] 
0x46 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: ( [28] 
0x28 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: d [64] 
0x64 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: s [73] 
0x73 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [82] 
0x82 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [85] 
0x85 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [91] 
0x91 avrdude: Recv: a [61] 
0x61 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [11] 
0x11 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [92] 
0x92 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [91] 
0x91 avrdude: Recv: U [55] 
0x55 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [91] 
0x91 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [17] 
0x17 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [91] 
0x91 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [15] 
0x15 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a6] 
0xa6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,113920,256)
block_size at addr 113920 is 256
STK500V2: stk500v2_loadaddr(-2147426688)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xde 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x8a 0x00 0x05 0x0e 0x06 0x80 0x00 0xde 0x80 0x42 , 11)
avrdude: Send: . [1b] . [8a] . [00] . [05] . [0e] . [06] . [80] . [00] . [de] . [80] B [42] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8a] 
0x8a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9b] 
0x9b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xaf , 10)
avrdude: Send: . [1b] . [8b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [af] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8b] 
0x8b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [01] 
0x01 avrdude: Recv: F [46] 
0x46 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [83] 
0x83 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [81] 
0x81 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [81] 
0x81 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [81] 
0x81 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [85] 
0x85 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [17] 
0x17 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,114176,256)
block_size at addr 114176 is 256
STK500V2: stk500v2_loadaddr(-2147426560)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xdf 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x8c 0x00 0x05 0x0e 0x06 0x80 0x00 0xdf 0x00 0xc5 , 11)
avrdude: Send: . [1b] . [8c] . [00] . [05] . [0e] . [06] . [80] . [00] . [df] . [00] . [c5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8c] 
0x8c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9d] 
0x9d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa9 , 10)
avrdude: Send: . [1b] . [8d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8d] 
0x8d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: w [77] 
0x77 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [87] 
0x87 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: v [76] 
0x76 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: # [23] 
0x23 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [86] 
0x86 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [95] 
0x95 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [da] 
0xda avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: & [26] 
0x26 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: $ [24] 
0x24 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: % [25] 
0x25 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [aa] 
0xaa avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1f] 
0x1f avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: f [66] 
0x66 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: " [22] 
0x22 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [82] 
0x82 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: v [76] 
0x76 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: j [6a] 
0x6a avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cc] 
0xcc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,114432,256)
block_size at addr 114432 is 256
STK500V2: stk500v2_loadaddr(-2147426432)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xdf 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x8e 0x00 0x05 0x0e 0x06 0x80 0x00 0xdf 0x80 0x47 , 11)
avrdude: Send: . [1b] . [8e] . [00] . [05] . [0e] . [06] . [80] . [00] . [df] . [80] G [47] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8e] 
0x8e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xab , 10)
avrdude: Send: . [1b] . [8f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ab] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8f] 
0x8f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [05] 
0x05 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [98] 
0x98 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [01] 
0x01 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: ! [21] 
0x21 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: # [23] 
0x23 avrdude: Recv: - [2d] 
0x2d avrdude: Recv:   [20] 
0x20 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: # [23] 
0x23 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: ! [21] 
0x21 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [aa] 
0xaa 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,114688,256)
block_size at addr 114688 is 256
STK500V2: stk500v2_loadaddr(-2147426304)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xe0 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x90 0x00 0x05 0x0e 0x06 0x80 0x00 0xe0 0x00 0xe6 , 11)
avrdude: Send: . [1b] . [90] . [00] . [05] . [0e] . [06] . [80] . [00] . [e0] . [00] . [e6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [90] 
0x90 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x91 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb5 , 10)
avrdude: Send: . [1b] . [91] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [91] 
0x91 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [2e] 
0x2e avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [ed] 
0xed avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: * [2a] 
0x2a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: # [23] 
0x23 avrdude: Recv: - [2d] 
0x2d avrdude: Recv:   [20] 
0x20 avrdude: Recv: d [64] 
0x64 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [9e] 
0x9e avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [9e] 
0x9e avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: b [62] 
0x62 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [83] 
0x83 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [80] 
0x80 avrdude: Recv: h [68] 
0x68 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: } [7d] 
0x7d avrdude: Recv: . [95] 
0x95 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: i [69] 
0x69 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [ff] 
0xff avrdude: Recv: w [77] 
0x77 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [01] 
0x01 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: i [69] 
0x69 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [00] 
0x00 avrdude: Recv: N [4e] 
0x4e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,114944,256)
block_size at addr 114944 is 256
STK500V2: stk500v2_loadaddr(-2147426176)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xe0 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x92 0x00 0x05 0x0e 0x06 0x80 0x00 0xe0 0x80 0x64 , 11)
avrdude: Send: . [1b] . [92] . [00] . [05] . [0e] . [06] . [80] . [00] . [e0] . [80] d [64] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [92] 
0x92 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [83] 
0x83 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x93 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb7 , 10)
avrdude: Send: . [1b] . [93] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [93] 
0x93 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [10] 
0x10 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [94] 
0x94 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [0e] 
0x0e avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [ff] 
0xff avrdude: Recv: v [76] 
0x76 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [2e] 
0x2e avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [18] 
0x18 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: # [23] 
0x23 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: / [2f] 
0x2f avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [88] 
0x88 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: & [26] 
0x26 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [81] 
0x81 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: e [65] 
0x65 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,115200,256)
block_size at addr 115200 is 256
STK500V2: stk500v2_loadaddr(-2147426048)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xe1 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x94 0x00 0x05 0x0e 0x06 0x80 0x00 0xe1 0x00 0xe3 , 11)
avrdude: Send: . [1b] . [94] . [00] . [05] . [0e] . [06] . [80] . [00] . [e1] . [00] . [e3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [94] 
0x94 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [85] 
0x85 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x95 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb1 , 10)
avrdude: Send: . [1b] . [95] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [95] 
0x95 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [ff] 
0xff avrdude: Recv: w [77] 
0x77 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: # [23] 
0x23 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [14] 
0x14 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [83] 
0x83 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [8e] 
0x8e avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [99] 
0x99 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [86] 
0x86 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [92] 
0x92 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [14] 
0x14 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: ! [21] 
0x21 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [86] 
0x86 avrdude: Recv: x [78] 
0x78 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [14] 
0x14 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: " [22] 
0x22 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: U [55] 
0x55 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,115456,256)
block_size at addr 115456 is 256
STK500V2: stk500v2_loadaddr(-2147425920)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xe1 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x96 0x00 0x05 0x0e 0x06 0x80 0x00 0xe1 0x80 0x61 , 11)
avrdude: Send: . [1b] . [96] . [00] . [05] . [0e] . [06] . [80] . [00] . [e1] . [80] a [61] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [96] 
0x96 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x97 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb3 , 10)
avrdude: Send: . [1b] . [97] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [97] 
0x97 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [90] 
0x90 avrdude: Recv: a [61] 
0x61 avrdude: Recv: P [50] 
0x50 avrdude: Recv: p [70] 
0x70 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: P [50] 
0x50 avrdude: Recv: p [70] 
0x70 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [81] 
0x81 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [81] 
0x81 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [81] 
0x81 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [81] 
0x81 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [17] 
0x17 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [07] 
0x07 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [01] 
0x01 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [83] 
0x83 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [93] 
0x93 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [83] 
0x83 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [89] 
0x89 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: ' [27] 
0x27 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv:   [20] 
0x20 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8c] 
0x8c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,115712,256)
block_size at addr 115712 is 256
STK500V2: stk500v2_loadaddr(-2147425792)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xe2 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x98 0x00 0x05 0x0e 0x06 0x80 0x00 0xe2 0x00 0xec , 11)
avrdude: Send: . [1b] . [98] . [00] . [05] . [0e] . [06] . [80] . [00] . [e2] . [00] . [ec] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [98] 
0x98 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [89] 
0x89 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x99 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbd , 10)
avrdude: Send: . [1b] . [99] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [99] 
0x99 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [7f] 
0x7f avrdude: Recv: n [6e] 
0x6e avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [af] 
0xaf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [0f] 
0x0f avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [94] 
0x94 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [19] 
0x19 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: F [46] 
0x46 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: G [47] 
0x47 avrdude: Recv: p [70] 
0x70 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: F [46] 
0x46 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: p [70] 
0x70 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: J [4a] 
0x4a avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: @ [40] 
0x40 avrdude: Recv: R [52] 
0x52 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [05] 
0x05 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [94] 
0x94 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [95] 
0x95 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [00] 
0x00 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [00] 
0x00 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0f] 
0x0f avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [90] 
0x90 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,115968,256)
block_size at addr 115968 is 256
STK500V2: stk500v2_loadaddr(-2147425664)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xe2 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x9a 0x00 0x05 0x0e 0x06 0x80 0x00 0xe2 0x80 0x6e , 11)
avrdude: Send: . [1b] . [9a] . [00] . [05] . [0e] . [06] . [80] . [00] . [e2] . [80] n [6e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9a] 
0x9a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8b] 
0x8b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbf , 10)
avrdude: Send: . [1b] . [9b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9b] 
0x9b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [06] 
0x06 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: f [66] 
0x66 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: w [77] 
0x77 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: & [26] 
0x26 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [16] 
0x16 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ba] 
0xba avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: & [26] 
0x26 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bd] 
0xbd avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,116224,256)
block_size at addr 116224 is 256
STK500V2: stk500v2_loadaddr(-2147425536)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xe3 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x9c 0x00 0x05 0x0e 0x06 0x80 0x00 0xe3 0x00 0xe9 , 11)
avrdude: Send: . [1b] . [9c] . [00] . [05] . [0e] . [06] . [80] . [00] . [e3] . [00] . [e9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9c] 
0x9c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb9 , 10)
avrdude: Send: . [1b] . [9d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9d] 
0x9d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [07] 
0x07 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [94] 
0x94 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [95] 
0x95 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: P [50] 
0x50 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [df] 
0xdf avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [df] 
0xdf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [17] 
0x17 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [07] 
0x07 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ba] 
0xba avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [ff] 
0xff avrdude: Recv: ' [27] 
0x27 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: P [50] 
0x50 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: # [23] 
0x23 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: D [44] 
0x44 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: X [58] 
0x58 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [0b] 
0x0b avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,116480,256)
block_size at addr 116480 is 256
STK500V2: stk500v2_loadaddr(-2147425408)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xe3 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x9e 0x00 0x05 0x0e 0x06 0x80 0x00 0xe3 0x80 0x6b , 11)
avrdude: Send: . [1b] . [9e] . [00] . [05] . [0e] . [06] . [80] . [00] . [e3] . [80] k [6b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9e] 
0x9e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbb , 10)
avrdude: Send: . [1b] . [9f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9f] 
0x9f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [0f] 
0x0f avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [de] 
0xde avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [de] 
0xde avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [de] 
0xde avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [05] 
0x05 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [07] 
0x07 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [07] 
0x07 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [07] 
0x07 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: % [25] 
0x25 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [91] 
0x91 avrdude: Recv: U [55] 
0x55 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [ed] 
0xed avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [ec] 
0xec avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: w [77] 
0x77 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [06] 
0x06 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [07] 
0x07 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [de] 
0xde avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [dd] 
0xdd avrdude: Recv: # [23] 
0x23 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [ea] 
0xea avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [ed] 
0xed avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [ec] 
0xec avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: x [78] 
0x78 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: ' [27] 
0x27 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [ce] 
0xce avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: q [71] 
0x71 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,116736,256)
block_size at addr 116736 is 256
STK500V2: stk500v2_loadaddr(-2147425280)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xe4 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa0 0x00 0x05 0x0e 0x06 0x80 0x00 0xe4 0x00 0xd2 , 11)
avrdude: Send: . [1b] . [a0] . [00] . [05] . [0e] . [06] . [80] . [00] . [e4] . [00] . [d2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a0] 
0xa0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b1] 
0xb1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x85 , 10)
avrdude: Send: . [1b] . [a1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [85] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a1] 
0xa1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [ce] 
0xce avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [16] 
0x16 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [95] 
0x95 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [ce] 
0xce avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [de] 
0xde avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [de] 
0xde avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ce] 
0xce avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ce] 
0xce avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [ce] 
0xce avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [de] 
0xde avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: U [55] 
0x55 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: ' [27] 
0x27 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [17] 
0x17 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [07] 
0x07 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [2e] 
0x2e avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: / [2f] 
0x2f avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [07] 
0x07 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ff] 
0xff avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [05] 
0x05 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [cd] 
0xcd avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [ce] 
0xce avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [98] 
0x98 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [17] 
0x17 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [07] 
0x07 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f4] 
0xf4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,116992,256)
block_size at addr 116992 is 256
STK500V2: stk500v2_loadaddr(-2147425152)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xe4 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xa2 0x00 0x05 0x0e 0x06 0x80 0x00 0xe4 0x80 0x50 , 11)
avrdude: Send: . [1b] . [a2] . [00] . [05] . [0e] . [06] . [80] . [00] . [e4] . [80] P [50] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a2] 
0xa2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b3] 
0xb3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x87 , 10)
avrdude: Send: . [1b] . [a3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [87] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a3] 
0xa3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [ce] 
0xce avrdude: Recv: g [67] 
0x67 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: x [78] 
0x78 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [cd] 
0xcd avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [16] 
0x16 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: w [77] 
0x77 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [87] 
0x87 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: v [76] 
0x76 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [86] 
0x86 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [95] 
0x95 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [da] 
0xda avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [91] 
0x91 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [91] 
0x91 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [91] 
0x91 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ' [27] 
0x27 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,117248,256)
block_size at addr 117248 is 256
STK500V2: stk500v2_loadaddr(-2147425024)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xe5 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa4 0x00 0x05 0x0e 0x06 0x80 0x00 0xe5 0x00 0xd7 , 11)
avrdude: Send: . [1b] . [a4] . [00] . [05] . [0e] . [06] . [80] . [00] . [e5] . [00] . [d7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a4] 
0xa4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b5] 
0xb5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x81 , 10)
avrdude: Send: . [1b] . [a5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [81] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a5] 
0xa5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [94] 
0x94 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [cd] 
0xcd avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [ed] 
0xed avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0f] 
0x0f avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [07] 
0x07 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [07] 
0x07 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [95] 
0x95 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0f] 
0x0f avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [ea] 
0xea avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [ed] 
0xed avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [ec] 
0xec avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [de] 
0xde avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [90] 
0x90 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: g [67] 
0x67 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: x [78] 
0x78 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [98] 
0x98 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [96] 
0x96 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [dd] 
0xdd avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: W [57] 
0x57 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [98] 
0x98 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: g [67] 
0x67 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: x [78] 
0x78 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,117504,256)
block_size at addr 117504 is 256
STK500V2: stk500v2_loadaddr(-2147424896)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xe5 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xa6 0x00 0x05 0x0e 0x06 0x80 0x00 0xe5 0x80 0x55 , 11)
avrdude: Send: . [1b] . [a6] . [00] . [05] . [0e] . [06] . [80] . [00] . [e5] . [80] U [55] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a6] 
0xa6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b7] 
0xb7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x83 , 10)
avrdude: Send: . [1b] . [a7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [83] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a7] 
0xa7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [98] 
0x98 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [99] 
0x99 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [ee] 
0xee avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: W [57] 
0x57 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: X [58] 
0x58 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [07] 
0x07 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [07] 
0x07 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0b] 
0x0b avrdude: Recv:   [20] 
0x20 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [94] 
0x94 avrdude: Recv:   [20] 
0x20 avrdude: Recv: % [25] 
0x25 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: % [25] 
0x25 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: ' [27] 
0x27 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [07] 
0x07 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [07] 
0x07 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0b] 
0x0b avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [de] 
0xde avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [91] 
0x91 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1b] 
0x1b avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: o [6f] 
0x6f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,117760,256)
block_size at addr 117760 is 256
STK500V2: stk500v2_loadaddr(-2147424768)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xe6 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa8 0x00 0x05 0x0e 0x06 0x80 0x00 0xe6 0x00 0xd8 , 11)
avrdude: Send: . [1b] . [a8] . [00] . [05] . [0e] . [06] . [80] . [00] . [e6] . [00] . [d8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a8] 
0xa8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b9] 
0xb9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8d , 10)
avrdude: Send: . [1b] . [a9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a9] 
0xa9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [95] 
0x95 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [85] 
0x85 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [19] 
0x19 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c3] 
0xc3 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,118016,256)
block_size at addr 118016 is 256
STK500V2: stk500v2_loadaddr(-2147424640)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xe6 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xaa 0x00 0x05 0x0e 0x06 0x80 0x00 0xe6 0x80 0x5a , 11)
avrdude: Send: . [1b] . [aa] . [00] . [05] . [0e] . [06] . [80] . [00] . [e6] . [80] Z [5a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [aa] 
0xaa hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bb] 
0xbb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xab 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8f , 10)
avrdude: Send: . [1b] . [ab] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ab] 
0xab hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: a [61] 
0x61 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [17] 
0x17 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [92] 
0x92 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [da] 
0xda avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [df] 
0xdf avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [96] 
0x96 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [ff] 
0xff avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ff] 
0xff avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ff] 
0xff avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,118272,256)
block_size at addr 118272 is 256
STK500V2: stk500v2_loadaddr(-2147424512)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xe7 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xac 0x00 0x05 0x0e 0x06 0x80 0x00 0xe7 0x00 0xdd , 11)
avrdude: Send: . [1b] . [ac] . [00] . [05] . [0e] . [06] . [80] . [00] . [e7] . [00] . [dd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ac] 
0xac hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bd] 
0xbd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xad 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x89 , 10)
avrdude: Send: . [1b] . [ad] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [89] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ad] 
0xad hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [cc] 
0xcc avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ff] 
0xff avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [10] 
0x10 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [96] 
0x96 avrdude: Recv: X [58] 
0x58 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [89] 
0x89 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [89] 
0x89 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [89] 
0x89 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 avrdude: Recv: i [69] 
0x69 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [00] 
0x00 avrdude: Recv: h [68] 
0x68 avrdude: Recv: t [74] 
0x74 avrdude: Recv: t [74] 
0x74 avrdude: Recv: p [70] 
0x70 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: / [2f] 
0x2f avrdude: Recv: / [2f] 
0x2f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: r [72] 
0x72 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: f [66] 
0x66 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: o [6f] 
0x6f avrdude: Recv: r [72] 
0x72 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [00] 
0x00 avrdude: Recv: b [62] 
0x62 avrdude: Recv: e [65] 
0x65 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [00] 
0x00 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [00] 
0x00 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [00] 
0x00 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: 3 [33] 
0x33 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,118528,256)
block_size at addr 118528 is 256
STK500V2: stk500v2_loadaddr(-2147424384)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xe7 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xae 0x00 0x05 0x0e 0x06 0x80 0x00 0xe7 0x80 0x5f , 11)
avrdude: Send: . [1b] . [ae] . [00] . [05] . [0e] . [06] . [80] . [00] . [e7] . [80] _ [5f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ae] 
0xae hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bf] 
0xbf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xaf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8b , 10)
avrdude: Send: . [1b] . [af] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [af] 
0xaf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [01] 
0x01 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [10] 
0x10 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [02] 
0x02 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: X [58] 
0x58 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 avrdude: Recv: i [69] 
0x69 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [00] 
0x00 avrdude: Recv: h [68] 
0x68 avrdude: Recv: t [74] 
0x74 avrdude: Recv: t [74] 
0x74 avrdude: Recv: p [70] 
0x70 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: / [2f] 
0x2f avrdude: Recv: / [2f] 
0x2f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: r [72] 
0x72 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: f [66] 
0x66 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: o [6f] 
0x6f avrdude: Recv: r [72] 
0x72 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [00] 
0x00 avrdude: Recv: b [62] 
0x62 avrdude: Recv: e [65] 
0x65 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [00] 
0x00 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [00] 
0x00 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [00] 
0x00 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,118784,256)
block_size at addr 118784 is 256
STK500V2: stk500v2_loadaddr(-2147424256)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xe8 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb0 0x00 0x05 0x0e 0x06 0x80 0x00 0xe8 0x00 0xce , 11)
avrdude: Send: . [1b] . [b0] . [00] . [05] . [0e] . [06] . [80] . [00] . [e8] . [00] . [ce] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b0] 
0xb0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a1] 
0xa1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x95 , 10)
avrdude: Send: . [1b] . [b1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [95] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b1] 
0xb1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: f [66] 
0x66 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: w [77] 
0x77 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: & [26] 
0x26 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [16] 
0x16 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ba] 
0xba avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: & [26] 
0x26 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bd] 
0xbd avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [07] 
0x07 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bc] 
0xbc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,119040,256)
block_size at addr 119040 is 256
STK500V2: stk500v2_loadaddr(-2147424128)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xe8 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xb2 0x00 0x05 0x0e 0x06 0x80 0x00 0xe8 0x80 0x4c , 11)
avrdude: Send: . [1b] . [b2] . [00] . [05] . [0e] . [06] . [80] . [00] . [e8] . [80] L [4c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b2] 
0xb2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a3] 
0xa3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x97 , 10)
avrdude: Send: . [1b] . [b3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [97] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b3] 
0xb3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [95] 
0x95 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: P [50] 
0x50 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [df] 
0xdf avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [df] 
0xdf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [17] 
0x17 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [07] 
0x07 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ba] 
0xba avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [ff] 
0xff avrdude: Recv: ' [27] 
0x27 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: P [50] 
0x50 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: # [23] 
0x23 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: D [44] 
0x44 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: X [58] 
0x58 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: ~ [7e] 
0x7e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [0b] 
0x0b avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [0f] 
0x0f avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,119296,256)
block_size at addr 119296 is 256
STK500V2: stk500v2_loadaddr(-2147424000)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xe9 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb4 0x00 0x05 0x0e 0x06 0x80 0x00 0xe9 0x00 0xcb , 11)
avrdude: Send: . [1b] . [b4] . [00] . [05] . [0e] . [06] . [80] . [00] . [e9] . [00] . [cb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b4] 
0xb4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a5] 
0xa5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x91 , 10)
avrdude: Send: . [1b] . [b5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [91] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b5] 
0xb5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [de] 
0xde avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [de] 
0xde avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [de] 
0xde avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [05] 
0x05 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [07] 
0x07 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [07] 
0x07 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [07] 
0x07 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: % [25] 
0x25 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [91] 
0x91 avrdude: Recv: U [55] 
0x55 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [ed] 
0xed avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [ec] 
0xec avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: w [77] 
0x77 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [06] 
0x06 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [07] 
0x07 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [de] 
0xde avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [dd] 
0xdd avrdude: Recv: # [23] 
0x23 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [ea] 
0xea avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [ed] 
0xed avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [ec] 
0xec avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: x [78] 
0x78 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: ' [27] 
0x27 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [ce] 
0xce avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [ce] 
0xce avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [16] 
0x16 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [95] 
0x95 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,119552,256)
block_size at addr 119552 is 256
STK500V2: stk500v2_loadaddr(-2147423872)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xe9 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xb6 0x00 0x05 0x0e 0x06 0x80 0x00 0xe9 0x80 0x49 , 11)
avrdude: Send: . [1b] . [b6] . [00] . [05] . [0e] . [06] . [80] . [00] . [e9] . [80] I [49] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b6] 
0xb6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a7] 
0xa7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x93 , 10)
avrdude: Send: . [1b] . [b7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [93] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b7] 
0xb7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [ce] 
0xce avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [de] 
0xde avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [de] 
0xde avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [ce] 
0xce avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ce] 
0xce avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [ce] 
0xce avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [de] 
0xde avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: U [55] 
0x55 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: ' [27] 
0x27 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [17] 
0x17 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [07] 
0x07 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [2e] 
0x2e avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: / [2f] 
0x2f avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [07] 
0x07 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [80] 
0x80 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ff] 
0xff avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [05] 
0x05 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [cd] 
0xcd avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [ce] 
0xce avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [98] 
0x98 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [17] 
0x17 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [07] 
0x07 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [11] 
0x11 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a5] 
0xa5 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,119808,256)
block_size at addr 119808 is 256
STK500V2: stk500v2_loadaddr(-2147423744)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xea 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb8 0x00 0x05 0x0e 0x06 0x80 0x00 0xea 0x00 0xc4 , 11)
avrdude: Send: . [1b] . [b8] . [00] . [05] . [0e] . [06] . [80] . [00] . [ea] . [00] . [c4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b8] 
0xb8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a9] 
0xa9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9d , 10)
avrdude: Send: . [1b] . [b9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b9] 
0xb9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [ce] 
0xce avrdude: Recv: g [67] 
0x67 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: x [78] 
0x78 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [cd] 
0xcd avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [16] 
0x16 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: w [77] 
0x77 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [87] 
0x87 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: v [76] 
0x76 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [86] 
0x86 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [95] 
0x95 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [da] 
0xda avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [91] 
0x91 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [91] 
0x91 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [91] 
0x91 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [94] 
0x94 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [cd] 
0xcd avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ] [5d] 
0x5d 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,120064,256)
block_size at addr 120064 is 256
STK500V2: stk500v2_loadaddr(-2147423616)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xea 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xba 0x00 0x05 0x0e 0x06 0x80 0x00 0xea 0x80 0x46 , 11)
avrdude: Send: . [1b] . [ba] . [00] . [05] . [0e] . [06] . [80] . [00] . [ea] . [80] F [46] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ba] 
0xba hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ab] 
0xab 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9f , 10)
avrdude: Send: . [1b] . [bb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bb] 
0xbb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [ed] 
0xed avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0f] 
0x0f avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [07] 
0x07 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [07] 
0x07 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [95] 
0x95 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0f] 
0x0f avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [ea] 
0xea avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [ed] 
0xed avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [ec] 
0xec avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [de] 
0xde avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [90] 
0x90 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: g [67] 
0x67 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: x [78] 
0x78 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [98] 
0x98 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [96] 
0x96 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [dd] 
0xdd avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: W [57] 
0x57 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [98] 
0x98 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: g [67] 
0x67 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: x [78] 
0x78 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [98] 
0x98 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [99] 
0x99 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e3] 
0xe3 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,120320,256)
block_size at addr 120320 is 256
STK500V2: stk500v2_loadaddr(-2147423488)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xeb 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xbc 0x00 0x05 0x0e 0x06 0x80 0x00 0xeb 0x00 0xc1 , 11)
avrdude: Send: . [1b] . [bc] . [00] . [05] . [0e] . [06] . [80] . [00] . [eb] . [00] . [c1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bc] 
0xbc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ad] 
0xad 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x99 , 10)
avrdude: Send: . [1b] . [bd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [99] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bd] 
0xbd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [ee] 
0xee avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: W [57] 
0x57 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: X [58] 
0x58 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [07] 
0x07 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [07] 
0x07 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0b] 
0x0b avrdude: Recv:   [20] 
0x20 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [94] 
0x94 avrdude: Recv:   [20] 
0x20 avrdude: Recv: % [25] 
0x25 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: % [25] 
0x25 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: ' [27] 
0x27 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [07] 
0x07 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [07] 
0x07 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0b] 
0x0b avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [de] 
0xde avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [91] 
0x91 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1b] 
0x1b avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [98] 
0x98 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,120576,256)
block_size at addr 120576 is 256
STK500V2: stk500v2_loadaddr(-2147423360)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xeb 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xbe 0x00 0x05 0x0e 0x06 0x80 0x00 0xeb 0x80 0x43 , 11)
avrdude: Send: . [1b] . [be] . [00] . [05] . [0e] . [06] . [80] . [00] . [eb] . [80] C [43] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [be] 
0xbe hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [af] 
0xaf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9b , 10)
avrdude: Send: . [1b] . [bf] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bf] 
0xbf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [95] 
0x95 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [85] 
0x85 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [19] 
0x19 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [91] 
0x91 avrdude: Recv: a [61] 
0x61 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b2] 
0xb2 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,120832,256)
block_size at addr 120832 is 256
STK500V2: stk500v2_loadaddr(-2147423232)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xec 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc0 0x00 0x05 0x0e 0x06 0x80 0x00 0xec 0x00 0xba , 11)
avrdude: Send: . [1b] . [c0] . [00] . [05] . [0e] . [06] . [80] . [00] . [ec] . [00] . [ba] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c0] 
0xc0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d1] 
0xd1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe5 , 10)
avrdude: Send: . [1b] . [c1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c1] 
0xc1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [17] 
0x17 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [92] 
0x92 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [df] 
0xdf avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ff] 
0xff avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ff] 
0xff avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ff] 
0xff avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [cc] 
0xcc avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [10] 
0x10 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [00] 
0x00 avrdude: Recv: Y [59] 
0x59 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,121088,256)
block_size at addr 121088 is 256
STK500V2: stk500v2_loadaddr(-2147423104)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xec 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xc2 0x00 0x05 0x0e 0x06 0x80 0x00 0xec 0x80 0x38 , 11)
avrdude: Send: . [1b] . [c2] . [00] . [05] . [0e] . [06] . [80] . [00] . [ec] . [80] 8 [38] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c2] 
0xc2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d3] 
0xd3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe7 , 10)
avrdude: Send: . [1b] . [c3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c3] 
0xc3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: T [54] 
0x54 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [02] 
0x02 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [88] 
0x88 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: X [58] 
0x58 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [d3] 
0xd3 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 avrdude: Recv: i [69] 
0x69 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [00] 
0x00 avrdude: Recv: h [68] 
0x68 avrdude: Recv: t [74] 
0x74 avrdude: Recv: t [74] 
0x74 avrdude: Recv: p [70] 
0x70 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: / [2f] 
0x2f avrdude: Recv: / [2f] 
0x2f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: r [72] 
0x72 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: f [66] 
0x66 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: o [6f] 
0x6f avrdude: Recv: r [72] 
0x72 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [89] 
0x89 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,121344,256)
block_size at addr 121344 is 256
STK500V2: stk500v2_loadaddr(-2147422976)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xed 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc4 0x00 0x05 0x0e 0x06 0x80 0x00 0xed 0x00 0xbf , 11)
avrdude: Send: . [1b] . [c4] . [00] . [05] . [0e] . [06] . [80] . [00] . [ed] . [00] . [bf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c4] 
0xc4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d5] 
0xd5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe1 , 10)
avrdude: Send: . [1b] . [c5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c5] 
0xc5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [00] 
0x00 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 avrdude: Recv: R [52] 
0x52 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [00] 
0x00 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ad] 
0xad 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,121600,256)
block_size at addr 121600 is 256
STK500V2: stk500v2_loadaddr(-2147422848)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xed 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xc6 0x00 0x05 0x0e 0x06 0x80 0x00 0xed 0x80 0x3d , 11)
avrdude: Send: . [1b] . [c6] . [00] . [05] . [0e] . [06] . [80] . [00] . [ed] . [80] = [3d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c6] 
0xc6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d7] 
0xd7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe3 , 10)
avrdude: Send: . [1b] . [c7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c7] 
0xc7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [93] 
0x93 avrdude: Recv: X [58] 
0x58 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [05] 
0x05 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [cd] 
0xcd avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [ce] 
0xce avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [98] 
0x98 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [17] 
0x17 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [07] 
0x07 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [11] 
0x11 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [ce] 
0xce avrdude: Recv: g [67] 
0x67 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: x [78] 
0x78 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [cd] 
0xcd avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [16] 
0x16 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: w [77] 
0x77 avrdude: Recv: # [23] 
0x23 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [87] 
0x87 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: v [76] 
0x76 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: f [66] 
0x66 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [86] 
0x86 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b9] 
0xb9 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,121856,256)
block_size at addr 121856 is 256
STK500V2: stk500v2_loadaddr(-2147422720)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xee 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc8 0x00 0x05 0x0e 0x06 0x80 0x00 0xee 0x00 0xb0 , 11)
avrdude: Send: . [1b] . [c8] . [00] . [05] . [0e] . [06] . [80] . [00] . [ee] . [00] . [b0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c8] 
0xc8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d9] 
0xd9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xed , 10)
avrdude: Send: . [1b] . [c9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ed] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c9] 
0xc9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [95] 
0x95 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [da] 
0xda avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [01] 
0x01 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: . [91] 
0x91 avrdude: Recv: % [25] 
0x25 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [91] 
0x91 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [91] 
0x91 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [01] 
0x01 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [da] 
0xda avrdude: Recv: . [94] 
0x94 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [cd] 
0xcd avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [ed] 
0xed avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0f] 
0x0f avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [07] 
0x07 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [07] 
0x07 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [95] 
0x95 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0f] 
0x0f avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [ea] 
0xea avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [ed] 
0xed avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: I [49] 
0x49 avrdude: Recv: . [ec] 
0xec avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [de] 
0xde avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [90] 
0x90 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ce] 
0xce 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,122112,256)
block_size at addr 122112 is 256
STK500V2: stk500v2_loadaddr(-2147422592)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xee 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xca 0x00 0x05 0x0e 0x06 0x80 0x00 0xee 0x80 0x32 , 11)
avrdude: Send: . [1b] . [ca] . [00] . [05] . [0e] . [06] . [80] . [00] . [ee] . [80] 2 [32] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ca] 
0xca hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [db] 
0xdb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xef , 10)
avrdude: Send: . [1b] . [cb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ef] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cb] 
0xcb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: g [67] 
0x67 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: x [78] 
0x78 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [98] 
0x98 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [96] 
0x96 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [dd] 
0xdd avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: W [57] 
0x57 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [98] 
0x98 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: g [67] 
0x67 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: x [78] 
0x78 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [98] 
0x98 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [99] 
0x99 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [95] 
0x95 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [95] 
0x95 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [ee] 
0xee avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: W [57] 
0x57 avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: X [58] 
0x58 avrdude: Recv: V [56] 
0x56 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [07] 
0x07 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [07] 
0x07 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0b] 
0x0b avrdude: Recv:   [20] 
0x20 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [94] 
0x94 avrdude: Recv:   [20] 
0x20 avrdude: Recv: % [25] 
0x25 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: % [25] 
0x25 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: ' [27] 
0x27 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [df] 
0xdf 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,122368,256)
block_size at addr 122368 is 256
STK500V2: stk500v2_loadaddr(-2147422464)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xef 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xcc 0x00 0x05 0x0e 0x06 0x80 0x00 0xef 0x00 0xb5 , 11)
avrdude: Send: . [1b] . [cc] . [00] . [05] . [0e] . [06] . [80] . [00] . [ef] . [00] . [b5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cc] 
0xcc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [dd] 
0xdd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe9 , 10)
avrdude: Send: . [1b] . [cd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cd] 
0xcd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [07] 
0x07 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [0b] 
0x0b avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [84] 
0x84 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [91] 
0x91 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [93] 
0x93 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [de] 
0xde avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [91] 
0x91 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [91] 
0x91 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [91] 
0x91 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [91] 
0x91 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1b] 
0x1b avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: F [46] 
0x46 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [95] 
0x95 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,122624,256)
block_size at addr 122624 is 256
STK500V2: stk500v2_loadaddr(-2147422336)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xef 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xce 0x00 0x05 0x0e 0x06 0x80 0x00 0xef 0x80 0x37 , 11)
avrdude: Send: . [1b] . [ce] . [00] . [05] . [0e] . [06] . [80] . [00] . [ef] . [80] 7 [37] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ce] 
0xce hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [df] 
0xdf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xeb , 10)
avrdude: Send: . [1b] . [cf] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [eb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cf] 
0xcf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [85] 
0x85 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [19] 
0x19 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [93] 
0x93 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [91] 
0x91 avrdude: Recv: a [61] 
0x61 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [17] 
0x17 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [92] 
0x92 avrdude: Recv: A [41] 
0x41 avrdude: Recv: P [50] 
0x50 avrdude: Recv: P [50] 
0x50 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fc] 
0xfc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,122880,256)
block_size at addr 122880 is 256
STK500V2: stk500v2_loadaddr(-2147422208)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xf0 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd0 0x00 0x05 0x0e 0x06 0x80 0x00 0xf0 0x00 0xb6 , 11)
avrdude: Send: . [1b] . [d0] . [00] . [05] . [0e] . [06] . [80] . [00] . [f0] . [00] . [b6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d0] 
0xd0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c1] 
0xc1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf5 , 10)
avrdude: Send: . [1b] . [d1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d1] 
0xd1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [df] 
0xdf avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [cc] 
0xcc avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [cc] 
0xcc avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: z [7a] 
0x7a avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ff] 
0xff avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [ff] 
0xff avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [10] 
0x10 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [07] 
0x07 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [01] 
0x01 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: X [58] 
0x58 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: S [53] 
0x53 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,123136,256)
block_size at addr 123136 is 256
STK500V2: stk500v2_loadaddr(-2147422080)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xf0 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xd2 0x00 0x05 0x0e 0x06 0x80 0x00 0xf0 0x80 0x34 , 11)
avrdude: Send: . [1b] . [d2] . [00] . [05] . [0e] . [06] . [80] . [00] . [f0] . [80] 4 [34] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d2] 
0xd2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c3] 
0xc3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf7 , 10)
avrdude: Send: . [1b] . [d3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d3] 
0xd3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ec] 
0xec avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ) [29] 
0x29 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [92] 
0x92 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: e [65] 
0x65 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 avrdude: Recv: i [69] 
0x69 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 avrdude: Recv: R [52] 
0x52 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [00] 
0x00 avrdude: Recv: h [68] 
0x68 avrdude: Recv: t [74] 
0x74 avrdude: Recv: t [74] 
0x74 avrdude: Recv: p [70] 
0x70 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: / [2f] 
0x2f avrdude: Recv: / [2f] 
0x2f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: a [61] 
0x61 avrdude: Recv: r [72] 
0x72 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: f [66] 
0x66 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: o [6f] 
0x6f avrdude: Recv: r [72] 
0x72 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [00] 
0x00 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [00] 
0x00 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [00] 
0x00 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,123392,256)
block_size at addr 123392 is 256
STK500V2: stk500v2_loadaddr(-2147421952)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xf1 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd4 0x00 0x05 0x0e 0x06 0x80 0x00 0xf1 0x00 0xb3 , 11)
avrdude: Send: . [1b] . [d4] . [00] . [05] . [0e] . [06] . [80] . [00] . [f1] . [00] . [b3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d4] 
0xd4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c5] 
0xc5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf1 , 10)
avrdude: Send: . [1b] . [d5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d5] 
0xd5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d6] 
0xd6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,123648,256)
block_size at addr 123648 is 256
STK500V2: stk500v2_loadaddr(-2147421824)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xf1 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xd6 0x00 0x05 0x0e 0x06 0x80 0x00 0xf1 0x80 0x31 , 11)
avrdude: Send: . [1b] . [d6] . [00] . [05] . [0e] . [06] . [80] . [00] . [f1] . [80] 1 [31] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d6] 
0xd6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c7] 
0xc7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf3 , 10)
avrdude: Send: . [1b] . [d7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d7] 
0xd7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d4] 
0xd4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,123904,256)
block_size at addr 123904 is 256
STK500V2: stk500v2_loadaddr(-2147421696)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xf2 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd8 0x00 0x05 0x0e 0x06 0x80 0x00 0xf2 0x00 0xbc , 11)
avrdude: Send: . [1b] . [d8] . [00] . [05] . [0e] . [06] . [80] . [00] . [f2] . [00] . [bc] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d8] 
0xd8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c9] 
0xc9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xfd , 10)
avrdude: Send: . [1b] . [d9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [fd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d9] 
0xd9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [da] 
0xda 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,124160,256)
block_size at addr 124160 is 256
STK500V2: stk500v2_loadaddr(-2147421568)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xf2 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xda 0x00 0x05 0x0e 0x06 0x80 0x00 0xf2 0x80 0x3e , 11)
avrdude: Send: . [1b] . [da] . [00] . [05] . [0e] . [06] . [80] . [00] . [f2] . [80] > [3e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [da] 
0xda hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cb] 
0xcb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xff , 10)
avrdude: Send: . [1b] . [db] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ff] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [db] 
0xdb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d8] 
0xd8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,124416,256)
block_size at addr 124416 is 256
STK500V2: stk500v2_loadaddr(-2147421440)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xf3 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xdc 0x00 0x05 0x0e 0x06 0x80 0x00 0xf3 0x00 0xb9 , 11)
avrdude: Send: . [1b] . [dc] . [00] . [05] . [0e] . [06] . [80] . [00] . [f3] . [00] . [b9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [dc] 
0xdc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cd] 
0xcd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf9 , 10)
avrdude: Send: . [1b] . [dd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [dd] 
0xdd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [de] 
0xde 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,124672,256)
block_size at addr 124672 is 256
STK500V2: stk500v2_loadaddr(-2147421312)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xf3 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xde 0x00 0x05 0x0e 0x06 0x80 0x00 0xf3 0x80 0x3b , 11)
avrdude: Send: . [1b] . [de] . [00] . [05] . [0e] . [06] . [80] . [00] . [f3] . [80] ; [3b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [de] 
0xde hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cf] 
0xcf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xfb , 10)
avrdude: Send: . [1b] . [df] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [fb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [df] 
0xdf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [dc] 
0xdc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,124928,256)
block_size at addr 124928 is 256
STK500V2: stk500v2_loadaddr(-2147421184)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xf4 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe0 0x00 0x05 0x0e 0x06 0x80 0x00 0xf4 0x00 0x82 , 11)
avrdude: Send: . [1b] . [e0] . [00] . [05] . [0e] . [06] . [80] . [00] . [f4] . [00] . [82] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e0] 
0xe0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f1] 
0xf1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc5 , 10)
avrdude: Send: . [1b] . [e1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e1] 
0xe1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e2] 
0xe2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,125184,256)
block_size at addr 125184 is 256
STK500V2: stk500v2_loadaddr(-2147421056)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xf4 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xe2 0x00 0x05 0x0e 0x06 0x80 0x00 0xf4 0x80 0x00 , 11)
avrdude: Send: . [1b] . [e2] . [00] . [05] . [0e] . [06] . [80] . [00] . [f4] . [80] . [00] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e2] 
0xe2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f3] 
0xf3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc7 , 10)
avrdude: Send: . [1b] . [e3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e3] 
0xe3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,125440,256)
block_size at addr 125440 is 256
STK500V2: stk500v2_loadaddr(-2147420928)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xf5 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe4 0x00 0x05 0x0e 0x06 0x80 0x00 0xf5 0x00 0x87 , 11)
avrdude: Send: . [1b] . [e4] . [00] . [05] . [0e] . [06] . [80] . [00] . [f5] . [00] . [87] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e4] 
0xe4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f5] 
0xf5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc1 , 10)
avrdude: Send: . [1b] . [e5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e5] 
0xe5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e6] 
0xe6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,125696,256)
block_size at addr 125696 is 256
STK500V2: stk500v2_loadaddr(-2147420800)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xf5 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xe6 0x00 0x05 0x0e 0x06 0x80 0x00 0xf5 0x80 0x05 , 11)
avrdude: Send: . [1b] . [e6] . [00] . [05] . [0e] . [06] . [80] . [00] . [f5] . [80] . [05] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e6] 
0xe6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f7] 
0xf7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc3 , 10)
avrdude: Send: . [1b] . [e7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e7] 
0xe7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e4] 
0xe4 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,125952,256)
block_size at addr 125952 is 256
STK500V2: stk500v2_loadaddr(-2147420672)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xf6 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe8 0x00 0x05 0x0e 0x06 0x80 0x00 0xf6 0x00 0x88 , 11)
avrdude: Send: . [1b] . [e8] . [00] . [05] . [0e] . [06] . [80] . [00] . [f6] . [00] . [88] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e8] 
0xe8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f9] 
0xf9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcd , 10)
avrdude: Send: . [1b] . [e9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e9] 
0xe9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ea] 
0xea 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,126208,256)
block_size at addr 126208 is 256
STK500V2: stk500v2_loadaddr(-2147420544)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xf6 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xea 0x00 0x05 0x0e 0x06 0x80 0x00 0xf6 0x80 0x0a , 11)
avrdude: Send: . [1b] . [ea] . [00] . [05] . [0e] . [06] . [80] . [00] . [f6] . [80] . [0a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ea] 
0xea hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fb] 
0xfb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xeb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcf , 10)
avrdude: Send: . [1b] . [eb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [eb] 
0xeb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e8] 
0xe8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,126464,256)
block_size at addr 126464 is 256
STK500V2: stk500v2_loadaddr(-2147420416)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xf7 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xec 0x00 0x05 0x0e 0x06 0x80 0x00 0xf7 0x00 0x8d , 11)
avrdude: Send: . [1b] . [ec] . [00] . [05] . [0e] . [06] . [80] . [00] . [f7] . [00] . [8d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ec] 
0xec hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fd] 
0xfd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xed 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc9 , 10)
avrdude: Send: . [1b] . [ed] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ed] 
0xed hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ee] 
0xee 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,126720,256)
block_size at addr 126720 is 256
STK500V2: stk500v2_loadaddr(-2147420288)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xf7 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xee 0x00 0x05 0x0e 0x06 0x80 0x00 0xf7 0x80 0x0f , 11)
avrdude: Send: . [1b] . [ee] . [00] . [05] . [0e] . [06] . [80] . [00] . [f7] . [80] . [0f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ee] 
0xee hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xef 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcb , 10)
avrdude: Send: . [1b] . [ef] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ef] 
0xef hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ec] 
0xec 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,126976,256)
block_size at addr 126976 is 256
STK500V2: stk500v2_loadaddr(-2147420160)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xf8 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf0 0x00 0x05 0x0e 0x06 0x80 0x00 0xf8 0x00 0x9e , 11)
avrdude: Send: . [1b] . [f0] . [00] . [05] . [0e] . [06] . [80] . [00] . [f8] . [00] . [9e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f0] 
0xf0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e1] 
0xe1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd5 , 10)
avrdude: Send: . [1b] . [f1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f1] 
0xf1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f2] 
0xf2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,127232,256)
block_size at addr 127232 is 256
STK500V2: stk500v2_loadaddr(-2147420032)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xf8 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xf2 0x00 0x05 0x0e 0x06 0x80 0x00 0xf8 0x80 0x1c , 11)
avrdude: Send: . [1b] . [f2] . [00] . [05] . [0e] . [06] . [80] . [00] . [f8] . [80] . [1c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f2] 
0xf2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e3] 
0xe3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd7 , 10)
avrdude: Send: . [1b] . [f3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f3] 
0xf3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f0] 
0xf0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,127488,256)
block_size at addr 127488 is 256
STK500V2: stk500v2_loadaddr(-2147419904)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xf9 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf4 0x00 0x05 0x0e 0x06 0x80 0x00 0xf9 0x00 0x9b , 11)
avrdude: Send: . [1b] . [f4] . [00] . [05] . [0e] . [06] . [80] . [00] . [f9] . [00] . [9b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f4] 
0xf4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e5] 
0xe5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd1 , 10)
avrdude: Send: . [1b] . [f5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f5] 
0xf5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f6] 
0xf6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,127744,256)
block_size at addr 127744 is 256
STK500V2: stk500v2_loadaddr(-2147419776)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xf9 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xf6 0x00 0x05 0x0e 0x06 0x80 0x00 0xf9 0x80 0x19 , 11)
avrdude: Send: . [1b] . [f6] . [00] . [05] . [0e] . [06] . [80] . [00] . [f9] . [80] . [19] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f6] 
0xf6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e7] 
0xe7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd3 , 10)
avrdude: Send: . [1b] . [f7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f7] 
0xf7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f4] 
0xf4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,128000,256)
block_size at addr 128000 is 256
STK500V2: stk500v2_loadaddr(-2147419648)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xfa 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf8 0x00 0x05 0x0e 0x06 0x80 0x00 0xfa 0x00 0x94 , 11)
avrdude: Send: . [1b] . [f8] . [00] . [05] . [0e] . [06] . [80] . [00] . [fa] . [00] . [94] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f8] 
0xf8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e9] 
0xe9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdd , 10)
avrdude: Send: . [1b] . [f9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [dd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f9] 
0xf9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fa] 
0xfa 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,128256,256)
block_size at addr 128256 is 256
STK500V2: stk500v2_loadaddr(-2147419520)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xfa 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xfa 0x00 0x05 0x0e 0x06 0x80 0x00 0xfa 0x80 0x16 , 11)
avrdude: Send: . [1b] . [fa] . [00] . [05] . [0e] . [06] . [80] . [00] . [fa] . [80] . [16] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fa] 
0xfa hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [eb] 
0xeb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xfb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdf , 10)
avrdude: Send: . [1b] . [fb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [df] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fb] 
0xfb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,128512,256)
block_size at addr 128512 is 256
STK500V2: stk500v2_loadaddr(-2147419392)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xfb 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xfc 0x00 0x05 0x0e 0x06 0x80 0x00 0xfb 0x00 0x91 , 11)
avrdude: Send: . [1b] . [fc] . [00] . [05] . [0e] . [06] . [80] . [00] . [fb] . [00] . [91] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fc] 
0xfc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ed] 
0xed 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xfd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd9 , 10)
avrdude: Send: . [1b] . [fd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fd] 
0xfd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fe] 
0xfe 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,128768,256)
block_size at addr 128768 is 256
STK500V2: stk500v2_loadaddr(-2147419264)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xfb 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xfe 0x00 0x05 0x0e 0x06 0x80 0x00 0xfb 0x80 0x13 , 11)
avrdude: Send: . [1b] . [fe] . [00] . [05] . [0e] . [06] . [80] . [00] . [fb] . [80] . [13] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fe] 
0xfe hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ef] 
0xef 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xff 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdb , 10)
avrdude: Send: . [1b] . [ff] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [db] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ff] 
0xff hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fc] 
0xfc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,129024,256)
block_size at addr 129024 is 256
STK500V2: stk500v2_loadaddr(-2147419136)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xfc 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x00 0x00 0x05 0x0e 0x06 0x80 0x00 0xfc 0x00 0x6a , 11)
avrdude: Send: . [1b] . [00] . [00] . [05] . [0e] . [06] . [80] . [00] . [fc] . [00] j [6a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [00] 
0x00 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x01 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x25 , 10)
avrdude: Send: . [1b] . [01] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] % [25] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [01] 
0x01 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [02] 
0x02 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,129280,256)
block_size at addr 129280 is 256
STK500V2: stk500v2_loadaddr(-2147419008)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xfc 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x02 0x00 0x05 0x0e 0x06 0x80 0x00 0xfc 0x80 0xe8 , 11)
avrdude: Send: . [1b] . [02] . [00] . [05] . [0e] . [06] . [80] . [00] . [fc] . [80] . [e8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [02] 
0x02 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [13] 
0x13 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x03 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x27 , 10)
avrdude: Send: . [1b] . [03] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ' [27] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [03] 
0x03 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,129536,256)
block_size at addr 129536 is 256
STK500V2: stk500v2_loadaddr(-2147418880)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xfd 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x04 0x00 0x05 0x0e 0x06 0x80 0x00 0xfd 0x00 0x6f , 11)
avrdude: Send: . [1b] . [04] . [00] . [05] . [0e] . [06] . [80] . [00] . [fd] . [00] o [6f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [04] 
0x04 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [15] 
0x15 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x05 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x21 , 10)
avrdude: Send: . [1b] . [05] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ! [21] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [05] 
0x05 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,129792,256)
block_size at addr 129792 is 256
STK500V2: stk500v2_loadaddr(-2147418752)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xfd 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x06 0x00 0x05 0x0e 0x06 0x80 0x00 0xfd 0x80 0xed , 11)
avrdude: Send: . [1b] . [06] . [00] . [05] . [0e] . [06] . [80] . [00] . [fd] . [80] . [ed] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [06] 
0x06 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [17] 
0x17 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x07 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x23 , 10)
avrdude: Send: . [1b] . [07] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] # [23] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [07] 
0x07 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [04] 
0x04 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,130048,256)
block_size at addr 130048 is 256
STK500V2: stk500v2_loadaddr(-2147418624)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xfe 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x08 0x00 0x05 0x0e 0x06 0x80 0x00 0xfe 0x00 0x60 , 11)
avrdude: Send: . [1b] . [08] . [00] . [05] . [0e] . [06] . [80] . [00] . [fe] . [00] ` [60] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [08] 
0x08 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [19] 
0x19 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x09 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2d , 10)
avrdude: Send: . [1b] . [09] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] - [2d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [09] 
0x09 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0a] 
0x0a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,130304,256)
block_size at addr 130304 is 256
STK500V2: stk500v2_loadaddr(-2147418496)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xfe 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x0a 0x00 0x05 0x0e 0x06 0x80 0x00 0xfe 0x80 0xe2 , 11)
avrdude: Send: . [1b] . [0a] . [00] . [05] . [0e] . [06] . [80] . [00] . [fe] . [80] . [e2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0a] 
0x0a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1b] 
0x1b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2f , 10)
avrdude: Send: . [1b] . [0b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] / [2f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0b] 
0x0b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,130560,256)
block_size at addr 130560 is 256
STK500V2: stk500v2_loadaddr(-2147418368)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xff 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x0c 0x00 0x05 0x0e 0x06 0x80 0x00 0xff 0x00 0x65 , 11)
avrdude: Send: . [1b] . [0c] . [00] . [05] . [0e] . [06] . [80] . [00] . [ff] . [00] e [65] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0c] 
0x0c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1d] 
0x1d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x29 , 10)
avrdude: Send: . [1b] . [0d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ) [29] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0d] 
0x0d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,130816,256)
block_size at addr 130816 is 256
STK500V2: stk500v2_loadaddr(-2147418240)
STK500V2: stk500v2_command(0x06 0x80 0x00 0xff 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x0e 0x00 0x05 0x0e 0x06 0x80 0x00 0xff 0x80 0xe7 , 11)
avrdude: Send: . [1b] . [0e] . [00] . [05] . [0e] . [06] . [80] . [00] . [ff] . [80] . [e7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0e] 
0x0e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1f] 
0x1f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2b , 10)
avrdude: Send: . [1b] . [0f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] + [2b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0f] 
0x0f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,131072,256)
block_size at addr 131072 is 256
STK500V2: stk500v2_loadaddr(-2147418112)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x00 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x10 0x00 0x05 0x0e 0x06 0x80 0x01 0x00 0x00 0x87 , 11)
avrdude: Send: . [1b] . [10] . [00] . [05] . [0e] . [06] . [80] . [01] . [00] . [00] . [87] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [10] 
0x10 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x11 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x35 , 10)
avrdude: Send: . [1b] . [11] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 5 [35] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [11] 
0x11 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [12] 
0x12 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,131328,256)
block_size at addr 131328 is 256
STK500V2: stk500v2_loadaddr(-2147417984)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x00 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x12 0x00 0x05 0x0e 0x06 0x80 0x01 0x00 0x80 0x05 , 11)
avrdude: Send: . [1b] . [12] . [00] . [05] . [0e] . [06] . [80] . [01] . [00] . [80] . [05] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [12] 
0x12 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x13 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x37 , 10)
avrdude: Send: . [1b] . [13] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 7 [37] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [13] 
0x13 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,131584,256)
block_size at addr 131584 is 256
STK500V2: stk500v2_loadaddr(-2147417856)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x01 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x14 0x00 0x05 0x0e 0x06 0x80 0x01 0x01 0x00 0x82 , 11)
avrdude: Send: . [1b] . [14] . [00] . [05] . [0e] . [06] . [80] . [01] . [01] . [00] . [82] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [14] 
0x14 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [05] 
0x05 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x15 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x31 , 10)
avrdude: Send: . [1b] . [15] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 1 [31] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [15] 
0x15 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [16] 
0x16 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,131840,256)
block_size at addr 131840 is 256
STK500V2: stk500v2_loadaddr(-2147417728)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x01 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x16 0x00 0x05 0x0e 0x06 0x80 0x01 0x01 0x80 0x00 , 11)
avrdude: Send: . [1b] . [16] . [00] . [05] . [0e] . [06] . [80] . [01] . [01] . [80] . [00] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [16] 
0x16 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [07] 
0x07 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x17 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x33 , 10)
avrdude: Send: . [1b] . [17] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 3 [33] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [17] 
0x17 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [14] 
0x14 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,132096,256)
block_size at addr 132096 is 256
STK500V2: stk500v2_loadaddr(-2147417600)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x02 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x18 0x00 0x05 0x0e 0x06 0x80 0x01 0x02 0x00 0x8d , 11)
avrdude: Send: . [1b] . [18] . [00] . [05] . [0e] . [06] . [80] . [01] . [02] . [00] . [8d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [18] 
0x18 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [09] 
0x09 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x19 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3d , 10)
avrdude: Send: . [1b] . [19] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] = [3d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [19] 
0x19 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1a] 
0x1a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,132352,256)
block_size at addr 132352 is 256
STK500V2: stk500v2_loadaddr(-2147417472)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x02 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x1a 0x00 0x05 0x0e 0x06 0x80 0x01 0x02 0x80 0x0f , 11)
avrdude: Send: . [1b] . [1a] . [00] . [05] . [0e] . [06] . [80] . [01] . [02] . [80] . [0f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1a] 
0x1a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0b] 
0x0b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3f , 10)
avrdude: Send: . [1b] . [1b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ? [3f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1b] 
0x1b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [18] 
0x18 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,132608,256)
block_size at addr 132608 is 256
STK500V2: stk500v2_loadaddr(-2147417344)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x03 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x1c 0x00 0x05 0x0e 0x06 0x80 0x01 0x03 0x00 0x88 , 11)
avrdude: Send: . [1b] . [1c] . [00] . [05] . [0e] . [06] . [80] . [01] . [03] . [00] . [88] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1c] 
0x1c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0d] 
0x0d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x39 , 10)
avrdude: Send: . [1b] . [1d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 9 [39] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1d] 
0x1d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,132864,256)
block_size at addr 132864 is 256
STK500V2: stk500v2_loadaddr(-2147417216)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x03 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x1e 0x00 0x05 0x0e 0x06 0x80 0x01 0x03 0x80 0x0a , 11)
avrdude: Send: . [1b] . [1e] . [00] . [05] . [0e] . [06] . [80] . [01] . [03] . [80] . [0a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1e] 
0x1e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3b , 10)
avrdude: Send: . [1b] . [1f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ; [3b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1f] 
0x1f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1c] 
0x1c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,133120,256)
block_size at addr 133120 is 256
STK500V2: stk500v2_loadaddr(-2147417088)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x04 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x20 0x00 0x05 0x0e 0x06 0x80 0x01 0x04 0x00 0xb3 , 11)
avrdude: Send: . [1b]   [20] . [00] . [05] . [0e] . [06] . [80] . [01] . [04] . [00] . [b3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv:   [20] 
0x20 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 1 [31] 
0x31 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x21 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x05 , 10)
avrdude: Send: . [1b] ! [21] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [05] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ! [21] 
0x21 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: " [22] 
0x22 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,133376,256)
block_size at addr 133376 is 256
STK500V2: stk500v2_loadaddr(-2147416960)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x04 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x22 0x00 0x05 0x0e 0x06 0x80 0x01 0x04 0x80 0x31 , 11)
avrdude: Send: . [1b] " [22] . [00] . [05] . [0e] . [06] . [80] . [01] . [04] . [80] 1 [31] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: " [22] 
0x22 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 3 [33] 
0x33 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x23 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x07 , 10)
avrdude: Send: . [1b] # [23] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [07] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: # [23] 
0x23 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,133632,256)
block_size at addr 133632 is 256
STK500V2: stk500v2_loadaddr(-2147416832)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x05 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x24 0x00 0x05 0x0e 0x06 0x80 0x01 0x05 0x00 0xb6 , 11)
avrdude: Send: . [1b] $ [24] . [00] . [05] . [0e] . [06] . [80] . [01] . [05] . [00] . [b6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: $ [24] 
0x24 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 5 [35] 
0x35 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x25 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x01 , 10)
avrdude: Send: . [1b] % [25] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [01] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: % [25] 
0x25 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: & [26] 
0x26 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,133888,256)
block_size at addr 133888 is 256
STK500V2: stk500v2_loadaddr(-2147416704)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x05 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x26 0x00 0x05 0x0e 0x06 0x80 0x01 0x05 0x80 0x34 , 11)
avrdude: Send: . [1b] & [26] . [00] . [05] . [0e] . [06] . [80] . [01] . [05] . [80] 4 [34] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: & [26] 
0x26 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 7 [37] 
0x37 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x27 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x03 , 10)
avrdude: Send: . [1b] ' [27] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [03] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ' [27] 
0x27 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: $ [24] 
0x24 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,134144,256)
block_size at addr 134144 is 256
STK500V2: stk500v2_loadaddr(-2147416576)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x06 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x28 0x00 0x05 0x0e 0x06 0x80 0x01 0x06 0x00 0xb9 , 11)
avrdude: Send: . [1b] ( [28] . [00] . [05] . [0e] . [06] . [80] . [01] . [06] . [00] . [b9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ( [28] 
0x28 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 9 [39] 
0x39 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x29 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0d , 10)
avrdude: Send: . [1b] ) [29] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ) [29] 
0x29 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: * [2a] 
0x2a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,134400,256)
block_size at addr 134400 is 256
STK500V2: stk500v2_loadaddr(-2147416448)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x06 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x2a 0x00 0x05 0x0e 0x06 0x80 0x01 0x06 0x80 0x3b , 11)
avrdude: Send: . [1b] * [2a] . [00] . [05] . [0e] . [06] . [80] . [01] . [06] . [80] ; [3b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: * [2a] 
0x2a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ; [3b] 
0x3b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0f , 10)
avrdude: Send: . [1b] + [2b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: + [2b] 
0x2b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: ( [28] 
0x28 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,134656,256)
block_size at addr 134656 is 256
STK500V2: stk500v2_loadaddr(-2147416320)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x07 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x2c 0x00 0x05 0x0e 0x06 0x80 0x01 0x07 0x00 0xbc , 11)
avrdude: Send: . [1b] , [2c] . [00] . [05] . [0e] . [06] . [80] . [01] . [07] . [00] . [bc] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: , [2c] 
0x2c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: = [3d] 
0x3d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x09 , 10)
avrdude: Send: . [1b] - [2d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [09] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: - [2d] 
0x2d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [2e] 
0x2e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,134912,256)
block_size at addr 134912 is 256
STK500V2: stk500v2_loadaddr(-2147416192)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x07 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x2e 0x00 0x05 0x0e 0x06 0x80 0x01 0x07 0x80 0x3e , 11)
avrdude: Send: . [1b] . [2e] . [00] . [05] . [0e] . [06] . [80] . [01] . [07] . [80] > [3e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [2e] 
0x2e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ? [3f] 
0x3f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0b , 10)
avrdude: Send: . [1b] / [2f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: / [2f] 
0x2f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: , [2c] 
0x2c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,135168,256)
block_size at addr 135168 is 256
STK500V2: stk500v2_loadaddr(-2147416064)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x08 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x30 0x00 0x05 0x0e 0x06 0x80 0x01 0x08 0x00 0xaf , 11)
avrdude: Send: . [1b] 0 [30] . [00] . [05] . [0e] . [06] . [80] . [01] . [08] . [00] . [af] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 0 [30] 
0x30 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ! [21] 
0x21 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x31 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x15 , 10)
avrdude: Send: . [1b] 1 [31] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [15] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 1 [31] 
0x31 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: 2 [32] 
0x32 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,135424,256)
block_size at addr 135424 is 256
STK500V2: stk500v2_loadaddr(-2147415936)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x08 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x32 0x00 0x05 0x0e 0x06 0x80 0x01 0x08 0x80 0x2d , 11)
avrdude: Send: . [1b] 2 [32] . [00] . [05] . [0e] . [06] . [80] . [01] . [08] . [80] - [2d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 2 [32] 
0x32 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: # [23] 
0x23 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x33 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x17 , 10)
avrdude: Send: . [1b] 3 [33] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [17] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 3 [33] 
0x33 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: 0 [30] 
0x30 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,135680,256)
block_size at addr 135680 is 256
STK500V2: stk500v2_loadaddr(-2147415808)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x09 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x34 0x00 0x05 0x0e 0x06 0x80 0x01 0x09 0x00 0xaa , 11)
avrdude: Send: . [1b] 4 [34] . [00] . [05] . [0e] . [06] . [80] . [01] . [09] . [00] . [aa] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 4 [34] 
0x34 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: % [25] 
0x25 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x35 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x11 , 10)
avrdude: Send: . [1b] 5 [35] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [11] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 5 [35] 
0x35 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: 6 [36] 
0x36 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,135936,256)
block_size at addr 135936 is 256
STK500V2: stk500v2_loadaddr(-2147415680)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x09 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x36 0x00 0x05 0x0e 0x06 0x80 0x01 0x09 0x80 0x28 , 11)
avrdude: Send: . [1b] 6 [36] . [00] . [05] . [0e] . [06] . [80] . [01] . [09] . [80] ( [28] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 6 [36] 
0x36 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ' [27] 
0x27 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x37 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x13 , 10)
avrdude: Send: . [1b] 7 [37] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [13] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 7 [37] 
0x37 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: 4 [34] 
0x34 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,136192,256)
block_size at addr 136192 is 256
STK500V2: stk500v2_loadaddr(-2147415552)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x0a 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x38 0x00 0x05 0x0e 0x06 0x80 0x01 0x0a 0x00 0xa5 , 11)
avrdude: Send: . [1b] 8 [38] . [00] . [05] . [0e] . [06] . [80] . [01] . [0a] . [00] . [a5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 8 [38] 
0x38 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ) [29] 
0x29 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x39 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1d , 10)
avrdude: Send: . [1b] 9 [39] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 9 [39] 
0x39 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: : [3a] 
0x3a 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,136448,256)
block_size at addr 136448 is 256
STK500V2: stk500v2_loadaddr(-2147415424)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x0a 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x3a 0x00 0x05 0x0e 0x06 0x80 0x01 0x0a 0x80 0x27 , 11)
avrdude: Send: . [1b] : [3a] . [00] . [05] . [0e] . [06] . [80] . [01] . [0a] . [80] ' [27] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: : [3a] 
0x3a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: + [2b] 
0x2b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1f , 10)
avrdude: Send: . [1b] ; [3b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ; [3b] 
0x3b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: 8 [38] 
0x38 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,136704,256)
block_size at addr 136704 is 256
STK500V2: stk500v2_loadaddr(-2147415296)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x0b 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x3c 0x00 0x05 0x0e 0x06 0x80 0x01 0x0b 0x00 0xa0 , 11)
avrdude: Send: . [1b] < [3c] . [00] . [05] . [0e] . [06] . [80] . [01] . [0b] . [00] . [a0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: < [3c] 
0x3c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: - [2d] 
0x2d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x19 , 10)
avrdude: Send: . [1b] = [3d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [19] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: = [3d] 
0x3d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: > [3e] 
0x3e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,136960,256)
block_size at addr 136960 is 256
STK500V2: stk500v2_loadaddr(-2147415168)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x0b 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x3e 0x00 0x05 0x0e 0x06 0x80 0x01 0x0b 0x80 0x22 , 11)
avrdude: Send: . [1b] > [3e] . [00] . [05] . [0e] . [06] . [80] . [01] . [0b] . [80] " [22] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: > [3e] 
0x3e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: / [2f] 
0x2f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1b , 10)
avrdude: Send: . [1b] ? [3f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ? [3f] 
0x3f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: < [3c] 
0x3c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,137216,256)
block_size at addr 137216 is 256
STK500V2: stk500v2_loadaddr(-2147415040)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x0c 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x40 0x00 0x05 0x0e 0x06 0x80 0x01 0x0c 0x00 0xdb , 11)
avrdude: Send: . [1b] @ [40] . [00] . [05] . [0e] . [06] . [80] . [01] . [0c] . [00] . [db] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: @ [40] 
0x40 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Q [51] 
0x51 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x41 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x65 , 10)
avrdude: Send: . [1b] A [41] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] e [65] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: A [41] 
0x41 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: B [42] 
0x42 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,137472,256)
block_size at addr 137472 is 256
STK500V2: stk500v2_loadaddr(-2147414912)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x0c 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x42 0x00 0x05 0x0e 0x06 0x80 0x01 0x0c 0x80 0x59 , 11)
avrdude: Send: . [1b] B [42] . [00] . [05] . [0e] . [06] . [80] . [01] . [0c] . [80] Y [59] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: B [42] 
0x42 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: S [53] 
0x53 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x43 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x67 , 10)
avrdude: Send: . [1b] C [43] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] g [67] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: C [43] 
0x43 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,137728,256)
block_size at addr 137728 is 256
STK500V2: stk500v2_loadaddr(-2147414784)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x0d 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x44 0x00 0x05 0x0e 0x06 0x80 0x01 0x0d 0x00 0xde , 11)
avrdude: Send: . [1b] D [44] . [00] . [05] . [0e] . [06] . [80] . [01] . [0d] . [00] . [de] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: D [44] 
0x44 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: U [55] 
0x55 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x45 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x61 , 10)
avrdude: Send: . [1b] E [45] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] a [61] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: E [45] 
0x45 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: F [46] 
0x46 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,137984,256)
block_size at addr 137984 is 256
STK500V2: stk500v2_loadaddr(-2147414656)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x0d 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x46 0x00 0x05 0x0e 0x06 0x80 0x01 0x0d 0x80 0x5c , 11)
avrdude: Send: . [1b] F [46] . [00] . [05] . [0e] . [06] . [80] . [01] . [0d] . [80] \ [5c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: F [46] 
0x46 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: W [57] 
0x57 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x47 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x63 , 10)
avrdude: Send: . [1b] G [47] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] c [63] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: G [47] 
0x47 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: D [44] 
0x44 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,138240,256)
block_size at addr 138240 is 256
STK500V2: stk500v2_loadaddr(-2147414528)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x0e 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x48 0x00 0x05 0x0e 0x06 0x80 0x01 0x0e 0x00 0xd1 , 11)
avrdude: Send: . [1b] H [48] . [00] . [05] . [0e] . [06] . [80] . [01] . [0e] . [00] . [d1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: H [48] 
0x48 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Y [59] 
0x59 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x49 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6d , 10)
avrdude: Send: . [1b] I [49] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] m [6d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: I [49] 
0x49 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: J [4a] 
0x4a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,138496,256)
block_size at addr 138496 is 256
STK500V2: stk500v2_loadaddr(-2147414400)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x0e 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x4a 0x00 0x05 0x0e 0x06 0x80 0x01 0x0e 0x80 0x53 , 11)
avrdude: Send: . [1b] J [4a] . [00] . [05] . [0e] . [06] . [80] . [01] . [0e] . [80] S [53] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: J [4a] 
0x4a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: [ [5b] 
0x5b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6f , 10)
avrdude: Send: . [1b] K [4b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] o [6f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: K [4b] 
0x4b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,138752,256)
block_size at addr 138752 is 256
STK500V2: stk500v2_loadaddr(-2147414272)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x0f 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x4c 0x00 0x05 0x0e 0x06 0x80 0x01 0x0f 0x00 0xd4 , 11)
avrdude: Send: . [1b] L [4c] . [00] . [05] . [0e] . [06] . [80] . [01] . [0f] . [00] . [d4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: L [4c] 
0x4c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ] [5d] 
0x5d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x69 , 10)
avrdude: Send: . [1b] M [4d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] i [69] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: M [4d] 
0x4d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: N [4e] 
0x4e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,139008,256)
block_size at addr 139008 is 256
STK500V2: stk500v2_loadaddr(-2147414144)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x0f 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x4e 0x00 0x05 0x0e 0x06 0x80 0x01 0x0f 0x80 0x56 , 11)
avrdude: Send: . [1b] N [4e] . [00] . [05] . [0e] . [06] . [80] . [01] . [0f] . [80] V [56] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: N [4e] 
0x4e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: _ [5f] 
0x5f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6b , 10)
avrdude: Send: . [1b] O [4f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] k [6b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: O [4f] 
0x4f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: L [4c] 
0x4c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,139264,256)
block_size at addr 139264 is 256
STK500V2: stk500v2_loadaddr(-2147414016)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x10 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x50 0x00 0x05 0x0e 0x06 0x80 0x01 0x10 0x00 0xd7 , 11)
avrdude: Send: . [1b] P [50] . [00] . [05] . [0e] . [06] . [80] . [01] . [10] . [00] . [d7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: P [50] 
0x50 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x51 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x75 , 10)
avrdude: Send: . [1b] Q [51] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] u [75] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Q [51] 
0x51 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,139520,256)
block_size at addr 139520 is 256
STK500V2: stk500v2_loadaddr(-2147413888)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x10 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x52 0x00 0x05 0x0e 0x06 0x80 0x01 0x10 0x80 0x55 , 11)
avrdude: Send: . [1b] R [52] . [00] . [05] . [0e] . [06] . [80] . [01] . [10] . [80] U [55] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: R [52] 
0x52 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: C [43] 
0x43 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x53 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x77 , 10)
avrdude: Send: . [1b] S [53] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] w [77] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: S [53] 
0x53 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,139776,256)
block_size at addr 139776 is 256
STK500V2: stk500v2_loadaddr(-2147413760)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x11 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x54 0x00 0x05 0x0e 0x06 0x80 0x01 0x11 0x00 0xd2 , 11)
avrdude: Send: . [1b] T [54] . [00] . [05] . [0e] . [06] . [80] . [01] . [11] . [00] . [d2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: T [54] 
0x54 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x55 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x71 , 10)
avrdude: Send: . [1b] U [55] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] q [71] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: U [55] 
0x55 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,140032,256)
block_size at addr 140032 is 256
STK500V2: stk500v2_loadaddr(-2147413632)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x11 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x56 0x00 0x05 0x0e 0x06 0x80 0x01 0x11 0x80 0x50 , 11)
avrdude: Send: . [1b] V [56] . [00] . [05] . [0e] . [06] . [80] . [01] . [11] . [80] P [50] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: V [56] 
0x56 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: G [47] 
0x47 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x57 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x73 , 10)
avrdude: Send: . [1b] W [57] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] s [73] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: W [57] 
0x57 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: T [54] 
0x54 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,140288,256)
block_size at addr 140288 is 256
STK500V2: stk500v2_loadaddr(-2147413504)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x12 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x58 0x00 0x05 0x0e 0x06 0x80 0x01 0x12 0x00 0xdd , 11)
avrdude: Send: . [1b] X [58] . [00] . [05] . [0e] . [06] . [80] . [01] . [12] . [00] . [dd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: X [58] 
0x58 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: I [49] 
0x49 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x59 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7d , 10)
avrdude: Send: . [1b] Y [59] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] } [7d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Y [59] 
0x59 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,140544,256)
block_size at addr 140544 is 256
STK500V2: stk500v2_loadaddr(-2147413376)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x12 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x5a 0x00 0x05 0x0e 0x06 0x80 0x01 0x12 0x80 0x5f , 11)
avrdude: Send: . [1b] Z [5a] . [00] . [05] . [0e] . [06] . [80] . [01] . [12] . [80] _ [5f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Z [5a] 
0x5a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: K [4b] 
0x4b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7f , 10)
avrdude: Send: . [1b] [ [5b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [7f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: [ [5b] 
0x5b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: X [58] 
0x58 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,140800,256)
block_size at addr 140800 is 256
STK500V2: stk500v2_loadaddr(-2147413248)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x13 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x5c 0x00 0x05 0x0e 0x06 0x80 0x01 0x13 0x00 0xd8 , 11)
avrdude: Send: . [1b] \ [5c] . [00] . [05] . [0e] . [06] . [80] . [01] . [13] . [00] . [d8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: \ [5c] 
0x5c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x79 , 10)
avrdude: Send: . [1b] ] [5d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] y [79] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ] [5d] 
0x5d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: ^ [5e] 
0x5e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,141056,256)
block_size at addr 141056 is 256
STK500V2: stk500v2_loadaddr(-2147413120)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x13 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x5e 0x00 0x05 0x0e 0x06 0x80 0x01 0x13 0x80 0x5a , 11)
avrdude: Send: . [1b] ^ [5e] . [00] . [05] . [0e] . [06] . [80] . [01] . [13] . [80] Z [5a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ^ [5e] 
0x5e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: O [4f] 
0x4f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7b , 10)
avrdude: Send: . [1b] _ [5f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] { [7b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: _ [5f] 
0x5f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: \ [5c] 
0x5c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,141312,256)
block_size at addr 141312 is 256
STK500V2: stk500v2_loadaddr(-2147412992)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x14 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x60 0x00 0x05 0x0e 0x06 0x80 0x01 0x14 0x00 0xe3 , 11)
avrdude: Send: . [1b] ` [60] . [00] . [05] . [0e] . [06] . [80] . [01] . [14] . [00] . [e3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ` [60] 
0x60 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: q [71] 
0x71 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x61 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x45 , 10)
avrdude: Send: . [1b] a [61] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] E [45] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: a [61] 
0x61 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: b [62] 
0x62 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,141568,256)
block_size at addr 141568 is 256
STK500V2: stk500v2_loadaddr(-2147412864)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x14 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x62 0x00 0x05 0x0e 0x06 0x80 0x01 0x14 0x80 0x61 , 11)
avrdude: Send: . [1b] b [62] . [00] . [05] . [0e] . [06] . [80] . [01] . [14] . [80] a [61] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: b [62] 
0x62 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: s [73] 
0x73 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x63 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x47 , 10)
avrdude: Send: . [1b] c [63] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] G [47] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: c [63] 
0x63 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: ` [60] 
0x60 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,141824,256)
block_size at addr 141824 is 256
STK500V2: stk500v2_loadaddr(-2147412736)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x15 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x64 0x00 0x05 0x0e 0x06 0x80 0x01 0x15 0x00 0xe6 , 11)
avrdude: Send: . [1b] d [64] . [00] . [05] . [0e] . [06] . [80] . [01] . [15] . [00] . [e6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: d [64] 
0x64 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: u [75] 
0x75 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x65 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x41 , 10)
avrdude: Send: . [1b] e [65] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] A [41] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: e [65] 
0x65 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: f [66] 
0x66 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,142080,256)
block_size at addr 142080 is 256
STK500V2: stk500v2_loadaddr(-2147412608)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x15 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x66 0x00 0x05 0x0e 0x06 0x80 0x01 0x15 0x80 0x64 , 11)
avrdude: Send: . [1b] f [66] . [00] . [05] . [0e] . [06] . [80] . [01] . [15] . [80] d [64] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: f [66] 
0x66 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: w [77] 
0x77 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x67 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x43 , 10)
avrdude: Send: . [1b] g [67] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] C [43] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: g [67] 
0x67 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,142336,256)
block_size at addr 142336 is 256
STK500V2: stk500v2_loadaddr(-2147412480)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x16 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x68 0x00 0x05 0x0e 0x06 0x80 0x01 0x16 0x00 0xe9 , 11)
avrdude: Send: . [1b] h [68] . [00] . [05] . [0e] . [06] . [80] . [01] . [16] . [00] . [e9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: h [68] 
0x68 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: y [79] 
0x79 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x69 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4d , 10)
avrdude: Send: . [1b] i [69] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] M [4d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: i [69] 
0x69 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: j [6a] 
0x6a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,142592,256)
block_size at addr 142592 is 256
STK500V2: stk500v2_loadaddr(-2147412352)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x16 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x6a 0x00 0x05 0x0e 0x06 0x80 0x01 0x16 0x80 0x6b , 11)
avrdude: Send: . [1b] j [6a] . [00] . [05] . [0e] . [06] . [80] . [01] . [16] . [80] k [6b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: j [6a] 
0x6a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: { [7b] 
0x7b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4f , 10)
avrdude: Send: . [1b] k [6b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] O [4f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: k [6b] 
0x6b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: h [68] 
0x68 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,142848,256)
block_size at addr 142848 is 256
STK500V2: stk500v2_loadaddr(-2147412224)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x17 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x6c 0x00 0x05 0x0e 0x06 0x80 0x01 0x17 0x00 0xec , 11)
avrdude: Send: . [1b] l [6c] . [00] . [05] . [0e] . [06] . [80] . [01] . [17] . [00] . [ec] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: l [6c] 
0x6c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: } [7d] 
0x7d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x49 , 10)
avrdude: Send: . [1b] m [6d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] I [49] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: m [6d] 
0x6d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: n [6e] 
0x6e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,143104,256)
block_size at addr 143104 is 256
STK500V2: stk500v2_loadaddr(-2147412096)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x17 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x6e 0x00 0x05 0x0e 0x06 0x80 0x01 0x17 0x80 0x6e , 11)
avrdude: Send: . [1b] n [6e] . [00] . [05] . [0e] . [06] . [80] . [01] . [17] . [80] n [6e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: n [6e] 
0x6e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [7f] 
0x7f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4b , 10)
avrdude: Send: . [1b] o [6f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] K [4b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: o [6f] 
0x6f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: l [6c] 
0x6c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,143360,256)
block_size at addr 143360 is 256
STK500V2: stk500v2_loadaddr(-2147411968)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x18 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x70 0x00 0x05 0x0e 0x06 0x80 0x01 0x18 0x00 0xff , 11)
avrdude: Send: . [1b] p [70] . [00] . [05] . [0e] . [06] . [80] . [01] . [18] . [00] . [ff] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: p [70] 
0x70 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: a [61] 
0x61 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x71 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x55 , 10)
avrdude: Send: . [1b] q [71] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] U [55] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: q [71] 
0x71 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: r [72] 
0x72 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,143616,256)
block_size at addr 143616 is 256
STK500V2: stk500v2_loadaddr(-2147411840)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x18 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x72 0x00 0x05 0x0e 0x06 0x80 0x01 0x18 0x80 0x7d , 11)
avrdude: Send: . [1b] r [72] . [00] . [05] . [0e] . [06] . [80] . [01] . [18] . [80] } [7d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: r [72] 
0x72 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: c [63] 
0x63 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x73 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x57 , 10)
avrdude: Send: . [1b] s [73] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] W [57] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: s [73] 
0x73 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,143872,256)
block_size at addr 143872 is 256
STK500V2: stk500v2_loadaddr(-2147411712)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x19 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x74 0x00 0x05 0x0e 0x06 0x80 0x01 0x19 0x00 0xfa , 11)
avrdude: Send: . [1b] t [74] . [00] . [05] . [0e] . [06] . [80] . [01] . [19] . [00] . [fa] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: t [74] 
0x74 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: e [65] 
0x65 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x75 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x51 , 10)
avrdude: Send: . [1b] u [75] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] Q [51] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: u [75] 
0x75 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: v [76] 
0x76 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,144128,256)
block_size at addr 144128 is 256
STK500V2: stk500v2_loadaddr(-2147411584)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x19 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x76 0x00 0x05 0x0e 0x06 0x80 0x01 0x19 0x80 0x78 , 11)
avrdude: Send: . [1b] v [76] . [00] . [05] . [0e] . [06] . [80] . [01] . [19] . [80] x [78] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: v [76] 
0x76 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: g [67] 
0x67 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x77 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x53 , 10)
avrdude: Send: . [1b] w [77] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] S [53] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: w [77] 
0x77 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: t [74] 
0x74 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,144384,256)
block_size at addr 144384 is 256
STK500V2: stk500v2_loadaddr(-2147411456)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x1a 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x78 0x00 0x05 0x0e 0x06 0x80 0x01 0x1a 0x00 0xf5 , 11)
avrdude: Send: . [1b] x [78] . [00] . [05] . [0e] . [06] . [80] . [01] . [1a] . [00] . [f5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: x [78] 
0x78 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: i [69] 
0x69 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x79 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5d , 10)
avrdude: Send: . [1b] y [79] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ] [5d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: y [79] 
0x79 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: z [7a] 
0x7a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,144640,256)
block_size at addr 144640 is 256
STK500V2: stk500v2_loadaddr(-2147411328)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x1a 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x7a 0x00 0x05 0x0e 0x06 0x80 0x01 0x1a 0x80 0x77 , 11)
avrdude: Send: . [1b] z [7a] . [00] . [05] . [0e] . [06] . [80] . [01] . [1a] . [80] w [77] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: z [7a] 
0x7a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: k [6b] 
0x6b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5f , 10)
avrdude: Send: . [1b] { [7b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] _ [5f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: { [7b] 
0x7b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: x [78] 
0x78 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,144896,256)
block_size at addr 144896 is 256
STK500V2: stk500v2_loadaddr(-2147411200)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x1b 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x7c 0x00 0x05 0x0e 0x06 0x80 0x01 0x1b 0x00 0xf0 , 11)
avrdude: Send: . [1b] | [7c] . [00] . [05] . [0e] . [06] . [80] . [01] . [1b] . [00] . [f0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: | [7c] 
0x7c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: m [6d] 
0x6d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x59 , 10)
avrdude: Send: . [1b] } [7d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] Y [59] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: } [7d] 
0x7d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: ~ [7e] 
0x7e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,145152,256)
block_size at addr 145152 is 256
STK500V2: stk500v2_loadaddr(-2147411072)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x1b 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x7e 0x00 0x05 0x0e 0x06 0x80 0x01 0x1b 0x80 0x72 , 11)
avrdude: Send: . [1b] ~ [7e] . [00] . [05] . [0e] . [06] . [80] . [01] . [1b] . [80] r [72] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ~ [7e] 
0x7e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: o [6f] 
0x6f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5b , 10)
avrdude: Send: . [1b] . [7f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] [ [5b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [7f] 
0x7f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: | [7c] 
0x7c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,145408,256)
block_size at addr 145408 is 256
STK500V2: stk500v2_loadaddr(-2147410944)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x1c 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x80 0x00 0x05 0x0e 0x06 0x80 0x01 0x1c 0x00 0x0b , 11)
avrdude: Send: . [1b] . [80] . [00] . [05] . [0e] . [06] . [80] . [01] . [1c] . [00] . [0b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [80] 
0x80 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x81 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa5 , 10)
avrdude: Send: . [1b] . [81] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [81] 
0x81 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,145664,256)
block_size at addr 145664 is 256
STK500V2: stk500v2_loadaddr(-2147410816)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x1c 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x82 0x00 0x05 0x0e 0x06 0x80 0x01 0x1c 0x80 0x89 , 11)
avrdude: Send: . [1b] . [82] . [00] . [05] . [0e] . [06] . [80] . [01] . [1c] . [80] . [89] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [82] 
0x82 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x83 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa7 , 10)
avrdude: Send: . [1b] . [83] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [83] 
0x83 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,145920,256)
block_size at addr 145920 is 256
STK500V2: stk500v2_loadaddr(-2147410688)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x1d 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x84 0x00 0x05 0x0e 0x06 0x80 0x01 0x1d 0x00 0x0e , 11)
avrdude: Send: . [1b] . [84] . [00] . [05] . [0e] . [06] . [80] . [01] . [1d] . [00] . [0e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [84] 
0x84 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [95] 
0x95 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x85 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa1 , 10)
avrdude: Send: . [1b] . [85] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [85] 
0x85 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,146176,256)
block_size at addr 146176 is 256
STK500V2: stk500v2_loadaddr(-2147410560)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x1d 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x86 0x00 0x05 0x0e 0x06 0x80 0x01 0x1d 0x80 0x8c , 11)
avrdude: Send: . [1b] . [86] . [00] . [05] . [0e] . [06] . [80] . [01] . [1d] . [80] . [8c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [86] 
0x86 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x87 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa3 , 10)
avrdude: Send: . [1b] . [87] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [87] 
0x87 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [84] 
0x84 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,146432,256)
block_size at addr 146432 is 256
STK500V2: stk500v2_loadaddr(-2147410432)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x1e 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x88 0x00 0x05 0x0e 0x06 0x80 0x01 0x1e 0x00 0x01 , 11)
avrdude: Send: . [1b] . [88] . [00] . [05] . [0e] . [06] . [80] . [01] . [1e] . [00] . [01] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [88] 
0x88 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [99] 
0x99 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x89 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xad , 10)
avrdude: Send: . [1b] . [89] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ad] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [89] 
0x89 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8a] 
0x8a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,146688,256)
block_size at addr 146688 is 256
STK500V2: stk500v2_loadaddr(-2147410304)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x1e 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x8a 0x00 0x05 0x0e 0x06 0x80 0x01 0x1e 0x80 0x83 , 11)
avrdude: Send: . [1b] . [8a] . [00] . [05] . [0e] . [06] . [80] . [01] . [1e] . [80] . [83] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8a] 
0x8a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9b] 
0x9b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xaf , 10)
avrdude: Send: . [1b] . [8b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [af] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8b] 
0x8b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,146944,256)
block_size at addr 146944 is 256
STK500V2: stk500v2_loadaddr(-2147410176)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x1f 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x8c 0x00 0x05 0x0e 0x06 0x80 0x01 0x1f 0x00 0x04 , 11)
avrdude: Send: . [1b] . [8c] . [00] . [05] . [0e] . [06] . [80] . [01] . [1f] . [00] . [04] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8c] 
0x8c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9d] 
0x9d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa9 , 10)
avrdude: Send: . [1b] . [8d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8d] 
0x8d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8e] 
0x8e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,147200,256)
block_size at addr 147200 is 256
STK500V2: stk500v2_loadaddr(-2147410048)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x1f 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x8e 0x00 0x05 0x0e 0x06 0x80 0x01 0x1f 0x80 0x86 , 11)
avrdude: Send: . [1b] . [8e] . [00] . [05] . [0e] . [06] . [80] . [01] . [1f] . [80] . [86] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8e] 
0x8e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xab , 10)
avrdude: Send: . [1b] . [8f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ab] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8f] 
0x8f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8c] 
0x8c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,147456,256)
block_size at addr 147456 is 256
STK500V2: stk500v2_loadaddr(-2147409920)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x20 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x90 0x00 0x05 0x0e 0x06 0x80 0x01 0x20 0x00 0x27 , 11)
avrdude: Send: . [1b] . [90] . [00] . [05] . [0e] . [06] . [80] . [01]   [20] . [00] ' [27] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [90] 
0x90 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x91 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb5 , 10)
avrdude: Send: . [1b] . [91] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [91] 
0x91 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [92] 
0x92 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,147712,256)
block_size at addr 147712 is 256
STK500V2: stk500v2_loadaddr(-2147409792)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x20 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x92 0x00 0x05 0x0e 0x06 0x80 0x01 0x20 0x80 0xa5 , 11)
avrdude: Send: . [1b] . [92] . [00] . [05] . [0e] . [06] . [80] . [01]   [20] . [80] . [a5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [92] 
0x92 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [83] 
0x83 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x93 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb7 , 10)
avrdude: Send: . [1b] . [93] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [93] 
0x93 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,147968,256)
block_size at addr 147968 is 256
STK500V2: stk500v2_loadaddr(-2147409664)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x21 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x94 0x00 0x05 0x0e 0x06 0x80 0x01 0x21 0x00 0x22 , 11)
avrdude: Send: . [1b] . [94] . [00] . [05] . [0e] . [06] . [80] . [01] ! [21] . [00] " [22] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [94] 
0x94 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [85] 
0x85 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x95 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb1 , 10)
avrdude: Send: . [1b] . [95] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [95] 
0x95 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [96] 
0x96 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,148224,256)
block_size at addr 148224 is 256
STK500V2: stk500v2_loadaddr(-2147409536)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x21 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x96 0x00 0x05 0x0e 0x06 0x80 0x01 0x21 0x80 0xa0 , 11)
avrdude: Send: . [1b] . [96] . [00] . [05] . [0e] . [06] . [80] . [01] ! [21] . [80] . [a0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [96] 
0x96 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x97 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb3 , 10)
avrdude: Send: . [1b] . [97] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [97] 
0x97 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [94] 
0x94 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,148480,256)
block_size at addr 148480 is 256
STK500V2: stk500v2_loadaddr(-2147409408)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x22 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x98 0x00 0x05 0x0e 0x06 0x80 0x01 0x22 0x00 0x2d , 11)
avrdude: Send: . [1b] . [98] . [00] . [05] . [0e] . [06] . [80] . [01] " [22] . [00] - [2d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [98] 
0x98 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [89] 
0x89 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x99 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbd , 10)
avrdude: Send: . [1b] . [99] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [99] 
0x99 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9a] 
0x9a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,148736,256)
block_size at addr 148736 is 256
STK500V2: stk500v2_loadaddr(-2147409280)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x22 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x9a 0x00 0x05 0x0e 0x06 0x80 0x01 0x22 0x80 0xaf , 11)
avrdude: Send: . [1b] . [9a] . [00] . [05] . [0e] . [06] . [80] . [01] " [22] . [80] . [af] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9a] 
0x9a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8b] 
0x8b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbf , 10)
avrdude: Send: . [1b] . [9b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9b] 
0x9b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [98] 
0x98 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,148992,256)
block_size at addr 148992 is 256
STK500V2: stk500v2_loadaddr(-2147409152)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x23 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x9c 0x00 0x05 0x0e 0x06 0x80 0x01 0x23 0x00 0x28 , 11)
avrdude: Send: . [1b] . [9c] . [00] . [05] . [0e] . [06] . [80] . [01] # [23] . [00] ( [28] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9c] 
0x9c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb9 , 10)
avrdude: Send: . [1b] . [9d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9d] 
0x9d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9e] 
0x9e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,149248,256)
block_size at addr 149248 is 256
STK500V2: stk500v2_loadaddr(-2147409024)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x23 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x9e 0x00 0x05 0x0e 0x06 0x80 0x01 0x23 0x80 0xaa , 11)
avrdude: Send: . [1b] . [9e] . [00] . [05] . [0e] . [06] . [80] . [01] # [23] . [80] . [aa] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9e] 
0x9e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbb , 10)
avrdude: Send: . [1b] . [9f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9f] 
0x9f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9c] 
0x9c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,149504,256)
block_size at addr 149504 is 256
STK500V2: stk500v2_loadaddr(-2147408896)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x24 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa0 0x00 0x05 0x0e 0x06 0x80 0x01 0x24 0x00 0x13 , 11)
avrdude: Send: . [1b] . [a0] . [00] . [05] . [0e] . [06] . [80] . [01] $ [24] . [00] . [13] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a0] 
0xa0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b1] 
0xb1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x85 , 10)
avrdude: Send: . [1b] . [a1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [85] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a1] 
0xa1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a2] 
0xa2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,149760,256)
block_size at addr 149760 is 256
STK500V2: stk500v2_loadaddr(-2147408768)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x24 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xa2 0x00 0x05 0x0e 0x06 0x80 0x01 0x24 0x80 0x91 , 11)
avrdude: Send: . [1b] . [a2] . [00] . [05] . [0e] . [06] . [80] . [01] $ [24] . [80] . [91] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a2] 
0xa2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b3] 
0xb3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x87 , 10)
avrdude: Send: . [1b] . [a3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [87] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a3] 
0xa3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a0] 
0xa0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,150016,256)
block_size at addr 150016 is 256
STK500V2: stk500v2_loadaddr(-2147408640)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x25 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa4 0x00 0x05 0x0e 0x06 0x80 0x01 0x25 0x00 0x16 , 11)
avrdude: Send: . [1b] . [a4] . [00] . [05] . [0e] . [06] . [80] . [01] % [25] . [00] . [16] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a4] 
0xa4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b5] 
0xb5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x81 , 10)
avrdude: Send: . [1b] . [a5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [81] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a5] 
0xa5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a6] 
0xa6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,150272,256)
block_size at addr 150272 is 256
STK500V2: stk500v2_loadaddr(-2147408512)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x25 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xa6 0x00 0x05 0x0e 0x06 0x80 0x01 0x25 0x80 0x94 , 11)
avrdude: Send: . [1b] . [a6] . [00] . [05] . [0e] . [06] . [80] . [01] % [25] . [80] . [94] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a6] 
0xa6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b7] 
0xb7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x83 , 10)
avrdude: Send: . [1b] . [a7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [83] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a7] 
0xa7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a4] 
0xa4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,150528,256)
block_size at addr 150528 is 256
STK500V2: stk500v2_loadaddr(-2147408384)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x26 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa8 0x00 0x05 0x0e 0x06 0x80 0x01 0x26 0x00 0x19 , 11)
avrdude: Send: . [1b] . [a8] . [00] . [05] . [0e] . [06] . [80] . [01] & [26] . [00] . [19] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a8] 
0xa8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b9] 
0xb9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8d , 10)
avrdude: Send: . [1b] . [a9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a9] 
0xa9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [aa] 
0xaa 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,150784,256)
block_size at addr 150784 is 256
STK500V2: stk500v2_loadaddr(-2147408256)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x26 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xaa 0x00 0x05 0x0e 0x06 0x80 0x01 0x26 0x80 0x9b , 11)
avrdude: Send: . [1b] . [aa] . [00] . [05] . [0e] . [06] . [80] . [01] & [26] . [80] . [9b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [aa] 
0xaa hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bb] 
0xbb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xab 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8f , 10)
avrdude: Send: . [1b] . [ab] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ab] 
0xab hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a8] 
0xa8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,151040,256)
block_size at addr 151040 is 256
STK500V2: stk500v2_loadaddr(-2147408128)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x27 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xac 0x00 0x05 0x0e 0x06 0x80 0x01 0x27 0x00 0x1c , 11)
avrdude: Send: . [1b] . [ac] . [00] . [05] . [0e] . [06] . [80] . [01] ' [27] . [00] . [1c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ac] 
0xac hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bd] 
0xbd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xad 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x89 , 10)
avrdude: Send: . [1b] . [ad] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [89] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ad] 
0xad hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ae] 
0xae 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,151296,256)
block_size at addr 151296 is 256
STK500V2: stk500v2_loadaddr(-2147408000)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x27 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xae 0x00 0x05 0x0e 0x06 0x80 0x01 0x27 0x80 0x9e , 11)
avrdude: Send: . [1b] . [ae] . [00] . [05] . [0e] . [06] . [80] . [01] ' [27] . [80] . [9e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ae] 
0xae hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bf] 
0xbf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xaf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8b , 10)
avrdude: Send: . [1b] . [af] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [af] 
0xaf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ac] 
0xac 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,151552,256)
block_size at addr 151552 is 256
STK500V2: stk500v2_loadaddr(-2147407872)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x28 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb0 0x00 0x05 0x0e 0x06 0x80 0x01 0x28 0x00 0x0f , 11)
avrdude: Send: . [1b] . [b0] . [00] . [05] . [0e] . [06] . [80] . [01] ( [28] . [00] . [0f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b0] 
0xb0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a1] 
0xa1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x95 , 10)
avrdude: Send: . [1b] . [b1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [95] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b1] 
0xb1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b2] 
0xb2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,151808,256)
block_size at addr 151808 is 256
STK500V2: stk500v2_loadaddr(-2147407744)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x28 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xb2 0x00 0x05 0x0e 0x06 0x80 0x01 0x28 0x80 0x8d , 11)
avrdude: Send: . [1b] . [b2] . [00] . [05] . [0e] . [06] . [80] . [01] ( [28] . [80] . [8d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b2] 
0xb2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a3] 
0xa3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x97 , 10)
avrdude: Send: . [1b] . [b3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [97] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b3] 
0xb3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b0] 
0xb0 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,152064,256)
block_size at addr 152064 is 256
STK500V2: stk500v2_loadaddr(-2147407616)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x29 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb4 0x00 0x05 0x0e 0x06 0x80 0x01 0x29 0x00 0x0a , 11)
avrdude: Send: . [1b] . [b4] . [00] . [05] . [0e] . [06] . [80] . [01] ) [29] . [00] . [0a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b4] 
0xb4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a5] 
0xa5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x91 , 10)
avrdude: Send: . [1b] . [b5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [91] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b5] 
0xb5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b6] 
0xb6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,152320,256)
block_size at addr 152320 is 256
STK500V2: stk500v2_loadaddr(-2147407488)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x29 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xb6 0x00 0x05 0x0e 0x06 0x80 0x01 0x29 0x80 0x88 , 11)
avrdude: Send: . [1b] . [b6] . [00] . [05] . [0e] . [06] . [80] . [01] ) [29] . [80] . [88] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b6] 
0xb6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a7] 
0xa7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x93 , 10)
avrdude: Send: . [1b] . [b7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [93] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b7] 
0xb7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b4] 
0xb4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,152576,256)
block_size at addr 152576 is 256
STK500V2: stk500v2_loadaddr(-2147407360)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x2a 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb8 0x00 0x05 0x0e 0x06 0x80 0x01 0x2a 0x00 0x05 , 11)
avrdude: Send: . [1b] . [b8] . [00] . [05] . [0e] . [06] . [80] . [01] * [2a] . [00] . [05] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b8] 
0xb8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a9] 
0xa9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9d , 10)
avrdude: Send: . [1b] . [b9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b9] 
0xb9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ba] 
0xba 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,152832,256)
block_size at addr 152832 is 256
STK500V2: stk500v2_loadaddr(-2147407232)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x2a 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xba 0x00 0x05 0x0e 0x06 0x80 0x01 0x2a 0x80 0x87 , 11)
avrdude: Send: . [1b] . [ba] . [00] . [05] . [0e] . [06] . [80] . [01] * [2a] . [80] . [87] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ba] 
0xba hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ab] 
0xab 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9f , 10)
avrdude: Send: . [1b] . [bb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bb] 
0xbb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b8] 
0xb8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,153088,256)
block_size at addr 153088 is 256
STK500V2: stk500v2_loadaddr(-2147407104)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x2b 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xbc 0x00 0x05 0x0e 0x06 0x80 0x01 0x2b 0x00 0x00 , 11)
avrdude: Send: . [1b] . [bc] . [00] . [05] . [0e] . [06] . [80] . [01] + [2b] . [00] . [00] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bc] 
0xbc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ad] 
0xad 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x99 , 10)
avrdude: Send: . [1b] . [bd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [99] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bd] 
0xbd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [be] 
0xbe 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,153344,256)
block_size at addr 153344 is 256
STK500V2: stk500v2_loadaddr(-2147406976)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x2b 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xbe 0x00 0x05 0x0e 0x06 0x80 0x01 0x2b 0x80 0x82 , 11)
avrdude: Send: . [1b] . [be] . [00] . [05] . [0e] . [06] . [80] . [01] + [2b] . [80] . [82] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [be] 
0xbe hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [af] 
0xaf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9b , 10)
avrdude: Send: . [1b] . [bf] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bf] 
0xbf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bc] 
0xbc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,153600,256)
block_size at addr 153600 is 256
STK500V2: stk500v2_loadaddr(-2147406848)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x2c 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc0 0x00 0x05 0x0e 0x06 0x80 0x01 0x2c 0x00 0x7b , 11)
avrdude: Send: . [1b] . [c0] . [00] . [05] . [0e] . [06] . [80] . [01] , [2c] . [00] { [7b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c0] 
0xc0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d1] 
0xd1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe5 , 10)
avrdude: Send: . [1b] . [c1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c1] 
0xc1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c2] 
0xc2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,153856,256)
block_size at addr 153856 is 256
STK500V2: stk500v2_loadaddr(-2147406720)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x2c 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xc2 0x00 0x05 0x0e 0x06 0x80 0x01 0x2c 0x80 0xf9 , 11)
avrdude: Send: . [1b] . [c2] . [00] . [05] . [0e] . [06] . [80] . [01] , [2c] . [80] . [f9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c2] 
0xc2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d3] 
0xd3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe7 , 10)
avrdude: Send: . [1b] . [c3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c3] 
0xc3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,154112,256)
block_size at addr 154112 is 256
STK500V2: stk500v2_loadaddr(-2147406592)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x2d 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc4 0x00 0x05 0x0e 0x06 0x80 0x01 0x2d 0x00 0x7e , 11)
avrdude: Send: . [1b] . [c4] . [00] . [05] . [0e] . [06] . [80] . [01] - [2d] . [00] ~ [7e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c4] 
0xc4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d5] 
0xd5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe1 , 10)
avrdude: Send: . [1b] . [c5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c5] 
0xc5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c6] 
0xc6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,154368,256)
block_size at addr 154368 is 256
STK500V2: stk500v2_loadaddr(-2147406464)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x2d 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xc6 0x00 0x05 0x0e 0x06 0x80 0x01 0x2d 0x80 0xfc , 11)
avrdude: Send: . [1b] . [c6] . [00] . [05] . [0e] . [06] . [80] . [01] - [2d] . [80] . [fc] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c6] 
0xc6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d7] 
0xd7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe3 , 10)
avrdude: Send: . [1b] . [c7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c7] 
0xc7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c4] 
0xc4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,154624,256)
block_size at addr 154624 is 256
STK500V2: stk500v2_loadaddr(-2147406336)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x2e 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc8 0x00 0x05 0x0e 0x06 0x80 0x01 0x2e 0x00 0x71 , 11)
avrdude: Send: . [1b] . [c8] . [00] . [05] . [0e] . [06] . [80] . [01] . [2e] . [00] q [71] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c8] 
0xc8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d9] 
0xd9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xed , 10)
avrdude: Send: . [1b] . [c9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ed] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c9] 
0xc9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ca] 
0xca 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,154880,256)
block_size at addr 154880 is 256
STK500V2: stk500v2_loadaddr(-2147406208)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x2e 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xca 0x00 0x05 0x0e 0x06 0x80 0x01 0x2e 0x80 0xf3 , 11)
avrdude: Send: . [1b] . [ca] . [00] . [05] . [0e] . [06] . [80] . [01] . [2e] . [80] . [f3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ca] 
0xca hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [db] 
0xdb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xef , 10)
avrdude: Send: . [1b] . [cb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ef] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cb] 
0xcb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,155136,256)
block_size at addr 155136 is 256
STK500V2: stk500v2_loadaddr(-2147406080)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x2f 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xcc 0x00 0x05 0x0e 0x06 0x80 0x01 0x2f 0x00 0x74 , 11)
avrdude: Send: . [1b] . [cc] . [00] . [05] . [0e] . [06] . [80] . [01] / [2f] . [00] t [74] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cc] 
0xcc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [dd] 
0xdd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe9 , 10)
avrdude: Send: . [1b] . [cd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cd] 
0xcd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ce] 
0xce 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,155392,256)
block_size at addr 155392 is 256
STK500V2: stk500v2_loadaddr(-2147405952)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x2f 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xce 0x00 0x05 0x0e 0x06 0x80 0x01 0x2f 0x80 0xf6 , 11)
avrdude: Send: . [1b] . [ce] . [00] . [05] . [0e] . [06] . [80] . [01] / [2f] . [80] . [f6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ce] 
0xce hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [df] 
0xdf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xeb , 10)
avrdude: Send: . [1b] . [cf] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [eb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cf] 
0xcf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cc] 
0xcc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,155648,256)
block_size at addr 155648 is 256
STK500V2: stk500v2_loadaddr(-2147405824)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x30 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd0 0x00 0x05 0x0e 0x06 0x80 0x01 0x30 0x00 0x77 , 11)
avrdude: Send: . [1b] . [d0] . [00] . [05] . [0e] . [06] . [80] . [01] 0 [30] . [00] w [77] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d0] 
0xd0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c1] 
0xc1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf5 , 10)
avrdude: Send: . [1b] . [d1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d1] 
0xd1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d2] 
0xd2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,155904,256)
block_size at addr 155904 is 256
STK500V2: stk500v2_loadaddr(-2147405696)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x30 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xd2 0x00 0x05 0x0e 0x06 0x80 0x01 0x30 0x80 0xf5 , 11)
avrdude: Send: . [1b] . [d2] . [00] . [05] . [0e] . [06] . [80] . [01] 0 [30] . [80] . [f5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d2] 
0xd2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c3] 
0xc3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf7 , 10)
avrdude: Send: . [1b] . [d3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d3] 
0xd3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,156160,256)
block_size at addr 156160 is 256
STK500V2: stk500v2_loadaddr(-2147405568)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x31 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd4 0x00 0x05 0x0e 0x06 0x80 0x01 0x31 0x00 0x72 , 11)
avrdude: Send: . [1b] . [d4] . [00] . [05] . [0e] . [06] . [80] . [01] 1 [31] . [00] r [72] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d4] 
0xd4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c5] 
0xc5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf1 , 10)
avrdude: Send: . [1b] . [d5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d5] 
0xd5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d6] 
0xd6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,156416,256)
block_size at addr 156416 is 256
STK500V2: stk500v2_loadaddr(-2147405440)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x31 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xd6 0x00 0x05 0x0e 0x06 0x80 0x01 0x31 0x80 0xf0 , 11)
avrdude: Send: . [1b] . [d6] . [00] . [05] . [0e] . [06] . [80] . [01] 1 [31] . [80] . [f0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d6] 
0xd6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c7] 
0xc7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf3 , 10)
avrdude: Send: . [1b] . [d7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d7] 
0xd7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d4] 
0xd4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,156672,256)
block_size at addr 156672 is 256
STK500V2: stk500v2_loadaddr(-2147405312)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x32 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd8 0x00 0x05 0x0e 0x06 0x80 0x01 0x32 0x00 0x7d , 11)
avrdude: Send: . [1b] . [d8] . [00] . [05] . [0e] . [06] . [80] . [01] 2 [32] . [00] } [7d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d8] 
0xd8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c9] 
0xc9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xfd , 10)
avrdude: Send: . [1b] . [d9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [fd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d9] 
0xd9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [da] 
0xda 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,156928,256)
block_size at addr 156928 is 256
STK500V2: stk500v2_loadaddr(-2147405184)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x32 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xda 0x00 0x05 0x0e 0x06 0x80 0x01 0x32 0x80 0xff , 11)
avrdude: Send: . [1b] . [da] . [00] . [05] . [0e] . [06] . [80] . [01] 2 [32] . [80] . [ff] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [da] 
0xda hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cb] 
0xcb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xff , 10)
avrdude: Send: . [1b] . [db] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ff] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [db] 
0xdb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d8] 
0xd8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,157184,256)
block_size at addr 157184 is 256
STK500V2: stk500v2_loadaddr(-2147405056)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x33 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xdc 0x00 0x05 0x0e 0x06 0x80 0x01 0x33 0x00 0x78 , 11)
avrdude: Send: . [1b] . [dc] . [00] . [05] . [0e] . [06] . [80] . [01] 3 [33] . [00] x [78] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [dc] 
0xdc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cd] 
0xcd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf9 , 10)
avrdude: Send: . [1b] . [dd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [dd] 
0xdd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [de] 
0xde 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,157440,256)
block_size at addr 157440 is 256
STK500V2: stk500v2_loadaddr(-2147404928)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x33 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xde 0x00 0x05 0x0e 0x06 0x80 0x01 0x33 0x80 0xfa , 11)
avrdude: Send: . [1b] . [de] . [00] . [05] . [0e] . [06] . [80] . [01] 3 [33] . [80] . [fa] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [de] 
0xde hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cf] 
0xcf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xfb , 10)
avrdude: Send: . [1b] . [df] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [fb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [df] 
0xdf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [dc] 
0xdc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,157696,256)
block_size at addr 157696 is 256
STK500V2: stk500v2_loadaddr(-2147404800)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x34 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe0 0x00 0x05 0x0e 0x06 0x80 0x01 0x34 0x00 0x43 , 11)
avrdude: Send: . [1b] . [e0] . [00] . [05] . [0e] . [06] . [80] . [01] 4 [34] . [00] C [43] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e0] 
0xe0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f1] 
0xf1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc5 , 10)
avrdude: Send: . [1b] . [e1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e1] 
0xe1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e2] 
0xe2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,157952,256)
block_size at addr 157952 is 256
STK500V2: stk500v2_loadaddr(-2147404672)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x34 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xe2 0x00 0x05 0x0e 0x06 0x80 0x01 0x34 0x80 0xc1 , 11)
avrdude: Send: . [1b] . [e2] . [00] . [05] . [0e] . [06] . [80] . [01] 4 [34] . [80] . [c1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e2] 
0xe2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f3] 
0xf3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc7 , 10)
avrdude: Send: . [1b] . [e3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e3] 
0xe3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,158208,256)
block_size at addr 158208 is 256
STK500V2: stk500v2_loadaddr(-2147404544)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x35 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe4 0x00 0x05 0x0e 0x06 0x80 0x01 0x35 0x00 0x46 , 11)
avrdude: Send: . [1b] . [e4] . [00] . [05] . [0e] . [06] . [80] . [01] 5 [35] . [00] F [46] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e4] 
0xe4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f5] 
0xf5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc1 , 10)
avrdude: Send: . [1b] . [e5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e5] 
0xe5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e6] 
0xe6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,158464,256)
block_size at addr 158464 is 256
STK500V2: stk500v2_loadaddr(-2147404416)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x35 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xe6 0x00 0x05 0x0e 0x06 0x80 0x01 0x35 0x80 0xc4 , 11)
avrdude: Send: . [1b] . [e6] . [00] . [05] . [0e] . [06] . [80] . [01] 5 [35] . [80] . [c4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e6] 
0xe6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f7] 
0xf7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc3 , 10)
avrdude: Send: . [1b] . [e7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e7] 
0xe7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e4] 
0xe4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,158720,256)
block_size at addr 158720 is 256
STK500V2: stk500v2_loadaddr(-2147404288)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x36 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe8 0x00 0x05 0x0e 0x06 0x80 0x01 0x36 0x00 0x49 , 11)
avrdude: Send: . [1b] . [e8] . [00] . [05] . [0e] . [06] . [80] . [01] 6 [36] . [00] I [49] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e8] 
0xe8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f9] 
0xf9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcd , 10)
avrdude: Send: . [1b] . [e9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e9] 
0xe9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ea] 
0xea 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,158976,256)
block_size at addr 158976 is 256
STK500V2: stk500v2_loadaddr(-2147404160)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x36 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xea 0x00 0x05 0x0e 0x06 0x80 0x01 0x36 0x80 0xcb , 11)
avrdude: Send: . [1b] . [ea] . [00] . [05] . [0e] . [06] . [80] . [01] 6 [36] . [80] . [cb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ea] 
0xea hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fb] 
0xfb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xeb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcf , 10)
avrdude: Send: . [1b] . [eb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [eb] 
0xeb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e8] 
0xe8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,159232,256)
block_size at addr 159232 is 256
STK500V2: stk500v2_loadaddr(-2147404032)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x37 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xec 0x00 0x05 0x0e 0x06 0x80 0x01 0x37 0x00 0x4c , 11)
avrdude: Send: . [1b] . [ec] . [00] . [05] . [0e] . [06] . [80] . [01] 7 [37] . [00] L [4c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ec] 
0xec hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fd] 
0xfd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xed 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc9 , 10)
avrdude: Send: . [1b] . [ed] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ed] 
0xed hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ee] 
0xee 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,159488,256)
block_size at addr 159488 is 256
STK500V2: stk500v2_loadaddr(-2147403904)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x37 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xee 0x00 0x05 0x0e 0x06 0x80 0x01 0x37 0x80 0xce , 11)
avrdude: Send: . [1b] . [ee] . [00] . [05] . [0e] . [06] . [80] . [01] 7 [37] . [80] . [ce] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ee] 
0xee hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xef 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcb , 10)
avrdude: Send: . [1b] . [ef] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ef] 
0xef hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ec] 
0xec 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,159744,256)
block_size at addr 159744 is 256
STK500V2: stk500v2_loadaddr(-2147403776)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x38 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf0 0x00 0x05 0x0e 0x06 0x80 0x01 0x38 0x00 0x5f , 11)
avrdude: Send: . [1b] . [f0] . [00] . [05] . [0e] . [06] . [80] . [01] 8 [38] . [00] _ [5f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f0] 
0xf0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e1] 
0xe1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd5 , 10)
avrdude: Send: . [1b] . [f1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f1] 
0xf1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f2] 
0xf2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,160000,256)
block_size at addr 160000 is 256
STK500V2: stk500v2_loadaddr(-2147403648)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x38 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xf2 0x00 0x05 0x0e 0x06 0x80 0x01 0x38 0x80 0xdd , 11)
avrdude: Send: . [1b] . [f2] . [00] . [05] . [0e] . [06] . [80] . [01] 8 [38] . [80] . [dd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f2] 
0xf2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e3] 
0xe3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd7 , 10)
avrdude: Send: . [1b] . [f3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f3] 
0xf3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f0] 
0xf0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,160256,256)
block_size at addr 160256 is 256
STK500V2: stk500v2_loadaddr(-2147403520)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x39 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf4 0x00 0x05 0x0e 0x06 0x80 0x01 0x39 0x00 0x5a , 11)
avrdude: Send: . [1b] . [f4] . [00] . [05] . [0e] . [06] . [80] . [01] 9 [39] . [00] Z [5a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f4] 
0xf4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e5] 
0xe5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd1 , 10)
avrdude: Send: . [1b] . [f5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f5] 
0xf5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f6] 
0xf6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,160512,256)
block_size at addr 160512 is 256
STK500V2: stk500v2_loadaddr(-2147403392)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x39 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xf6 0x00 0x05 0x0e 0x06 0x80 0x01 0x39 0x80 0xd8 , 11)
avrdude: Send: . [1b] . [f6] . [00] . [05] . [0e] . [06] . [80] . [01] 9 [39] . [80] . [d8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f6] 
0xf6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e7] 
0xe7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd3 , 10)
avrdude: Send: . [1b] . [f7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f7] 
0xf7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f4] 
0xf4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,160768,256)
block_size at addr 160768 is 256
STK500V2: stk500v2_loadaddr(-2147403264)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x3a 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf8 0x00 0x05 0x0e 0x06 0x80 0x01 0x3a 0x00 0x55 , 11)
avrdude: Send: . [1b] . [f8] . [00] . [05] . [0e] . [06] . [80] . [01] : [3a] . [00] U [55] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f8] 
0xf8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e9] 
0xe9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdd , 10)
avrdude: Send: . [1b] . [f9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [dd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f9] 
0xf9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fa] 
0xfa 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,161024,256)
block_size at addr 161024 is 256
STK500V2: stk500v2_loadaddr(-2147403136)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x3a 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xfa 0x00 0x05 0x0e 0x06 0x80 0x01 0x3a 0x80 0xd7 , 11)
avrdude: Send: . [1b] . [fa] . [00] . [05] . [0e] . [06] . [80] . [01] : [3a] . [80] . [d7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fa] 
0xfa hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [eb] 
0xeb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xfb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdf , 10)
avrdude: Send: . [1b] . [fb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [df] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fb] 
0xfb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,161280,256)
block_size at addr 161280 is 256
STK500V2: stk500v2_loadaddr(-2147403008)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x3b 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xfc 0x00 0x05 0x0e 0x06 0x80 0x01 0x3b 0x00 0x50 , 11)
avrdude: Send: . [1b] . [fc] . [00] . [05] . [0e] . [06] . [80] . [01] ; [3b] . [00] P [50] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fc] 
0xfc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ed] 
0xed 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xfd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd9 , 10)
avrdude: Send: . [1b] . [fd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fd] 
0xfd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fe] 
0xfe 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,161536,256)
block_size at addr 161536 is 256
STK500V2: stk500v2_loadaddr(-2147402880)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x3b 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xfe 0x00 0x05 0x0e 0x06 0x80 0x01 0x3b 0x80 0xd2 , 11)
avrdude: Send: . [1b] . [fe] . [00] . [05] . [0e] . [06] . [80] . [01] ; [3b] . [80] . [d2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fe] 
0xfe hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ef] 
0xef 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xff 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdb , 10)
avrdude: Send: . [1b] . [ff] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [db] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ff] 
0xff hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fc] 
0xfc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,161792,256)
block_size at addr 161792 is 256
STK500V2: stk500v2_loadaddr(-2147402752)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x3c 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x00 0x00 0x05 0x0e 0x06 0x80 0x01 0x3c 0x00 0xab , 11)
avrdude: Send: . [1b] . [00] . [00] . [05] . [0e] . [06] . [80] . [01] < [3c] . [00] . [ab] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [00] 
0x00 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x01 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x25 , 10)
avrdude: Send: . [1b] . [01] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] % [25] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [01] 
0x01 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [02] 
0x02 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,162048,256)
block_size at addr 162048 is 256
STK500V2: stk500v2_loadaddr(-2147402624)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x3c 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x02 0x00 0x05 0x0e 0x06 0x80 0x01 0x3c 0x80 0x29 , 11)
avrdude: Send: . [1b] . [02] . [00] . [05] . [0e] . [06] . [80] . [01] < [3c] . [80] ) [29] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [02] 
0x02 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [13] 
0x13 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x03 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x27 , 10)
avrdude: Send: . [1b] . [03] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ' [27] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [03] 
0x03 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,162304,256)
block_size at addr 162304 is 256
STK500V2: stk500v2_loadaddr(-2147402496)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x3d 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x04 0x00 0x05 0x0e 0x06 0x80 0x01 0x3d 0x00 0xae , 11)
avrdude: Send: . [1b] . [04] . [00] . [05] . [0e] . [06] . [80] . [01] = [3d] . [00] . [ae] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [04] 
0x04 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [15] 
0x15 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x05 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x21 , 10)
avrdude: Send: . [1b] . [05] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ! [21] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [05] 
0x05 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,162560,256)
block_size at addr 162560 is 256
STK500V2: stk500v2_loadaddr(-2147402368)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x3d 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x06 0x00 0x05 0x0e 0x06 0x80 0x01 0x3d 0x80 0x2c , 11)
avrdude: Send: . [1b] . [06] . [00] . [05] . [0e] . [06] . [80] . [01] = [3d] . [80] , [2c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [06] 
0x06 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [17] 
0x17 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x07 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x23 , 10)
avrdude: Send: . [1b] . [07] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] # [23] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [07] 
0x07 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [04] 
0x04 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,162816,256)
block_size at addr 162816 is 256
STK500V2: stk500v2_loadaddr(-2147402240)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x3e 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x08 0x00 0x05 0x0e 0x06 0x80 0x01 0x3e 0x00 0xa1 , 11)
avrdude: Send: . [1b] . [08] . [00] . [05] . [0e] . [06] . [80] . [01] > [3e] . [00] . [a1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [08] 
0x08 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [19] 
0x19 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x09 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2d , 10)
avrdude: Send: . [1b] . [09] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] - [2d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [09] 
0x09 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0a] 
0x0a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,163072,256)
block_size at addr 163072 is 256
STK500V2: stk500v2_loadaddr(-2147402112)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x3e 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x0a 0x00 0x05 0x0e 0x06 0x80 0x01 0x3e 0x80 0x23 , 11)
avrdude: Send: . [1b] . [0a] . [00] . [05] . [0e] . [06] . [80] . [01] > [3e] . [80] # [23] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0a] 
0x0a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1b] 
0x1b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2f , 10)
avrdude: Send: . [1b] . [0b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] / [2f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0b] 
0x0b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,163328,256)
block_size at addr 163328 is 256
STK500V2: stk500v2_loadaddr(-2147401984)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x3f 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x0c 0x00 0x05 0x0e 0x06 0x80 0x01 0x3f 0x00 0xa4 , 11)
avrdude: Send: . [1b] . [0c] . [00] . [05] . [0e] . [06] . [80] . [01] ? [3f] . [00] . [a4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0c] 
0x0c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1d] 
0x1d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x29 , 10)
avrdude: Send: . [1b] . [0d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ) [29] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0d] 
0x0d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,163584,256)
block_size at addr 163584 is 256
STK500V2: stk500v2_loadaddr(-2147401856)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x3f 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x0e 0x00 0x05 0x0e 0x06 0x80 0x01 0x3f 0x80 0x26 , 11)
avrdude: Send: . [1b] . [0e] . [00] . [05] . [0e] . [06] . [80] . [01] ? [3f] . [80] & [26] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0e] 
0x0e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1f] 
0x1f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2b , 10)
avrdude: Send: . [1b] . [0f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] + [2b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0f] 
0x0f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,163840,256)
block_size at addr 163840 is 256
STK500V2: stk500v2_loadaddr(-2147401728)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x40 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x10 0x00 0x05 0x0e 0x06 0x80 0x01 0x40 0x00 0xc7 , 11)
avrdude: Send: . [1b] . [10] . [00] . [05] . [0e] . [06] . [80] . [01] @ [40] . [00] . [c7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [10] 
0x10 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x11 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x35 , 10)
avrdude: Send: . [1b] . [11] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 5 [35] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [11] 
0x11 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [12] 
0x12 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,164096,256)
block_size at addr 164096 is 256
STK500V2: stk500v2_loadaddr(-2147401600)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x40 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x12 0x00 0x05 0x0e 0x06 0x80 0x01 0x40 0x80 0x45 , 11)
avrdude: Send: . [1b] . [12] . [00] . [05] . [0e] . [06] . [80] . [01] @ [40] . [80] E [45] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [12] 
0x12 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x13 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x37 , 10)
avrdude: Send: . [1b] . [13] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 7 [37] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [13] 
0x13 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,164352,256)
block_size at addr 164352 is 256
STK500V2: stk500v2_loadaddr(-2147401472)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x41 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x14 0x00 0x05 0x0e 0x06 0x80 0x01 0x41 0x00 0xc2 , 11)
avrdude: Send: . [1b] . [14] . [00] . [05] . [0e] . [06] . [80] . [01] A [41] . [00] . [c2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [14] 
0x14 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [05] 
0x05 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x15 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x31 , 10)
avrdude: Send: . [1b] . [15] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 1 [31] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [15] 
0x15 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [16] 
0x16 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,164608,256)
block_size at addr 164608 is 256
STK500V2: stk500v2_loadaddr(-2147401344)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x41 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x16 0x00 0x05 0x0e 0x06 0x80 0x01 0x41 0x80 0x40 , 11)
avrdude: Send: . [1b] . [16] . [00] . [05] . [0e] . [06] . [80] . [01] A [41] . [80] @ [40] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [16] 
0x16 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [07] 
0x07 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x17 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x33 , 10)
avrdude: Send: . [1b] . [17] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 3 [33] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [17] 
0x17 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [14] 
0x14 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,164864,256)
block_size at addr 164864 is 256
STK500V2: stk500v2_loadaddr(-2147401216)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x42 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x18 0x00 0x05 0x0e 0x06 0x80 0x01 0x42 0x00 0xcd , 11)
avrdude: Send: . [1b] . [18] . [00] . [05] . [0e] . [06] . [80] . [01] B [42] . [00] . [cd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [18] 
0x18 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [09] 
0x09 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x19 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3d , 10)
avrdude: Send: . [1b] . [19] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] = [3d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [19] 
0x19 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1a] 
0x1a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,165120,256)
block_size at addr 165120 is 256
STK500V2: stk500v2_loadaddr(-2147401088)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x42 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x1a 0x00 0x05 0x0e 0x06 0x80 0x01 0x42 0x80 0x4f , 11)
avrdude: Send: . [1b] . [1a] . [00] . [05] . [0e] . [06] . [80] . [01] B [42] . [80] O [4f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1a] 
0x1a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0b] 
0x0b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3f , 10)
avrdude: Send: . [1b] . [1b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ? [3f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1b] 
0x1b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [18] 
0x18 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,165376,256)
block_size at addr 165376 is 256
STK500V2: stk500v2_loadaddr(-2147400960)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x43 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x1c 0x00 0x05 0x0e 0x06 0x80 0x01 0x43 0x00 0xc8 , 11)
avrdude: Send: . [1b] . [1c] . [00] . [05] . [0e] . [06] . [80] . [01] C [43] . [00] . [c8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1c] 
0x1c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0d] 
0x0d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x39 , 10)
avrdude: Send: . [1b] . [1d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 9 [39] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1d] 
0x1d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,165632,256)
block_size at addr 165632 is 256
STK500V2: stk500v2_loadaddr(-2147400832)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x43 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x1e 0x00 0x05 0x0e 0x06 0x80 0x01 0x43 0x80 0x4a , 11)
avrdude: Send: . [1b] . [1e] . [00] . [05] . [0e] . [06] . [80] . [01] C [43] . [80] J [4a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1e] 
0x1e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3b , 10)
avrdude: Send: . [1b] . [1f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ; [3b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1f] 
0x1f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1c] 
0x1c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,165888,256)
block_size at addr 165888 is 256
STK500V2: stk500v2_loadaddr(-2147400704)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x44 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x20 0x00 0x05 0x0e 0x06 0x80 0x01 0x44 0x00 0xf3 , 11)
avrdude: Send: . [1b]   [20] . [00] . [05] . [0e] . [06] . [80] . [01] D [44] . [00] . [f3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv:   [20] 
0x20 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 1 [31] 
0x31 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x21 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x05 , 10)
avrdude: Send: . [1b] ! [21] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [05] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ! [21] 
0x21 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: " [22] 
0x22 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,166144,256)
block_size at addr 166144 is 256
STK500V2: stk500v2_loadaddr(-2147400576)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x44 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x22 0x00 0x05 0x0e 0x06 0x80 0x01 0x44 0x80 0x71 , 11)
avrdude: Send: . [1b] " [22] . [00] . [05] . [0e] . [06] . [80] . [01] D [44] . [80] q [71] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: " [22] 
0x22 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 3 [33] 
0x33 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x23 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x07 , 10)
avrdude: Send: . [1b] # [23] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [07] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: # [23] 
0x23 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,166400,256)
block_size at addr 166400 is 256
STK500V2: stk500v2_loadaddr(-2147400448)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x45 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x24 0x00 0x05 0x0e 0x06 0x80 0x01 0x45 0x00 0xf6 , 11)
avrdude: Send: . [1b] $ [24] . [00] . [05] . [0e] . [06] . [80] . [01] E [45] . [00] . [f6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: $ [24] 
0x24 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 5 [35] 
0x35 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x25 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x01 , 10)
avrdude: Send: . [1b] % [25] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [01] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: % [25] 
0x25 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: & [26] 
0x26 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,166656,256)
block_size at addr 166656 is 256
STK500V2: stk500v2_loadaddr(-2147400320)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x45 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x26 0x00 0x05 0x0e 0x06 0x80 0x01 0x45 0x80 0x74 , 11)
avrdude: Send: . [1b] & [26] . [00] . [05] . [0e] . [06] . [80] . [01] E [45] . [80] t [74] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: & [26] 
0x26 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 7 [37] 
0x37 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x27 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x03 , 10)
avrdude: Send: . [1b] ' [27] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [03] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ' [27] 
0x27 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: $ [24] 
0x24 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,166912,256)
block_size at addr 166912 is 256
STK500V2: stk500v2_loadaddr(-2147400192)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x46 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x28 0x00 0x05 0x0e 0x06 0x80 0x01 0x46 0x00 0xf9 , 11)
avrdude: Send: . [1b] ( [28] . [00] . [05] . [0e] . [06] . [80] . [01] F [46] . [00] . [f9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ( [28] 
0x28 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 9 [39] 
0x39 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x29 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0d , 10)
avrdude: Send: . [1b] ) [29] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ) [29] 
0x29 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: * [2a] 
0x2a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,167168,256)
block_size at addr 167168 is 256
STK500V2: stk500v2_loadaddr(-2147400064)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x46 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x2a 0x00 0x05 0x0e 0x06 0x80 0x01 0x46 0x80 0x7b , 11)
avrdude: Send: . [1b] * [2a] . [00] . [05] . [0e] . [06] . [80] . [01] F [46] . [80] { [7b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: * [2a] 
0x2a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ; [3b] 
0x3b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0f , 10)
avrdude: Send: . [1b] + [2b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: + [2b] 
0x2b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: ( [28] 
0x28 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,167424,256)
block_size at addr 167424 is 256
STK500V2: stk500v2_loadaddr(-2147399936)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x47 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x2c 0x00 0x05 0x0e 0x06 0x80 0x01 0x47 0x00 0xfc , 11)
avrdude: Send: . [1b] , [2c] . [00] . [05] . [0e] . [06] . [80] . [01] G [47] . [00] . [fc] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: , [2c] 
0x2c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: = [3d] 
0x3d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x09 , 10)
avrdude: Send: . [1b] - [2d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [09] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: - [2d] 
0x2d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [2e] 
0x2e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,167680,256)
block_size at addr 167680 is 256
STK500V2: stk500v2_loadaddr(-2147399808)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x47 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x2e 0x00 0x05 0x0e 0x06 0x80 0x01 0x47 0x80 0x7e , 11)
avrdude: Send: . [1b] . [2e] . [00] . [05] . [0e] . [06] . [80] . [01] G [47] . [80] ~ [7e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [2e] 
0x2e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ? [3f] 
0x3f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0b , 10)
avrdude: Send: . [1b] / [2f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: / [2f] 
0x2f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: , [2c] 
0x2c 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,167936,256)
block_size at addr 167936 is 256
STK500V2: stk500v2_loadaddr(-2147399680)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x48 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x30 0x00 0x05 0x0e 0x06 0x80 0x01 0x48 0x00 0xef , 11)
avrdude: Send: . [1b] 0 [30] . [00] . [05] . [0e] . [06] . [80] . [01] H [48] . [00] . [ef] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 0 [30] 
0x30 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ! [21] 
0x21 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x31 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x15 , 10)
avrdude: Send: . [1b] 1 [31] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [15] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 1 [31] 
0x31 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: 2 [32] 
0x32 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,168192,256)
block_size at addr 168192 is 256
STK500V2: stk500v2_loadaddr(-2147399552)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x48 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x32 0x00 0x05 0x0e 0x06 0x80 0x01 0x48 0x80 0x6d , 11)
avrdude: Send: . [1b] 2 [32] . [00] . [05] . [0e] . [06] . [80] . [01] H [48] . [80] m [6d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 2 [32] 
0x32 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: # [23] 
0x23 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x33 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x17 , 10)
avrdude: Send: . [1b] 3 [33] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [17] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 3 [33] 
0x33 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: 0 [30] 
0x30 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,168448,256)
block_size at addr 168448 is 256
STK500V2: stk500v2_loadaddr(-2147399424)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x49 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x34 0x00 0x05 0x0e 0x06 0x80 0x01 0x49 0x00 0xea , 11)
avrdude: Send: . [1b] 4 [34] . [00] . [05] . [0e] . [06] . [80] . [01] I [49] . [00] . [ea] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 4 [34] 
0x34 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: % [25] 
0x25 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x35 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x11 , 10)
avrdude: Send: . [1b] 5 [35] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [11] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 5 [35] 
0x35 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: 6 [36] 
0x36 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,168704,256)
block_size at addr 168704 is 256
STK500V2: stk500v2_loadaddr(-2147399296)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x49 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x36 0x00 0x05 0x0e 0x06 0x80 0x01 0x49 0x80 0x68 , 11)
avrdude: Send: . [1b] 6 [36] . [00] . [05] . [0e] . [06] . [80] . [01] I [49] . [80] h [68] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 6 [36] 
0x36 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ' [27] 
0x27 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x37 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x13 , 10)
avrdude: Send: . [1b] 7 [37] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [13] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 7 [37] 
0x37 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: 4 [34] 
0x34 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,168960,256)
block_size at addr 168960 is 256
STK500V2: stk500v2_loadaddr(-2147399168)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x4a 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x38 0x00 0x05 0x0e 0x06 0x80 0x01 0x4a 0x00 0xe5 , 11)
avrdude: Send: . [1b] 8 [38] . [00] . [05] . [0e] . [06] . [80] . [01] J [4a] . [00] . [e5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 8 [38] 
0x38 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ) [29] 
0x29 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x39 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1d , 10)
avrdude: Send: . [1b] 9 [39] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 9 [39] 
0x39 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: : [3a] 
0x3a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,169216,256)
block_size at addr 169216 is 256
STK500V2: stk500v2_loadaddr(-2147399040)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x4a 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x3a 0x00 0x05 0x0e 0x06 0x80 0x01 0x4a 0x80 0x67 , 11)
avrdude: Send: . [1b] : [3a] . [00] . [05] . [0e] . [06] . [80] . [01] J [4a] . [80] g [67] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: : [3a] 
0x3a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: + [2b] 
0x2b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1f , 10)
avrdude: Send: . [1b] ; [3b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ; [3b] 
0x3b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: 8 [38] 
0x38 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,169472,256)
block_size at addr 169472 is 256
STK500V2: stk500v2_loadaddr(-2147398912)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x4b 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x3c 0x00 0x05 0x0e 0x06 0x80 0x01 0x4b 0x00 0xe0 , 11)
avrdude: Send: . [1b] < [3c] . [00] . [05] . [0e] . [06] . [80] . [01] K [4b] . [00] . [e0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: < [3c] 
0x3c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: - [2d] 
0x2d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x19 , 10)
avrdude: Send: . [1b] = [3d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [19] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: = [3d] 
0x3d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: > [3e] 
0x3e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,169728,256)
block_size at addr 169728 is 256
STK500V2: stk500v2_loadaddr(-2147398784)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x4b 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x3e 0x00 0x05 0x0e 0x06 0x80 0x01 0x4b 0x80 0x62 , 11)
avrdude: Send: . [1b] > [3e] . [00] . [05] . [0e] . [06] . [80] . [01] K [4b] . [80] b [62] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: > [3e] 
0x3e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: / [2f] 
0x2f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1b , 10)
avrdude: Send: . [1b] ? [3f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ? [3f] 
0x3f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: < [3c] 
0x3c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,169984,256)
block_size at addr 169984 is 256
STK500V2: stk500v2_loadaddr(-2147398656)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x4c 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x40 0x00 0x05 0x0e 0x06 0x80 0x01 0x4c 0x00 0x9b , 11)
avrdude: Send: . [1b] @ [40] . [00] . [05] . [0e] . [06] . [80] . [01] L [4c] . [00] . [9b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: @ [40] 
0x40 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Q [51] 
0x51 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x41 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x65 , 10)
avrdude: Send: . [1b] A [41] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] e [65] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: A [41] 
0x41 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: B [42] 
0x42 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,170240,256)
block_size at addr 170240 is 256
STK500V2: stk500v2_loadaddr(-2147398528)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x4c 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x42 0x00 0x05 0x0e 0x06 0x80 0x01 0x4c 0x80 0x19 , 11)
avrdude: Send: . [1b] B [42] . [00] . [05] . [0e] . [06] . [80] . [01] L [4c] . [80] . [19] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: B [42] 
0x42 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: S [53] 
0x53 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x43 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x67 , 10)
avrdude: Send: . [1b] C [43] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] g [67] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: C [43] 
0x43 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,170496,256)
block_size at addr 170496 is 256
STK500V2: stk500v2_loadaddr(-2147398400)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x4d 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x44 0x00 0x05 0x0e 0x06 0x80 0x01 0x4d 0x00 0x9e , 11)
avrdude: Send: . [1b] D [44] . [00] . [05] . [0e] . [06] . [80] . [01] M [4d] . [00] . [9e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: D [44] 
0x44 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: U [55] 
0x55 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x45 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x61 , 10)
avrdude: Send: . [1b] E [45] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] a [61] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: E [45] 
0x45 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: F [46] 
0x46 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,170752,256)
block_size at addr 170752 is 256
STK500V2: stk500v2_loadaddr(-2147398272)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x4d 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x46 0x00 0x05 0x0e 0x06 0x80 0x01 0x4d 0x80 0x1c , 11)
avrdude: Send: . [1b] F [46] . [00] . [05] . [0e] . [06] . [80] . [01] M [4d] . [80] . [1c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: F [46] 
0x46 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: W [57] 
0x57 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x47 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x63 , 10)
avrdude: Send: . [1b] G [47] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] c [63] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: G [47] 
0x47 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: D [44] 
0x44 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,171008,256)
block_size at addr 171008 is 256
STK500V2: stk500v2_loadaddr(-2147398144)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x4e 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x48 0x00 0x05 0x0e 0x06 0x80 0x01 0x4e 0x00 0x91 , 11)
avrdude: Send: . [1b] H [48] . [00] . [05] . [0e] . [06] . [80] . [01] N [4e] . [00] . [91] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: H [48] 
0x48 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Y [59] 
0x59 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x49 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6d , 10)
avrdude: Send: . [1b] I [49] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] m [6d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: I [49] 
0x49 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: J [4a] 
0x4a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,171264,256)
block_size at addr 171264 is 256
STK500V2: stk500v2_loadaddr(-2147398016)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x4e 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x4a 0x00 0x05 0x0e 0x06 0x80 0x01 0x4e 0x80 0x13 , 11)
avrdude: Send: . [1b] J [4a] . [00] . [05] . [0e] . [06] . [80] . [01] N [4e] . [80] . [13] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: J [4a] 
0x4a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: [ [5b] 
0x5b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6f , 10)
avrdude: Send: . [1b] K [4b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] o [6f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: K [4b] 
0x4b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,171520,256)
block_size at addr 171520 is 256
STK500V2: stk500v2_loadaddr(-2147397888)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x4f 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x4c 0x00 0x05 0x0e 0x06 0x80 0x01 0x4f 0x00 0x94 , 11)
avrdude: Send: . [1b] L [4c] . [00] . [05] . [0e] . [06] . [80] . [01] O [4f] . [00] . [94] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: L [4c] 
0x4c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ] [5d] 
0x5d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x69 , 10)
avrdude: Send: . [1b] M [4d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] i [69] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: M [4d] 
0x4d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: N [4e] 
0x4e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,171776,256)
block_size at addr 171776 is 256
STK500V2: stk500v2_loadaddr(-2147397760)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x4f 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x4e 0x00 0x05 0x0e 0x06 0x80 0x01 0x4f 0x80 0x16 , 11)
avrdude: Send: . [1b] N [4e] . [00] . [05] . [0e] . [06] . [80] . [01] O [4f] . [80] . [16] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: N [4e] 
0x4e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: _ [5f] 
0x5f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6b , 10)
avrdude: Send: . [1b] O [4f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] k [6b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: O [4f] 
0x4f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: L [4c] 
0x4c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,172032,256)
block_size at addr 172032 is 256
STK500V2: stk500v2_loadaddr(-2147397632)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x50 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x50 0x00 0x05 0x0e 0x06 0x80 0x01 0x50 0x00 0x97 , 11)
avrdude: Send: . [1b] P [50] . [00] . [05] . [0e] . [06] . [80] . [01] P [50] . [00] . [97] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: P [50] 
0x50 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x51 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x75 , 10)
avrdude: Send: . [1b] Q [51] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] u [75] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Q [51] 
0x51 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,172288,256)
block_size at addr 172288 is 256
STK500V2: stk500v2_loadaddr(-2147397504)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x50 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x52 0x00 0x05 0x0e 0x06 0x80 0x01 0x50 0x80 0x15 , 11)
avrdude: Send: . [1b] R [52] . [00] . [05] . [0e] . [06] . [80] . [01] P [50] . [80] . [15] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: R [52] 
0x52 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: C [43] 
0x43 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x53 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x77 , 10)
avrdude: Send: . [1b] S [53] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] w [77] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: S [53] 
0x53 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,172544,256)
block_size at addr 172544 is 256
STK500V2: stk500v2_loadaddr(-2147397376)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x51 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x54 0x00 0x05 0x0e 0x06 0x80 0x01 0x51 0x00 0x92 , 11)
avrdude: Send: . [1b] T [54] . [00] . [05] . [0e] . [06] . [80] . [01] Q [51] . [00] . [92] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: T [54] 
0x54 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x55 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x71 , 10)
avrdude: Send: . [1b] U [55] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] q [71] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: U [55] 
0x55 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,172800,256)
block_size at addr 172800 is 256
STK500V2: stk500v2_loadaddr(-2147397248)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x51 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x56 0x00 0x05 0x0e 0x06 0x80 0x01 0x51 0x80 0x10 , 11)
avrdude: Send: . [1b] V [56] . [00] . [05] . [0e] . [06] . [80] . [01] Q [51] . [80] . [10] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: V [56] 
0x56 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: G [47] 
0x47 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x57 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x73 , 10)
avrdude: Send: . [1b] W [57] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] s [73] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: W [57] 
0x57 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: T [54] 
0x54 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,173056,256)
block_size at addr 173056 is 256
STK500V2: stk500v2_loadaddr(-2147397120)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x52 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x58 0x00 0x05 0x0e 0x06 0x80 0x01 0x52 0x00 0x9d , 11)
avrdude: Send: . [1b] X [58] . [00] . [05] . [0e] . [06] . [80] . [01] R [52] . [00] . [9d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: X [58] 
0x58 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: I [49] 
0x49 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x59 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7d , 10)
avrdude: Send: . [1b] Y [59] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] } [7d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Y [59] 
0x59 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,173312,256)
block_size at addr 173312 is 256
STK500V2: stk500v2_loadaddr(-2147396992)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x52 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x5a 0x00 0x05 0x0e 0x06 0x80 0x01 0x52 0x80 0x1f , 11)
avrdude: Send: . [1b] Z [5a] . [00] . [05] . [0e] . [06] . [80] . [01] R [52] . [80] . [1f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Z [5a] 
0x5a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: K [4b] 
0x4b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7f , 10)
avrdude: Send: . [1b] [ [5b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [7f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: [ [5b] 
0x5b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: X [58] 
0x58 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,173568,256)
block_size at addr 173568 is 256
STK500V2: stk500v2_loadaddr(-2147396864)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x53 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x5c 0x00 0x05 0x0e 0x06 0x80 0x01 0x53 0x00 0x98 , 11)
avrdude: Send: . [1b] \ [5c] . [00] . [05] . [0e] . [06] . [80] . [01] S [53] . [00] . [98] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: \ [5c] 
0x5c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x79 , 10)
avrdude: Send: . [1b] ] [5d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] y [79] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ] [5d] 
0x5d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: ^ [5e] 
0x5e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,173824,256)
block_size at addr 173824 is 256
STK500V2: stk500v2_loadaddr(-2147396736)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x53 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x5e 0x00 0x05 0x0e 0x06 0x80 0x01 0x53 0x80 0x1a , 11)
avrdude: Send: . [1b] ^ [5e] . [00] . [05] . [0e] . [06] . [80] . [01] S [53] . [80] . [1a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ^ [5e] 
0x5e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: O [4f] 
0x4f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7b , 10)
avrdude: Send: . [1b] _ [5f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] { [7b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: _ [5f] 
0x5f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: \ [5c] 
0x5c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,174080,256)
block_size at addr 174080 is 256
STK500V2: stk500v2_loadaddr(-2147396608)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x54 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x60 0x00 0x05 0x0e 0x06 0x80 0x01 0x54 0x00 0xa3 , 11)
avrdude: Send: . [1b] ` [60] . [00] . [05] . [0e] . [06] . [80] . [01] T [54] . [00] . [a3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ` [60] 
0x60 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: q [71] 
0x71 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x61 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x45 , 10)
avrdude: Send: . [1b] a [61] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] E [45] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: a [61] 
0x61 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: b [62] 
0x62 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,174336,256)
block_size at addr 174336 is 256
STK500V2: stk500v2_loadaddr(-2147396480)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x54 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x62 0x00 0x05 0x0e 0x06 0x80 0x01 0x54 0x80 0x21 , 11)
avrdude: Send: . [1b] b [62] . [00] . [05] . [0e] . [06] . [80] . [01] T [54] . [80] ! [21] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: b [62] 
0x62 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: s [73] 
0x73 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x63 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x47 , 10)
avrdude: Send: . [1b] c [63] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] G [47] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: c [63] 
0x63 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: ` [60] 
0x60 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,174592,256)
block_size at addr 174592 is 256
STK500V2: stk500v2_loadaddr(-2147396352)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x55 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x64 0x00 0x05 0x0e 0x06 0x80 0x01 0x55 0x00 0xa6 , 11)
avrdude: Send: . [1b] d [64] . [00] . [05] . [0e] . [06] . [80] . [01] U [55] . [00] . [a6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: d [64] 
0x64 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: u [75] 
0x75 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x65 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x41 , 10)
avrdude: Send: . [1b] e [65] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] A [41] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: e [65] 
0x65 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: f [66] 
0x66 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,174848,256)
block_size at addr 174848 is 256
STK500V2: stk500v2_loadaddr(-2147396224)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x55 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x66 0x00 0x05 0x0e 0x06 0x80 0x01 0x55 0x80 0x24 , 11)
avrdude: Send: . [1b] f [66] . [00] . [05] . [0e] . [06] . [80] . [01] U [55] . [80] $ [24] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: f [66] 
0x66 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: w [77] 
0x77 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x67 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x43 , 10)
avrdude: Send: . [1b] g [67] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] C [43] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: g [67] 
0x67 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,175104,256)
block_size at addr 175104 is 256
STK500V2: stk500v2_loadaddr(-2147396096)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x56 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x68 0x00 0x05 0x0e 0x06 0x80 0x01 0x56 0x00 0xa9 , 11)
avrdude: Send: . [1b] h [68] . [00] . [05] . [0e] . [06] . [80] . [01] V [56] . [00] . [a9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: h [68] 
0x68 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: y [79] 
0x79 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x69 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4d , 10)
avrdude: Send: . [1b] i [69] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] M [4d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: i [69] 
0x69 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: j [6a] 
0x6a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,175360,256)
block_size at addr 175360 is 256
STK500V2: stk500v2_loadaddr(-2147395968)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x56 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x6a 0x00 0x05 0x0e 0x06 0x80 0x01 0x56 0x80 0x2b , 11)
avrdude: Send: . [1b] j [6a] . [00] . [05] . [0e] . [06] . [80] . [01] V [56] . [80] + [2b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: j [6a] 
0x6a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: { [7b] 
0x7b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4f , 10)
avrdude: Send: . [1b] k [6b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] O [4f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: k [6b] 
0x6b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: h [68] 
0x68 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,175616,256)
block_size at addr 175616 is 256
STK500V2: stk500v2_loadaddr(-2147395840)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x57 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x6c 0x00 0x05 0x0e 0x06 0x80 0x01 0x57 0x00 0xac , 11)
avrdude: Send: . [1b] l [6c] . [00] . [05] . [0e] . [06] . [80] . [01] W [57] . [00] . [ac] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: l [6c] 
0x6c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: } [7d] 
0x7d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x49 , 10)
avrdude: Send: . [1b] m [6d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] I [49] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: m [6d] 
0x6d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: n [6e] 
0x6e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,175872,256)
block_size at addr 175872 is 256
STK500V2: stk500v2_loadaddr(-2147395712)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x57 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x6e 0x00 0x05 0x0e 0x06 0x80 0x01 0x57 0x80 0x2e , 11)
avrdude: Send: . [1b] n [6e] . [00] . [05] . [0e] . [06] . [80] . [01] W [57] . [80] . [2e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: n [6e] 
0x6e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [7f] 
0x7f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4b , 10)
avrdude: Send: . [1b] o [6f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] K [4b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: o [6f] 
0x6f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: l [6c] 
0x6c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,176128,256)
block_size at addr 176128 is 256
STK500V2: stk500v2_loadaddr(-2147395584)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x58 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x70 0x00 0x05 0x0e 0x06 0x80 0x01 0x58 0x00 0xbf , 11)
avrdude: Send: . [1b] p [70] . [00] . [05] . [0e] . [06] . [80] . [01] X [58] . [00] . [bf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: p [70] 
0x70 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: a [61] 
0x61 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x71 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x55 , 10)
avrdude: Send: . [1b] q [71] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] U [55] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: q [71] 
0x71 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: r [72] 
0x72 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,176384,256)
block_size at addr 176384 is 256
STK500V2: stk500v2_loadaddr(-2147395456)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x58 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x72 0x00 0x05 0x0e 0x06 0x80 0x01 0x58 0x80 0x3d , 11)
avrdude: Send: . [1b] r [72] . [00] . [05] . [0e] . [06] . [80] . [01] X [58] . [80] = [3d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: r [72] 
0x72 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: c [63] 
0x63 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x73 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x57 , 10)
avrdude: Send: . [1b] s [73] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] W [57] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: s [73] 
0x73 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,176640,256)
block_size at addr 176640 is 256
STK500V2: stk500v2_loadaddr(-2147395328)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x59 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x74 0x00 0x05 0x0e 0x06 0x80 0x01 0x59 0x00 0xba , 11)
avrdude: Send: . [1b] t [74] . [00] . [05] . [0e] . [06] . [80] . [01] Y [59] . [00] . [ba] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: t [74] 
0x74 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: e [65] 
0x65 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x75 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x51 , 10)
avrdude: Send: . [1b] u [75] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] Q [51] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: u [75] 
0x75 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: v [76] 
0x76 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,176896,256)
block_size at addr 176896 is 256
STK500V2: stk500v2_loadaddr(-2147395200)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x59 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x76 0x00 0x05 0x0e 0x06 0x80 0x01 0x59 0x80 0x38 , 11)
avrdude: Send: . [1b] v [76] . [00] . [05] . [0e] . [06] . [80] . [01] Y [59] . [80] 8 [38] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: v [76] 
0x76 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: g [67] 
0x67 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x77 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x53 , 10)
avrdude: Send: . [1b] w [77] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] S [53] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: w [77] 
0x77 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: t [74] 
0x74 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,177152,256)
block_size at addr 177152 is 256
STK500V2: stk500v2_loadaddr(-2147395072)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x5a 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x78 0x00 0x05 0x0e 0x06 0x80 0x01 0x5a 0x00 0xb5 , 11)
avrdude: Send: . [1b] x [78] . [00] . [05] . [0e] . [06] . [80] . [01] Z [5a] . [00] . [b5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: x [78] 
0x78 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: i [69] 
0x69 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x79 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5d , 10)
avrdude: Send: . [1b] y [79] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ] [5d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: y [79] 
0x79 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: z [7a] 
0x7a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,177408,256)
block_size at addr 177408 is 256
STK500V2: stk500v2_loadaddr(-2147394944)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x5a 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x7a 0x00 0x05 0x0e 0x06 0x80 0x01 0x5a 0x80 0x37 , 11)
avrdude: Send: . [1b] z [7a] . [00] . [05] . [0e] . [06] . [80] . [01] Z [5a] . [80] 7 [37] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: z [7a] 
0x7a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: k [6b] 
0x6b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5f , 10)
avrdude: Send: . [1b] { [7b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] _ [5f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: { [7b] 
0x7b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: x [78] 
0x78 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,177664,256)
block_size at addr 177664 is 256
STK500V2: stk500v2_loadaddr(-2147394816)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x5b 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x7c 0x00 0x05 0x0e 0x06 0x80 0x01 0x5b 0x00 0xb0 , 11)
avrdude: Send: . [1b] | [7c] . [00] . [05] . [0e] . [06] . [80] . [01] [ [5b] . [00] . [b0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: | [7c] 
0x7c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: m [6d] 
0x6d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x59 , 10)
avrdude: Send: . [1b] } [7d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] Y [59] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: } [7d] 
0x7d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: ~ [7e] 
0x7e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,177920,256)
block_size at addr 177920 is 256
STK500V2: stk500v2_loadaddr(-2147394688)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x5b 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x7e 0x00 0x05 0x0e 0x06 0x80 0x01 0x5b 0x80 0x32 , 11)
avrdude: Send: . [1b] ~ [7e] . [00] . [05] . [0e] . [06] . [80] . [01] [ [5b] . [80] 2 [32] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ~ [7e] 
0x7e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: o [6f] 
0x6f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5b , 10)
avrdude: Send: . [1b] . [7f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] [ [5b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [7f] 
0x7f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: | [7c] 
0x7c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,178176,256)
block_size at addr 178176 is 256
STK500V2: stk500v2_loadaddr(-2147394560)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x5c 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x80 0x00 0x05 0x0e 0x06 0x80 0x01 0x5c 0x00 0x4b , 11)
avrdude: Send: . [1b] . [80] . [00] . [05] . [0e] . [06] . [80] . [01] \ [5c] . [00] K [4b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [80] 
0x80 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x81 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa5 , 10)
avrdude: Send: . [1b] . [81] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [81] 
0x81 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,178432,256)
block_size at addr 178432 is 256
STK500V2: stk500v2_loadaddr(-2147394432)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x5c 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x82 0x00 0x05 0x0e 0x06 0x80 0x01 0x5c 0x80 0xc9 , 11)
avrdude: Send: . [1b] . [82] . [00] . [05] . [0e] . [06] . [80] . [01] \ [5c] . [80] . [c9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [82] 
0x82 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x83 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa7 , 10)
avrdude: Send: . [1b] . [83] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [83] 
0x83 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,178688,256)
block_size at addr 178688 is 256
STK500V2: stk500v2_loadaddr(-2147394304)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x5d 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x84 0x00 0x05 0x0e 0x06 0x80 0x01 0x5d 0x00 0x4e , 11)
avrdude: Send: . [1b] . [84] . [00] . [05] . [0e] . [06] . [80] . [01] ] [5d] . [00] N [4e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [84] 
0x84 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [95] 
0x95 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x85 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa1 , 10)
avrdude: Send: . [1b] . [85] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [85] 
0x85 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,178944,256)
block_size at addr 178944 is 256
STK500V2: stk500v2_loadaddr(-2147394176)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x5d 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x86 0x00 0x05 0x0e 0x06 0x80 0x01 0x5d 0x80 0xcc , 11)
avrdude: Send: . [1b] . [86] . [00] . [05] . [0e] . [06] . [80] . [01] ] [5d] . [80] . [cc] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [86] 
0x86 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x87 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa3 , 10)
avrdude: Send: . [1b] . [87] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [87] 
0x87 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [84] 
0x84 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,179200,256)
block_size at addr 179200 is 256
STK500V2: stk500v2_loadaddr(-2147394048)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x5e 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x88 0x00 0x05 0x0e 0x06 0x80 0x01 0x5e 0x00 0x41 , 11)
avrdude: Send: . [1b] . [88] . [00] . [05] . [0e] . [06] . [80] . [01] ^ [5e] . [00] A [41] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [88] 
0x88 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [99] 
0x99 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x89 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xad , 10)
avrdude: Send: . [1b] . [89] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ad] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [89] 
0x89 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8a] 
0x8a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,179456,256)
block_size at addr 179456 is 256
STK500V2: stk500v2_loadaddr(-2147393920)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x5e 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x8a 0x00 0x05 0x0e 0x06 0x80 0x01 0x5e 0x80 0xc3 , 11)
avrdude: Send: . [1b] . [8a] . [00] . [05] . [0e] . [06] . [80] . [01] ^ [5e] . [80] . [c3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8a] 
0x8a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9b] 
0x9b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xaf , 10)
avrdude: Send: . [1b] . [8b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [af] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8b] 
0x8b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,179712,256)
block_size at addr 179712 is 256
STK500V2: stk500v2_loadaddr(-2147393792)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x5f 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x8c 0x00 0x05 0x0e 0x06 0x80 0x01 0x5f 0x00 0x44 , 11)
avrdude: Send: . [1b] . [8c] . [00] . [05] . [0e] . [06] . [80] . [01] _ [5f] . [00] D [44] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8c] 
0x8c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9d] 
0x9d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa9 , 10)
avrdude: Send: . [1b] . [8d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8d] 
0x8d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8e] 
0x8e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,179968,256)
block_size at addr 179968 is 256
STK500V2: stk500v2_loadaddr(-2147393664)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x5f 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x8e 0x00 0x05 0x0e 0x06 0x80 0x01 0x5f 0x80 0xc6 , 11)
avrdude: Send: . [1b] . [8e] . [00] . [05] . [0e] . [06] . [80] . [01] _ [5f] . [80] . [c6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8e] 
0x8e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xab , 10)
avrdude: Send: . [1b] . [8f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ab] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8f] 
0x8f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8c] 
0x8c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,180224,256)
block_size at addr 180224 is 256
STK500V2: stk500v2_loadaddr(-2147393536)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x60 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x90 0x00 0x05 0x0e 0x06 0x80 0x01 0x60 0x00 0x67 , 11)
avrdude: Send: . [1b] . [90] . [00] . [05] . [0e] . [06] . [80] . [01] ` [60] . [00] g [67] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [90] 
0x90 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x91 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb5 , 10)
avrdude: Send: . [1b] . [91] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [91] 
0x91 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [92] 
0x92 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,180480,256)
block_size at addr 180480 is 256
STK500V2: stk500v2_loadaddr(-2147393408)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x60 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x92 0x00 0x05 0x0e 0x06 0x80 0x01 0x60 0x80 0xe5 , 11)
avrdude: Send: . [1b] . [92] . [00] . [05] . [0e] . [06] . [80] . [01] ` [60] . [80] . [e5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [92] 
0x92 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [83] 
0x83 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x93 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb7 , 10)
avrdude: Send: . [1b] . [93] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [93] 
0x93 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,180736,256)
block_size at addr 180736 is 256
STK500V2: stk500v2_loadaddr(-2147393280)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x61 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x94 0x00 0x05 0x0e 0x06 0x80 0x01 0x61 0x00 0x62 , 11)
avrdude: Send: . [1b] . [94] . [00] . [05] . [0e] . [06] . [80] . [01] a [61] . [00] b [62] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [94] 
0x94 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [85] 
0x85 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x95 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb1 , 10)
avrdude: Send: . [1b] . [95] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [95] 
0x95 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [96] 
0x96 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,180992,256)
block_size at addr 180992 is 256
STK500V2: stk500v2_loadaddr(-2147393152)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x61 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x96 0x00 0x05 0x0e 0x06 0x80 0x01 0x61 0x80 0xe0 , 11)
avrdude: Send: . [1b] . [96] . [00] . [05] . [0e] . [06] . [80] . [01] a [61] . [80] . [e0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [96] 
0x96 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x97 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb3 , 10)
avrdude: Send: . [1b] . [97] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [97] 
0x97 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [94] 
0x94 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,181248,256)
block_size at addr 181248 is 256
STK500V2: stk500v2_loadaddr(-2147393024)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x62 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x98 0x00 0x05 0x0e 0x06 0x80 0x01 0x62 0x00 0x6d , 11)
avrdude: Send: . [1b] . [98] . [00] . [05] . [0e] . [06] . [80] . [01] b [62] . [00] m [6d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [98] 
0x98 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [89] 
0x89 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x99 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbd , 10)
avrdude: Send: . [1b] . [99] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [99] 
0x99 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9a] 
0x9a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,181504,256)
block_size at addr 181504 is 256
STK500V2: stk500v2_loadaddr(-2147392896)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x62 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x9a 0x00 0x05 0x0e 0x06 0x80 0x01 0x62 0x80 0xef , 11)
avrdude: Send: . [1b] . [9a] . [00] . [05] . [0e] . [06] . [80] . [01] b [62] . [80] . [ef] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9a] 
0x9a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8b] 
0x8b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbf , 10)
avrdude: Send: . [1b] . [9b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9b] 
0x9b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [98] 
0x98 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,181760,256)
block_size at addr 181760 is 256
STK500V2: stk500v2_loadaddr(-2147392768)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x63 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x9c 0x00 0x05 0x0e 0x06 0x80 0x01 0x63 0x00 0x68 , 11)
avrdude: Send: . [1b] . [9c] . [00] . [05] . [0e] . [06] . [80] . [01] c [63] . [00] h [68] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9c] 
0x9c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb9 , 10)
avrdude: Send: . [1b] . [9d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9d] 
0x9d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9e] 
0x9e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,182016,256)
block_size at addr 182016 is 256
STK500V2: stk500v2_loadaddr(-2147392640)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x63 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x9e 0x00 0x05 0x0e 0x06 0x80 0x01 0x63 0x80 0xea , 11)
avrdude: Send: . [1b] . [9e] . [00] . [05] . [0e] . [06] . [80] . [01] c [63] . [80] . [ea] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9e] 
0x9e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbb , 10)
avrdude: Send: . [1b] . [9f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9f] 
0x9f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9c] 
0x9c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,182272,256)
block_size at addr 182272 is 256
STK500V2: stk500v2_loadaddr(-2147392512)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x64 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa0 0x00 0x05 0x0e 0x06 0x80 0x01 0x64 0x00 0x53 , 11)
avrdude: Send: . [1b] . [a0] . [00] . [05] . [0e] . [06] . [80] . [01] d [64] . [00] S [53] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a0] 
0xa0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b1] 
0xb1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x85 , 10)
avrdude: Send: . [1b] . [a1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [85] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a1] 
0xa1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a2] 
0xa2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,182528,256)
block_size at addr 182528 is 256
STK500V2: stk500v2_loadaddr(-2147392384)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x64 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xa2 0x00 0x05 0x0e 0x06 0x80 0x01 0x64 0x80 0xd1 , 11)
avrdude: Send: . [1b] . [a2] . [00] . [05] . [0e] . [06] . [80] . [01] d [64] . [80] . [d1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a2] 
0xa2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b3] 
0xb3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x87 , 10)
avrdude: Send: . [1b] . [a3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [87] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a3] 
0xa3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a0] 
0xa0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,182784,256)
block_size at addr 182784 is 256
STK500V2: stk500v2_loadaddr(-2147392256)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x65 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa4 0x00 0x05 0x0e 0x06 0x80 0x01 0x65 0x00 0x56 , 11)
avrdude: Send: . [1b] . [a4] . [00] . [05] . [0e] . [06] . [80] . [01] e [65] . [00] V [56] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a4] 
0xa4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b5] 
0xb5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x81 , 10)
avrdude: Send: . [1b] . [a5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [81] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a5] 
0xa5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a6] 
0xa6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,183040,256)
block_size at addr 183040 is 256
STK500V2: stk500v2_loadaddr(-2147392128)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x65 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xa6 0x00 0x05 0x0e 0x06 0x80 0x01 0x65 0x80 0xd4 , 11)
avrdude: Send: . [1b] . [a6] . [00] . [05] . [0e] . [06] . [80] . [01] e [65] . [80] . [d4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a6] 
0xa6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b7] 
0xb7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x83 , 10)
avrdude: Send: . [1b] . [a7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [83] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a7] 
0xa7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a4] 
0xa4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,183296,256)
block_size at addr 183296 is 256
STK500V2: stk500v2_loadaddr(-2147392000)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x66 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa8 0x00 0x05 0x0e 0x06 0x80 0x01 0x66 0x00 0x59 , 11)
avrdude: Send: . [1b] . [a8] . [00] . [05] . [0e] . [06] . [80] . [01] f [66] . [00] Y [59] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a8] 
0xa8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b9] 
0xb9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8d , 10)
avrdude: Send: . [1b] . [a9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a9] 
0xa9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [aa] 
0xaa 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,183552,256)
block_size at addr 183552 is 256
STK500V2: stk500v2_loadaddr(-2147391872)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x66 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xaa 0x00 0x05 0x0e 0x06 0x80 0x01 0x66 0x80 0xdb , 11)
avrdude: Send: . [1b] . [aa] . [00] . [05] . [0e] . [06] . [80] . [01] f [66] . [80] . [db] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [aa] 
0xaa hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bb] 
0xbb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xab 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8f , 10)
avrdude: Send: . [1b] . [ab] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ab] 
0xab hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a8] 
0xa8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,183808,256)
block_size at addr 183808 is 256
STK500V2: stk500v2_loadaddr(-2147391744)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x67 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xac 0x00 0x05 0x0e 0x06 0x80 0x01 0x67 0x00 0x5c , 11)
avrdude: Send: . [1b] . [ac] . [00] . [05] . [0e] . [06] . [80] . [01] g [67] . [00] \ [5c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ac] 
0xac hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bd] 
0xbd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xad 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x89 , 10)
avrdude: Send: . [1b] . [ad] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [89] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ad] 
0xad hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ae] 
0xae 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,184064,256)
block_size at addr 184064 is 256
STK500V2: stk500v2_loadaddr(-2147391616)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x67 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xae 0x00 0x05 0x0e 0x06 0x80 0x01 0x67 0x80 0xde , 11)
avrdude: Send: . [1b] . [ae] . [00] . [05] . [0e] . [06] . [80] . [01] g [67] . [80] . [de] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ae] 
0xae hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bf] 
0xbf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xaf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8b , 10)
avrdude: Send: . [1b] . [af] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [af] 
0xaf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ac] 
0xac 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,184320,256)
block_size at addr 184320 is 256
STK500V2: stk500v2_loadaddr(-2147391488)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x68 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb0 0x00 0x05 0x0e 0x06 0x80 0x01 0x68 0x00 0x4f , 11)
avrdude: Send: . [1b] . [b0] . [00] . [05] . [0e] . [06] . [80] . [01] h [68] . [00] O [4f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b0] 
0xb0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a1] 
0xa1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x95 , 10)
avrdude: Send: . [1b] . [b1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [95] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b1] 
0xb1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b2] 
0xb2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,184576,256)
block_size at addr 184576 is 256
STK500V2: stk500v2_loadaddr(-2147391360)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x68 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xb2 0x00 0x05 0x0e 0x06 0x80 0x01 0x68 0x80 0xcd , 11)
avrdude: Send: . [1b] . [b2] . [00] . [05] . [0e] . [06] . [80] . [01] h [68] . [80] . [cd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b2] 
0xb2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a3] 
0xa3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x97 , 10)
avrdude: Send: . [1b] . [b3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [97] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b3] 
0xb3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b0] 
0xb0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,184832,256)
block_size at addr 184832 is 256
STK500V2: stk500v2_loadaddr(-2147391232)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x69 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb4 0x00 0x05 0x0e 0x06 0x80 0x01 0x69 0x00 0x4a , 11)
avrdude: Send: . [1b] . [b4] . [00] . [05] . [0e] . [06] . [80] . [01] i [69] . [00] J [4a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b4] 
0xb4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a5] 
0xa5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x91 , 10)
avrdude: Send: . [1b] . [b5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [91] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b5] 
0xb5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b6] 
0xb6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,185088,256)
block_size at addr 185088 is 256
STK500V2: stk500v2_loadaddr(-2147391104)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x69 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xb6 0x00 0x05 0x0e 0x06 0x80 0x01 0x69 0x80 0xc8 , 11)
avrdude: Send: . [1b] . [b6] . [00] . [05] . [0e] . [06] . [80] . [01] i [69] . [80] . [c8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b6] 
0xb6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a7] 
0xa7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x93 , 10)
avrdude: Send: . [1b] . [b7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [93] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b7] 
0xb7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b4] 
0xb4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,185344,256)
block_size at addr 185344 is 256
STK500V2: stk500v2_loadaddr(-2147390976)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x6a 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb8 0x00 0x05 0x0e 0x06 0x80 0x01 0x6a 0x00 0x45 , 11)
avrdude: Send: . [1b] . [b8] . [00] . [05] . [0e] . [06] . [80] . [01] j [6a] . [00] E [45] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b8] 
0xb8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a9] 
0xa9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9d , 10)
avrdude: Send: . [1b] . [b9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b9] 
0xb9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ba] 
0xba 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,185600,256)
block_size at addr 185600 is 256
STK500V2: stk500v2_loadaddr(-2147390848)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x6a 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xba 0x00 0x05 0x0e 0x06 0x80 0x01 0x6a 0x80 0xc7 , 11)
avrdude: Send: . [1b] . [ba] . [00] . [05] . [0e] . [06] . [80] . [01] j [6a] . [80] . [c7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ba] 
0xba hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ab] 
0xab 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9f , 10)
avrdude: Send: . [1b] . [bb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bb] 
0xbb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b8] 
0xb8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,185856,256)
block_size at addr 185856 is 256
STK500V2: stk500v2_loadaddr(-2147390720)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x6b 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xbc 0x00 0x05 0x0e 0x06 0x80 0x01 0x6b 0x00 0x40 , 11)
avrdude: Send: . [1b] . [bc] . [00] . [05] . [0e] . [06] . [80] . [01] k [6b] . [00] @ [40] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bc] 
0xbc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ad] 
0xad 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x99 , 10)
avrdude: Send: . [1b] . [bd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [99] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bd] 
0xbd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [be] 
0xbe 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,186112,256)
block_size at addr 186112 is 256
STK500V2: stk500v2_loadaddr(-2147390592)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x6b 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xbe 0x00 0x05 0x0e 0x06 0x80 0x01 0x6b 0x80 0xc2 , 11)
avrdude: Send: . [1b] . [be] . [00] . [05] . [0e] . [06] . [80] . [01] k [6b] . [80] . [c2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [be] 
0xbe hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [af] 
0xaf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9b , 10)
avrdude: Send: . [1b] . [bf] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bf] 
0xbf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bc] 
0xbc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,186368,256)
block_size at addr 186368 is 256
STK500V2: stk500v2_loadaddr(-2147390464)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x6c 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc0 0x00 0x05 0x0e 0x06 0x80 0x01 0x6c 0x00 0x3b , 11)
avrdude: Send: . [1b] . [c0] . [00] . [05] . [0e] . [06] . [80] . [01] l [6c] . [00] ; [3b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c0] 
0xc0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d1] 
0xd1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe5 , 10)
avrdude: Send: . [1b] . [c1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c1] 
0xc1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c2] 
0xc2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,186624,256)
block_size at addr 186624 is 256
STK500V2: stk500v2_loadaddr(-2147390336)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x6c 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xc2 0x00 0x05 0x0e 0x06 0x80 0x01 0x6c 0x80 0xb9 , 11)
avrdude: Send: . [1b] . [c2] . [00] . [05] . [0e] . [06] . [80] . [01] l [6c] . [80] . [b9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c2] 
0xc2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d3] 
0xd3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe7 , 10)
avrdude: Send: . [1b] . [c3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c3] 
0xc3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,186880,256)
block_size at addr 186880 is 256
STK500V2: stk500v2_loadaddr(-2147390208)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x6d 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc4 0x00 0x05 0x0e 0x06 0x80 0x01 0x6d 0x00 0x3e , 11)
avrdude: Send: . [1b] . [c4] . [00] . [05] . [0e] . [06] . [80] . [01] m [6d] . [00] > [3e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c4] 
0xc4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d5] 
0xd5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe1 , 10)
avrdude: Send: . [1b] . [c5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c5] 
0xc5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c6] 
0xc6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,187136,256)
block_size at addr 187136 is 256
STK500V2: stk500v2_loadaddr(-2147390080)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x6d 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xc6 0x00 0x05 0x0e 0x06 0x80 0x01 0x6d 0x80 0xbc , 11)
avrdude: Send: . [1b] . [c6] . [00] . [05] . [0e] . [06] . [80] . [01] m [6d] . [80] . [bc] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c6] 
0xc6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d7] 
0xd7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe3 , 10)
avrdude: Send: . [1b] . [c7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c7] 
0xc7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c4] 
0xc4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,187392,256)
block_size at addr 187392 is 256
STK500V2: stk500v2_loadaddr(-2147389952)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x6e 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc8 0x00 0x05 0x0e 0x06 0x80 0x01 0x6e 0x00 0x31 , 11)
avrdude: Send: . [1b] . [c8] . [00] . [05] . [0e] . [06] . [80] . [01] n [6e] . [00] 1 [31] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c8] 
0xc8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d9] 
0xd9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xed , 10)
avrdude: Send: . [1b] . [c9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ed] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c9] 
0xc9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ca] 
0xca 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,187648,256)
block_size at addr 187648 is 256
STK500V2: stk500v2_loadaddr(-2147389824)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x6e 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xca 0x00 0x05 0x0e 0x06 0x80 0x01 0x6e 0x80 0xb3 , 11)
avrdude: Send: . [1b] . [ca] . [00] . [05] . [0e] . [06] . [80] . [01] n [6e] . [80] . [b3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ca] 
0xca hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [db] 
0xdb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xef , 10)
avrdude: Send: . [1b] . [cb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ef] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cb] 
0xcb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,187904,256)
block_size at addr 187904 is 256
STK500V2: stk500v2_loadaddr(-2147389696)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x6f 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xcc 0x00 0x05 0x0e 0x06 0x80 0x01 0x6f 0x00 0x34 , 11)
avrdude: Send: . [1b] . [cc] . [00] . [05] . [0e] . [06] . [80] . [01] o [6f] . [00] 4 [34] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cc] 
0xcc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [dd] 
0xdd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe9 , 10)
avrdude: Send: . [1b] . [cd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cd] 
0xcd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ce] 
0xce 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,188160,256)
block_size at addr 188160 is 256
STK500V2: stk500v2_loadaddr(-2147389568)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x6f 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xce 0x00 0x05 0x0e 0x06 0x80 0x01 0x6f 0x80 0xb6 , 11)
avrdude: Send: . [1b] . [ce] . [00] . [05] . [0e] . [06] . [80] . [01] o [6f] . [80] . [b6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ce] 
0xce hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [df] 
0xdf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xeb , 10)
avrdude: Send: . [1b] . [cf] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [eb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cf] 
0xcf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cc] 
0xcc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,188416,256)
block_size at addr 188416 is 256
STK500V2: stk500v2_loadaddr(-2147389440)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x70 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd0 0x00 0x05 0x0e 0x06 0x80 0x01 0x70 0x00 0x37 , 11)
avrdude: Send: . [1b] . [d0] . [00] . [05] . [0e] . [06] . [80] . [01] p [70] . [00] 7 [37] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d0] 
0xd0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c1] 
0xc1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf5 , 10)
avrdude: Send: . [1b] . [d1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d1] 
0xd1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d2] 
0xd2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,188672,256)
block_size at addr 188672 is 256
STK500V2: stk500v2_loadaddr(-2147389312)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x70 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xd2 0x00 0x05 0x0e 0x06 0x80 0x01 0x70 0x80 0xb5 , 11)
avrdude: Send: . [1b] . [d2] . [00] . [05] . [0e] . [06] . [80] . [01] p [70] . [80] . [b5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d2] 
0xd2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c3] 
0xc3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf7 , 10)
avrdude: Send: . [1b] . [d3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d3] 
0xd3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,188928,256)
block_size at addr 188928 is 256
STK500V2: stk500v2_loadaddr(-2147389184)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x71 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd4 0x00 0x05 0x0e 0x06 0x80 0x01 0x71 0x00 0x32 , 11)
avrdude: Send: . [1b] . [d4] . [00] . [05] . [0e] . [06] . [80] . [01] q [71] . [00] 2 [32] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d4] 
0xd4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c5] 
0xc5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf1 , 10)
avrdude: Send: . [1b] . [d5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d5] 
0xd5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d6] 
0xd6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,189184,256)
block_size at addr 189184 is 256
STK500V2: stk500v2_loadaddr(-2147389056)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x71 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xd6 0x00 0x05 0x0e 0x06 0x80 0x01 0x71 0x80 0xb0 , 11)
avrdude: Send: . [1b] . [d6] . [00] . [05] . [0e] . [06] . [80] . [01] q [71] . [80] . [b0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d6] 
0xd6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c7] 
0xc7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf3 , 10)
avrdude: Send: . [1b] . [d7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d7] 
0xd7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d4] 
0xd4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,189440,256)
block_size at addr 189440 is 256
STK500V2: stk500v2_loadaddr(-2147388928)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x72 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd8 0x00 0x05 0x0e 0x06 0x80 0x01 0x72 0x00 0x3d , 11)
avrdude: Send: . [1b] . [d8] . [00] . [05] . [0e] . [06] . [80] . [01] r [72] . [00] = [3d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d8] 
0xd8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c9] 
0xc9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xfd , 10)
avrdude: Send: . [1b] . [d9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [fd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d9] 
0xd9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [da] 
0xda 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,189696,256)
block_size at addr 189696 is 256
STK500V2: stk500v2_loadaddr(-2147388800)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x72 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xda 0x00 0x05 0x0e 0x06 0x80 0x01 0x72 0x80 0xbf , 11)
avrdude: Send: . [1b] . [da] . [00] . [05] . [0e] . [06] . [80] . [01] r [72] . [80] . [bf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [da] 
0xda hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cb] 
0xcb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xff , 10)
avrdude: Send: . [1b] . [db] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ff] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [db] 
0xdb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d8] 
0xd8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,189952,256)
block_size at addr 189952 is 256
STK500V2: stk500v2_loadaddr(-2147388672)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x73 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xdc 0x00 0x05 0x0e 0x06 0x80 0x01 0x73 0x00 0x38 , 11)
avrdude: Send: . [1b] . [dc] . [00] . [05] . [0e] . [06] . [80] . [01] s [73] . [00] 8 [38] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [dc] 
0xdc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cd] 
0xcd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf9 , 10)
avrdude: Send: . [1b] . [dd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [dd] 
0xdd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [de] 
0xde 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,190208,256)
block_size at addr 190208 is 256
STK500V2: stk500v2_loadaddr(-2147388544)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x73 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xde 0x00 0x05 0x0e 0x06 0x80 0x01 0x73 0x80 0xba , 11)
avrdude: Send: . [1b] . [de] . [00] . [05] . [0e] . [06] . [80] . [01] s [73] . [80] . [ba] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [de] 
0xde hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cf] 
0xcf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xfb , 10)
avrdude: Send: . [1b] . [df] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [fb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [df] 
0xdf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [dc] 
0xdc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,190464,256)
block_size at addr 190464 is 256
STK500V2: stk500v2_loadaddr(-2147388416)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x74 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe0 0x00 0x05 0x0e 0x06 0x80 0x01 0x74 0x00 0x03 , 11)
avrdude: Send: . [1b] . [e0] . [00] . [05] . [0e] . [06] . [80] . [01] t [74] . [00] . [03] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e0] 
0xe0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f1] 
0xf1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc5 , 10)
avrdude: Send: . [1b] . [e1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e1] 
0xe1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e2] 
0xe2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,190720,256)
block_size at addr 190720 is 256
STK500V2: stk500v2_loadaddr(-2147388288)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x74 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xe2 0x00 0x05 0x0e 0x06 0x80 0x01 0x74 0x80 0x81 , 11)
avrdude: Send: . [1b] . [e2] . [00] . [05] . [0e] . [06] . [80] . [01] t [74] . [80] . [81] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e2] 
0xe2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f3] 
0xf3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc7 , 10)
avrdude: Send: . [1b] . [e3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e3] 
0xe3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,190976,256)
block_size at addr 190976 is 256
STK500V2: stk500v2_loadaddr(-2147388160)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x75 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe4 0x00 0x05 0x0e 0x06 0x80 0x01 0x75 0x00 0x06 , 11)
avrdude: Send: . [1b] . [e4] . [00] . [05] . [0e] . [06] . [80] . [01] u [75] . [00] . [06] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e4] 
0xe4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f5] 
0xf5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc1 , 10)
avrdude: Send: . [1b] . [e5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e5] 
0xe5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e6] 
0xe6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,191232,256)
block_size at addr 191232 is 256
STK500V2: stk500v2_loadaddr(-2147388032)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x75 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xe6 0x00 0x05 0x0e 0x06 0x80 0x01 0x75 0x80 0x84 , 11)
avrdude: Send: . [1b] . [e6] . [00] . [05] . [0e] . [06] . [80] . [01] u [75] . [80] . [84] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e6] 
0xe6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f7] 
0xf7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc3 , 10)
avrdude: Send: . [1b] . [e7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e7] 
0xe7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e4] 
0xe4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,191488,256)
block_size at addr 191488 is 256
STK500V2: stk500v2_loadaddr(-2147387904)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x76 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe8 0x00 0x05 0x0e 0x06 0x80 0x01 0x76 0x00 0x09 , 11)
avrdude: Send: . [1b] . [e8] . [00] . [05] . [0e] . [06] . [80] . [01] v [76] . [00] . [09] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e8] 
0xe8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f9] 
0xf9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcd , 10)
avrdude: Send: . [1b] . [e9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e9] 
0xe9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ea] 
0xea 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,191744,256)
block_size at addr 191744 is 256
STK500V2: stk500v2_loadaddr(-2147387776)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x76 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xea 0x00 0x05 0x0e 0x06 0x80 0x01 0x76 0x80 0x8b , 11)
avrdude: Send: . [1b] . [ea] . [00] . [05] . [0e] . [06] . [80] . [01] v [76] . [80] . [8b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ea] 
0xea hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fb] 
0xfb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xeb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcf , 10)
avrdude: Send: . [1b] . [eb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [eb] 
0xeb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e8] 
0xe8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,192000,256)
block_size at addr 192000 is 256
STK500V2: stk500v2_loadaddr(-2147387648)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x77 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xec 0x00 0x05 0x0e 0x06 0x80 0x01 0x77 0x00 0x0c , 11)
avrdude: Send: . [1b] . [ec] . [00] . [05] . [0e] . [06] . [80] . [01] w [77] . [00] . [0c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ec] 
0xec hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fd] 
0xfd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xed 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc9 , 10)
avrdude: Send: . [1b] . [ed] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ed] 
0xed hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ee] 
0xee 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,192256,256)
block_size at addr 192256 is 256
STK500V2: stk500v2_loadaddr(-2147387520)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x77 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xee 0x00 0x05 0x0e 0x06 0x80 0x01 0x77 0x80 0x8e , 11)
avrdude: Send: . [1b] . [ee] . [00] . [05] . [0e] . [06] . [80] . [01] w [77] . [80] . [8e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ee] 
0xee hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xef 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcb , 10)
avrdude: Send: . [1b] . [ef] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ef] 
0xef hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ec] 
0xec 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,192512,256)
block_size at addr 192512 is 256
STK500V2: stk500v2_loadaddr(-2147387392)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x78 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf0 0x00 0x05 0x0e 0x06 0x80 0x01 0x78 0x00 0x1f , 11)
avrdude: Send: . [1b] . [f0] . [00] . [05] . [0e] . [06] . [80] . [01] x [78] . [00] . [1f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f0] 
0xf0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e1] 
0xe1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd5 , 10)
avrdude: Send: . [1b] . [f1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f1] 
0xf1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f2] 
0xf2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,192768,256)
block_size at addr 192768 is 256
STK500V2: stk500v2_loadaddr(-2147387264)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x78 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xf2 0x00 0x05 0x0e 0x06 0x80 0x01 0x78 0x80 0x9d , 11)
avrdude: Send: . [1b] . [f2] . [00] . [05] . [0e] . [06] . [80] . [01] x [78] . [80] . [9d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f2] 
0xf2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e3] 
0xe3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd7 , 10)
avrdude: Send: . [1b] . [f3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f3] 
0xf3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f0] 
0xf0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,193024,256)
block_size at addr 193024 is 256
STK500V2: stk500v2_loadaddr(-2147387136)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x79 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf4 0x00 0x05 0x0e 0x06 0x80 0x01 0x79 0x00 0x1a , 11)
avrdude: Send: . [1b] . [f4] . [00] . [05] . [0e] . [06] . [80] . [01] y [79] . [00] . [1a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f4] 
0xf4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e5] 
0xe5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd1 , 10)
avrdude: Send: . [1b] . [f5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f5] 
0xf5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f6] 
0xf6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,193280,256)
block_size at addr 193280 is 256
STK500V2: stk500v2_loadaddr(-2147387008)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x79 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xf6 0x00 0x05 0x0e 0x06 0x80 0x01 0x79 0x80 0x98 , 11)
avrdude: Send: . [1b] . [f6] . [00] . [05] . [0e] . [06] . [80] . [01] y [79] . [80] . [98] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f6] 
0xf6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e7] 
0xe7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd3 , 10)
avrdude: Send: . [1b] . [f7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f7] 
0xf7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f4] 
0xf4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,193536,256)
block_size at addr 193536 is 256
STK500V2: stk500v2_loadaddr(-2147386880)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x7a 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf8 0x00 0x05 0x0e 0x06 0x80 0x01 0x7a 0x00 0x15 , 11)
avrdude: Send: . [1b] . [f8] . [00] . [05] . [0e] . [06] . [80] . [01] z [7a] . [00] . [15] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f8] 
0xf8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e9] 
0xe9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdd , 10)
avrdude: Send: . [1b] . [f9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [dd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f9] 
0xf9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fa] 
0xfa 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,193792,256)
block_size at addr 193792 is 256
STK500V2: stk500v2_loadaddr(-2147386752)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x7a 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xfa 0x00 0x05 0x0e 0x06 0x80 0x01 0x7a 0x80 0x97 , 11)
avrdude: Send: . [1b] . [fa] . [00] . [05] . [0e] . [06] . [80] . [01] z [7a] . [80] . [97] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fa] 
0xfa hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [eb] 
0xeb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xfb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdf , 10)
avrdude: Send: . [1b] . [fb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [df] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fb] 
0xfb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,194048,256)
block_size at addr 194048 is 256
STK500V2: stk500v2_loadaddr(-2147386624)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x7b 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xfc 0x00 0x05 0x0e 0x06 0x80 0x01 0x7b 0x00 0x10 , 11)
avrdude: Send: . [1b] . [fc] . [00] . [05] . [0e] . [06] . [80] . [01] { [7b] . [00] . [10] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fc] 
0xfc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ed] 
0xed 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xfd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd9 , 10)
avrdude: Send: . [1b] . [fd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fd] 
0xfd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fe] 
0xfe 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,194304,256)
block_size at addr 194304 is 256
STK500V2: stk500v2_loadaddr(-2147386496)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x7b 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xfe 0x00 0x05 0x0e 0x06 0x80 0x01 0x7b 0x80 0x92 , 11)
avrdude: Send: . [1b] . [fe] . [00] . [05] . [0e] . [06] . [80] . [01] { [7b] . [80] . [92] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fe] 
0xfe hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ef] 
0xef 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xff 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdb , 10)
avrdude: Send: . [1b] . [ff] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [db] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ff] 
0xff hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fc] 
0xfc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,194560,256)
block_size at addr 194560 is 256
STK500V2: stk500v2_loadaddr(-2147386368)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x7c 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x00 0x00 0x05 0x0e 0x06 0x80 0x01 0x7c 0x00 0xeb , 11)
avrdude: Send: . [1b] . [00] . [00] . [05] . [0e] . [06] . [80] . [01] | [7c] . [00] . [eb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [00] 
0x00 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x01 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x25 , 10)
avrdude: Send: . [1b] . [01] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] % [25] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [01] 
0x01 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [02] 
0x02 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,194816,256)
block_size at addr 194816 is 256
STK500V2: stk500v2_loadaddr(-2147386240)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x7c 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x02 0x00 0x05 0x0e 0x06 0x80 0x01 0x7c 0x80 0x69 , 11)
avrdude: Send: . [1b] . [02] . [00] . [05] . [0e] . [06] . [80] . [01] | [7c] . [80] i [69] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [02] 
0x02 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [13] 
0x13 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x03 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x27 , 10)
avrdude: Send: . [1b] . [03] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ' [27] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [03] 
0x03 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,195072,256)
block_size at addr 195072 is 256
STK500V2: stk500v2_loadaddr(-2147386112)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x7d 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x04 0x00 0x05 0x0e 0x06 0x80 0x01 0x7d 0x00 0xee , 11)
avrdude: Send: . [1b] . [04] . [00] . [05] . [0e] . [06] . [80] . [01] } [7d] . [00] . [ee] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [04] 
0x04 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [15] 
0x15 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x05 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x21 , 10)
avrdude: Send: . [1b] . [05] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ! [21] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [05] 
0x05 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,195328,256)
block_size at addr 195328 is 256
STK500V2: stk500v2_loadaddr(-2147385984)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x7d 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x06 0x00 0x05 0x0e 0x06 0x80 0x01 0x7d 0x80 0x6c , 11)
avrdude: Send: . [1b] . [06] . [00] . [05] . [0e] . [06] . [80] . [01] } [7d] . [80] l [6c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [06] 
0x06 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [17] 
0x17 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x07 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x23 , 10)
avrdude: Send: . [1b] . [07] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] # [23] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [07] 
0x07 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [04] 
0x04 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,195584,256)
block_size at addr 195584 is 256
STK500V2: stk500v2_loadaddr(-2147385856)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x7e 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x08 0x00 0x05 0x0e 0x06 0x80 0x01 0x7e 0x00 0xe1 , 11)
avrdude: Send: . [1b] . [08] . [00] . [05] . [0e] . [06] . [80] . [01] ~ [7e] . [00] . [e1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [08] 
0x08 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [19] 
0x19 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x09 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2d , 10)
avrdude: Send: . [1b] . [09] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] - [2d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [09] 
0x09 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0a] 
0x0a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,195840,256)
block_size at addr 195840 is 256
STK500V2: stk500v2_loadaddr(-2147385728)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x7e 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x0a 0x00 0x05 0x0e 0x06 0x80 0x01 0x7e 0x80 0x63 , 11)
avrdude: Send: . [1b] . [0a] . [00] . [05] . [0e] . [06] . [80] . [01] ~ [7e] . [80] c [63] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0a] 
0x0a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1b] 
0x1b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2f , 10)
avrdude: Send: . [1b] . [0b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] / [2f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0b] 
0x0b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,196096,256)
block_size at addr 196096 is 256
STK500V2: stk500v2_loadaddr(-2147385600)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x7f 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x0c 0x00 0x05 0x0e 0x06 0x80 0x01 0x7f 0x00 0xe4 , 11)
avrdude: Send: . [1b] . [0c] . [00] . [05] . [0e] . [06] . [80] . [01] . [7f] . [00] . [e4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0c] 
0x0c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1d] 
0x1d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x29 , 10)
avrdude: Send: . [1b] . [0d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ) [29] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0d] 
0x0d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,196352,256)
block_size at addr 196352 is 256
STK500V2: stk500v2_loadaddr(-2147385472)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x7f 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x0e 0x00 0x05 0x0e 0x06 0x80 0x01 0x7f 0x80 0x66 , 11)
avrdude: Send: . [1b] . [0e] . [00] . [05] . [0e] . [06] . [80] . [01] . [7f] . [80] f [66] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0e] 
0x0e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1f] 
0x1f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2b , 10)
avrdude: Send: . [1b] . [0f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] + [2b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0f] 
0x0f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,196608,256)
block_size at addr 196608 is 256
STK500V2: stk500v2_loadaddr(-2147385344)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x80 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x10 0x00 0x05 0x0e 0x06 0x80 0x01 0x80 0x00 0x07 , 11)
avrdude: Send: . [1b] . [10] . [00] . [05] . [0e] . [06] . [80] . [01] . [80] . [00] . [07] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [10] 
0x10 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x11 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x35 , 10)
avrdude: Send: . [1b] . [11] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 5 [35] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [11] 
0x11 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [12] 
0x12 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,196864,256)
block_size at addr 196864 is 256
STK500V2: stk500v2_loadaddr(-2147385216)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x80 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x12 0x00 0x05 0x0e 0x06 0x80 0x01 0x80 0x80 0x85 , 11)
avrdude: Send: . [1b] . [12] . [00] . [05] . [0e] . [06] . [80] . [01] . [80] . [80] . [85] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [12] 
0x12 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x13 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x37 , 10)
avrdude: Send: . [1b] . [13] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 7 [37] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [13] 
0x13 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,197120,256)
block_size at addr 197120 is 256
STK500V2: stk500v2_loadaddr(-2147385088)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x81 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x14 0x00 0x05 0x0e 0x06 0x80 0x01 0x81 0x00 0x02 , 11)
avrdude: Send: . [1b] . [14] . [00] . [05] . [0e] . [06] . [80] . [01] . [81] . [00] . [02] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [14] 
0x14 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [05] 
0x05 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x15 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x31 , 10)
avrdude: Send: . [1b] . [15] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 1 [31] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [15] 
0x15 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [16] 
0x16 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,197376,256)
block_size at addr 197376 is 256
STK500V2: stk500v2_loadaddr(-2147384960)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x81 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x16 0x00 0x05 0x0e 0x06 0x80 0x01 0x81 0x80 0x80 , 11)
avrdude: Send: . [1b] . [16] . [00] . [05] . [0e] . [06] . [80] . [01] . [81] . [80] . [80] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [16] 
0x16 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [07] 
0x07 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x17 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x33 , 10)
avrdude: Send: . [1b] . [17] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 3 [33] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [17] 
0x17 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [14] 
0x14 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,197632,256)
block_size at addr 197632 is 256
STK500V2: stk500v2_loadaddr(-2147384832)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x82 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x18 0x00 0x05 0x0e 0x06 0x80 0x01 0x82 0x00 0x0d , 11)
avrdude: Send: . [1b] . [18] . [00] . [05] . [0e] . [06] . [80] . [01] . [82] . [00] . [0d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [18] 
0x18 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [09] 
0x09 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x19 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3d , 10)
avrdude: Send: . [1b] . [19] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] = [3d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [19] 
0x19 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1a] 
0x1a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,197888,256)
block_size at addr 197888 is 256
STK500V2: stk500v2_loadaddr(-2147384704)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x82 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x1a 0x00 0x05 0x0e 0x06 0x80 0x01 0x82 0x80 0x8f , 11)
avrdude: Send: . [1b] . [1a] . [00] . [05] . [0e] . [06] . [80] . [01] . [82] . [80] . [8f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1a] 
0x1a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0b] 
0x0b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3f , 10)
avrdude: Send: . [1b] . [1b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ? [3f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1b] 
0x1b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [18] 
0x18 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,198144,256)
block_size at addr 198144 is 256
STK500V2: stk500v2_loadaddr(-2147384576)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x83 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x1c 0x00 0x05 0x0e 0x06 0x80 0x01 0x83 0x00 0x08 , 11)
avrdude: Send: . [1b] . [1c] . [00] . [05] . [0e] . [06] . [80] . [01] . [83] . [00] . [08] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1c] 
0x1c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0d] 
0x0d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x39 , 10)
avrdude: Send: . [1b] . [1d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 9 [39] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1d] 
0x1d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,198400,256)
block_size at addr 198400 is 256
STK500V2: stk500v2_loadaddr(-2147384448)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x83 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x1e 0x00 0x05 0x0e 0x06 0x80 0x01 0x83 0x80 0x8a , 11)
avrdude: Send: . [1b] . [1e] . [00] . [05] . [0e] . [06] . [80] . [01] . [83] . [80] . [8a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1e] 
0x1e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3b , 10)
avrdude: Send: . [1b] . [1f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ; [3b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1f] 
0x1f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1c] 
0x1c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,198656,256)
block_size at addr 198656 is 256
STK500V2: stk500v2_loadaddr(-2147384320)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x84 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x20 0x00 0x05 0x0e 0x06 0x80 0x01 0x84 0x00 0x33 , 11)
avrdude: Send: . [1b]   [20] . [00] . [05] . [0e] . [06] . [80] . [01] . [84] . [00] 3 [33] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv:   [20] 
0x20 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 1 [31] 
0x31 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x21 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x05 , 10)
avrdude: Send: . [1b] ! [21] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [05] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ! [21] 
0x21 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: " [22] 
0x22 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,198912,256)
block_size at addr 198912 is 256
STK500V2: stk500v2_loadaddr(-2147384192)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x84 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x22 0x00 0x05 0x0e 0x06 0x80 0x01 0x84 0x80 0xb1 , 11)
avrdude: Send: . [1b] " [22] . [00] . [05] . [0e] . [06] . [80] . [01] . [84] . [80] . [b1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: " [22] 
0x22 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 3 [33] 
0x33 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x23 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x07 , 10)
avrdude: Send: . [1b] # [23] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [07] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: # [23] 
0x23 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,199168,256)
block_size at addr 199168 is 256
STK500V2: stk500v2_loadaddr(-2147384064)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x85 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x24 0x00 0x05 0x0e 0x06 0x80 0x01 0x85 0x00 0x36 , 11)
avrdude: Send: . [1b] $ [24] . [00] . [05] . [0e] . [06] . [80] . [01] . [85] . [00] 6 [36] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: $ [24] 
0x24 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 5 [35] 
0x35 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x25 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x01 , 10)
avrdude: Send: . [1b] % [25] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [01] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: % [25] 
0x25 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: & [26] 
0x26 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,199424,256)
block_size at addr 199424 is 256
STK500V2: stk500v2_loadaddr(-2147383936)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x85 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x26 0x00 0x05 0x0e 0x06 0x80 0x01 0x85 0x80 0xb4 , 11)
avrdude: Send: . [1b] & [26] . [00] . [05] . [0e] . [06] . [80] . [01] . [85] . [80] . [b4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: & [26] 
0x26 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 7 [37] 
0x37 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x27 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x03 , 10)
avrdude: Send: . [1b] ' [27] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [03] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ' [27] 
0x27 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: $ [24] 
0x24 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,199680,256)
block_size at addr 199680 is 256
STK500V2: stk500v2_loadaddr(-2147383808)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x86 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x28 0x00 0x05 0x0e 0x06 0x80 0x01 0x86 0x00 0x39 , 11)
avrdude: Send: . [1b] ( [28] . [00] . [05] . [0e] . [06] . [80] . [01] . [86] . [00] 9 [39] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ( [28] 
0x28 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 9 [39] 
0x39 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x29 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0d , 10)
avrdude: Send: . [1b] ) [29] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ) [29] 
0x29 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: * [2a] 
0x2a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,199936,256)
block_size at addr 199936 is 256
STK500V2: stk500v2_loadaddr(-2147383680)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x86 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x2a 0x00 0x05 0x0e 0x06 0x80 0x01 0x86 0x80 0xbb , 11)
avrdude: Send: . [1b] * [2a] . [00] . [05] . [0e] . [06] . [80] . [01] . [86] . [80] . [bb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: * [2a] 
0x2a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ; [3b] 
0x3b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0f , 10)
avrdude: Send: . [1b] + [2b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: + [2b] 
0x2b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: ( [28] 
0x28 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,200192,256)
block_size at addr 200192 is 256
STK500V2: stk500v2_loadaddr(-2147383552)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x87 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x2c 0x00 0x05 0x0e 0x06 0x80 0x01 0x87 0x00 0x3c , 11)
avrdude: Send: . [1b] , [2c] . [00] . [05] . [0e] . [06] . [80] . [01] . [87] . [00] < [3c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: , [2c] 
0x2c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: = [3d] 
0x3d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x09 , 10)
avrdude: Send: . [1b] - [2d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [09] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: - [2d] 
0x2d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [2e] 
0x2e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,200448,256)
block_size at addr 200448 is 256
STK500V2: stk500v2_loadaddr(-2147383424)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x87 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x2e 0x00 0x05 0x0e 0x06 0x80 0x01 0x87 0x80 0xbe , 11)
avrdude: Send: . [1b] . [2e] . [00] . [05] . [0e] . [06] . [80] . [01] . [87] . [80] . [be] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [2e] 
0x2e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ? [3f] 
0x3f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0b , 10)
avrdude: Send: . [1b] / [2f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: / [2f] 
0x2f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: , [2c] 
0x2c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,200704,256)
block_size at addr 200704 is 256
STK500V2: stk500v2_loadaddr(-2147383296)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x88 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x30 0x00 0x05 0x0e 0x06 0x80 0x01 0x88 0x00 0x2f , 11)
avrdude: Send: . [1b] 0 [30] . [00] . [05] . [0e] . [06] . [80] . [01] . [88] . [00] / [2f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 0 [30] 
0x30 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ! [21] 
0x21 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x31 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x15 , 10)
avrdude: Send: . [1b] 1 [31] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [15] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 1 [31] 
0x31 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: 2 [32] 
0x32 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,200960,256)
block_size at addr 200960 is 256
STK500V2: stk500v2_loadaddr(-2147383168)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x88 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x32 0x00 0x05 0x0e 0x06 0x80 0x01 0x88 0x80 0xad , 11)
avrdude: Send: . [1b] 2 [32] . [00] . [05] . [0e] . [06] . [80] . [01] . [88] . [80] . [ad] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 2 [32] 
0x32 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: # [23] 
0x23 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x33 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x17 , 10)
avrdude: Send: . [1b] 3 [33] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [17] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 3 [33] 
0x33 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: 0 [30] 
0x30 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,201216,256)
block_size at addr 201216 is 256
STK500V2: stk500v2_loadaddr(-2147383040)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x89 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x34 0x00 0x05 0x0e 0x06 0x80 0x01 0x89 0x00 0x2a , 11)
avrdude: Send: . [1b] 4 [34] . [00] . [05] . [0e] . [06] . [80] . [01] . [89] . [00] * [2a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 4 [34] 
0x34 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: % [25] 
0x25 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x35 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x11 , 10)
avrdude: Send: . [1b] 5 [35] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [11] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 5 [35] 
0x35 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: 6 [36] 
0x36 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,201472,256)
block_size at addr 201472 is 256
STK500V2: stk500v2_loadaddr(-2147382912)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x89 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x36 0x00 0x05 0x0e 0x06 0x80 0x01 0x89 0x80 0xa8 , 11)
avrdude: Send: . [1b] 6 [36] . [00] . [05] . [0e] . [06] . [80] . [01] . [89] . [80] . [a8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 6 [36] 
0x36 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ' [27] 
0x27 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x37 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x13 , 10)
avrdude: Send: . [1b] 7 [37] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [13] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 7 [37] 
0x37 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: 4 [34] 
0x34 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,201728,256)
block_size at addr 201728 is 256
STK500V2: stk500v2_loadaddr(-2147382784)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x8a 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x38 0x00 0x05 0x0e 0x06 0x80 0x01 0x8a 0x00 0x25 , 11)
avrdude: Send: . [1b] 8 [38] . [00] . [05] . [0e] . [06] . [80] . [01] . [8a] . [00] % [25] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 8 [38] 
0x38 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ) [29] 
0x29 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x39 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1d , 10)
avrdude: Send: . [1b] 9 [39] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 9 [39] 
0x39 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: : [3a] 
0x3a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,201984,256)
block_size at addr 201984 is 256
STK500V2: stk500v2_loadaddr(-2147382656)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x8a 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x3a 0x00 0x05 0x0e 0x06 0x80 0x01 0x8a 0x80 0xa7 , 11)
avrdude: Send: . [1b] : [3a] . [00] . [05] . [0e] . [06] . [80] . [01] . [8a] . [80] . [a7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: : [3a] 
0x3a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: + [2b] 
0x2b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1f , 10)
avrdude: Send: . [1b] ; [3b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ; [3b] 
0x3b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: 8 [38] 
0x38 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,202240,256)
block_size at addr 202240 is 256
STK500V2: stk500v2_loadaddr(-2147382528)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x8b 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x3c 0x00 0x05 0x0e 0x06 0x80 0x01 0x8b 0x00 0x20 , 11)
avrdude: Send: . [1b] < [3c] . [00] . [05] . [0e] . [06] . [80] . [01] . [8b] . [00]   [20] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: < [3c] 
0x3c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: - [2d] 
0x2d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x19 , 10)
avrdude: Send: . [1b] = [3d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [19] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: = [3d] 
0x3d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: > [3e] 
0x3e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,202496,256)
block_size at addr 202496 is 256
STK500V2: stk500v2_loadaddr(-2147382400)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x8b 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x3e 0x00 0x05 0x0e 0x06 0x80 0x01 0x8b 0x80 0xa2 , 11)
avrdude: Send: . [1b] > [3e] . [00] . [05] . [0e] . [06] . [80] . [01] . [8b] . [80] . [a2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: > [3e] 
0x3e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: / [2f] 
0x2f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1b , 10)
avrdude: Send: . [1b] ? [3f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ? [3f] 
0x3f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: < [3c] 
0x3c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,202752,256)
block_size at addr 202752 is 256
STK500V2: stk500v2_loadaddr(-2147382272)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x8c 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x40 0x00 0x05 0x0e 0x06 0x80 0x01 0x8c 0x00 0x5b , 11)
avrdude: Send: . [1b] @ [40] . [00] . [05] . [0e] . [06] . [80] . [01] . [8c] . [00] [ [5b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: @ [40] 
0x40 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Q [51] 
0x51 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x41 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x65 , 10)
avrdude: Send: . [1b] A [41] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] e [65] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: A [41] 
0x41 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: B [42] 
0x42 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,203008,256)
block_size at addr 203008 is 256
STK500V2: stk500v2_loadaddr(-2147382144)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x8c 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x42 0x00 0x05 0x0e 0x06 0x80 0x01 0x8c 0x80 0xd9 , 11)
avrdude: Send: . [1b] B [42] . [00] . [05] . [0e] . [06] . [80] . [01] . [8c] . [80] . [d9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: B [42] 
0x42 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: S [53] 
0x53 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x43 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x67 , 10)
avrdude: Send: . [1b] C [43] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] g [67] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: C [43] 
0x43 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,203264,256)
block_size at addr 203264 is 256
STK500V2: stk500v2_loadaddr(-2147382016)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x8d 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x44 0x00 0x05 0x0e 0x06 0x80 0x01 0x8d 0x00 0x5e , 11)
avrdude: Send: . [1b] D [44] . [00] . [05] . [0e] . [06] . [80] . [01] . [8d] . [00] ^ [5e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: D [44] 
0x44 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: U [55] 
0x55 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x45 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x61 , 10)
avrdude: Send: . [1b] E [45] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] a [61] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: E [45] 
0x45 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: F [46] 
0x46 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,203520,256)
block_size at addr 203520 is 256
STK500V2: stk500v2_loadaddr(-2147381888)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x8d 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x46 0x00 0x05 0x0e 0x06 0x80 0x01 0x8d 0x80 0xdc , 11)
avrdude: Send: . [1b] F [46] . [00] . [05] . [0e] . [06] . [80] . [01] . [8d] . [80] . [dc] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: F [46] 
0x46 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: W [57] 
0x57 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x47 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x63 , 10)
avrdude: Send: . [1b] G [47] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] c [63] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: G [47] 
0x47 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: D [44] 
0x44 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,203776,256)
block_size at addr 203776 is 256
STK500V2: stk500v2_loadaddr(-2147381760)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x8e 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x48 0x00 0x05 0x0e 0x06 0x80 0x01 0x8e 0x00 0x51 , 11)
avrdude: Send: . [1b] H [48] . [00] . [05] . [0e] . [06] . [80] . [01] . [8e] . [00] Q [51] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: H [48] 
0x48 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Y [59] 
0x59 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x49 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6d , 10)
avrdude: Send: . [1b] I [49] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] m [6d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: I [49] 
0x49 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: J [4a] 
0x4a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,204032,256)
block_size at addr 204032 is 256
STK500V2: stk500v2_loadaddr(-2147381632)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x8e 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x4a 0x00 0x05 0x0e 0x06 0x80 0x01 0x8e 0x80 0xd3 , 11)
avrdude: Send: . [1b] J [4a] . [00] . [05] . [0e] . [06] . [80] . [01] . [8e] . [80] . [d3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: J [4a] 
0x4a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: [ [5b] 
0x5b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6f , 10)
avrdude: Send: . [1b] K [4b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] o [6f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: K [4b] 
0x4b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,204288,256)
block_size at addr 204288 is 256
STK500V2: stk500v2_loadaddr(-2147381504)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x8f 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x4c 0x00 0x05 0x0e 0x06 0x80 0x01 0x8f 0x00 0x54 , 11)
avrdude: Send: . [1b] L [4c] . [00] . [05] . [0e] . [06] . [80] . [01] . [8f] . [00] T [54] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: L [4c] 
0x4c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ] [5d] 
0x5d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x69 , 10)
avrdude: Send: . [1b] M [4d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] i [69] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: M [4d] 
0x4d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: N [4e] 
0x4e 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,204544,256)
block_size at addr 204544 is 256
STK500V2: stk500v2_loadaddr(-2147381376)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x8f 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x4e 0x00 0x05 0x0e 0x06 0x80 0x01 0x8f 0x80 0xd6 , 11)
avrdude: Send: . [1b] N [4e] . [00] . [05] . [0e] . [06] . [80] . [01] . [8f] . [80] . [d6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: N [4e] 
0x4e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: _ [5f] 
0x5f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6b , 10)
avrdude: Send: . [1b] O [4f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] k [6b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: O [4f] 
0x4f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: L [4c] 
0x4c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,204800,256)
block_size at addr 204800 is 256
STK500V2: stk500v2_loadaddr(-2147381248)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x90 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x50 0x00 0x05 0x0e 0x06 0x80 0x01 0x90 0x00 0x57 , 11)
avrdude: Send: . [1b] P [50] . [00] . [05] . [0e] . [06] . [80] . [01] . [90] . [00] W [57] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: P [50] 
0x50 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x51 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x75 , 10)
avrdude: Send: . [1b] Q [51] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] u [75] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Q [51] 
0x51 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,205056,256)
block_size at addr 205056 is 256
STK500V2: stk500v2_loadaddr(-2147381120)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x90 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x52 0x00 0x05 0x0e 0x06 0x80 0x01 0x90 0x80 0xd5 , 11)
avrdude: Send: . [1b] R [52] . [00] . [05] . [0e] . [06] . [80] . [01] . [90] . [80] . [d5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: R [52] 
0x52 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: C [43] 
0x43 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x53 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x77 , 10)
avrdude: Send: . [1b] S [53] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] w [77] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: S [53] 
0x53 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,205312,256)
block_size at addr 205312 is 256
STK500V2: stk500v2_loadaddr(-2147380992)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x91 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x54 0x00 0x05 0x0e 0x06 0x80 0x01 0x91 0x00 0x52 , 11)
avrdude: Send: . [1b] T [54] . [00] . [05] . [0e] . [06] . [80] . [01] . [91] . [00] R [52] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: T [54] 
0x54 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x55 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x71 , 10)
avrdude: Send: . [1b] U [55] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] q [71] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: U [55] 
0x55 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,205568,256)
block_size at addr 205568 is 256
STK500V2: stk500v2_loadaddr(-2147380864)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x91 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x56 0x00 0x05 0x0e 0x06 0x80 0x01 0x91 0x80 0xd0 , 11)
avrdude: Send: . [1b] V [56] . [00] . [05] . [0e] . [06] . [80] . [01] . [91] . [80] . [d0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: V [56] 
0x56 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: G [47] 
0x47 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x57 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x73 , 10)
avrdude: Send: . [1b] W [57] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] s [73] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: W [57] 
0x57 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: T [54] 
0x54 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,205824,256)
block_size at addr 205824 is 256
STK500V2: stk500v2_loadaddr(-2147380736)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x92 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x58 0x00 0x05 0x0e 0x06 0x80 0x01 0x92 0x00 0x5d , 11)
avrdude: Send: . [1b] X [58] . [00] . [05] . [0e] . [06] . [80] . [01] . [92] . [00] ] [5d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: X [58] 
0x58 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: I [49] 
0x49 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x59 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7d , 10)
avrdude: Send: . [1b] Y [59] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] } [7d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Y [59] 
0x59 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,206080,256)
block_size at addr 206080 is 256
STK500V2: stk500v2_loadaddr(-2147380608)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x92 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x5a 0x00 0x05 0x0e 0x06 0x80 0x01 0x92 0x80 0xdf , 11)
avrdude: Send: . [1b] Z [5a] . [00] . [05] . [0e] . [06] . [80] . [01] . [92] . [80] . [df] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Z [5a] 
0x5a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: K [4b] 
0x4b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7f , 10)
avrdude: Send: . [1b] [ [5b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [7f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: [ [5b] 
0x5b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: X [58] 
0x58 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,206336,256)
block_size at addr 206336 is 256
STK500V2: stk500v2_loadaddr(-2147380480)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x93 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x5c 0x00 0x05 0x0e 0x06 0x80 0x01 0x93 0x00 0x58 , 11)
avrdude: Send: . [1b] \ [5c] . [00] . [05] . [0e] . [06] . [80] . [01] . [93] . [00] X [58] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: \ [5c] 
0x5c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x79 , 10)
avrdude: Send: . [1b] ] [5d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] y [79] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ] [5d] 
0x5d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: ^ [5e] 
0x5e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,206592,256)
block_size at addr 206592 is 256
STK500V2: stk500v2_loadaddr(-2147380352)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x93 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x5e 0x00 0x05 0x0e 0x06 0x80 0x01 0x93 0x80 0xda , 11)
avrdude: Send: . [1b] ^ [5e] . [00] . [05] . [0e] . [06] . [80] . [01] . [93] . [80] . [da] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ^ [5e] 
0x5e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: O [4f] 
0x4f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7b , 10)
avrdude: Send: . [1b] _ [5f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] { [7b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: _ [5f] 
0x5f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: \ [5c] 
0x5c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,206848,256)
block_size at addr 206848 is 256
STK500V2: stk500v2_loadaddr(-2147380224)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x94 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x60 0x00 0x05 0x0e 0x06 0x80 0x01 0x94 0x00 0x63 , 11)
avrdude: Send: . [1b] ` [60] . [00] . [05] . [0e] . [06] . [80] . [01] . [94] . [00] c [63] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ` [60] 
0x60 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: q [71] 
0x71 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x61 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x45 , 10)
avrdude: Send: . [1b] a [61] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] E [45] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: a [61] 
0x61 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: b [62] 
0x62 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,207104,256)
block_size at addr 207104 is 256
STK500V2: stk500v2_loadaddr(-2147380096)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x94 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x62 0x00 0x05 0x0e 0x06 0x80 0x01 0x94 0x80 0xe1 , 11)
avrdude: Send: . [1b] b [62] . [00] . [05] . [0e] . [06] . [80] . [01] . [94] . [80] . [e1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: b [62] 
0x62 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: s [73] 
0x73 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x63 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x47 , 10)
avrdude: Send: . [1b] c [63] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] G [47] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: c [63] 
0x63 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: ` [60] 
0x60 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,207360,256)
block_size at addr 207360 is 256
STK500V2: stk500v2_loadaddr(-2147379968)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x95 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x64 0x00 0x05 0x0e 0x06 0x80 0x01 0x95 0x00 0x66 , 11)
avrdude: Send: . [1b] d [64] . [00] . [05] . [0e] . [06] . [80] . [01] . [95] . [00] f [66] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: d [64] 
0x64 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: u [75] 
0x75 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x65 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x41 , 10)
avrdude: Send: . [1b] e [65] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] A [41] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: e [65] 
0x65 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: f [66] 
0x66 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,207616,256)
block_size at addr 207616 is 256
STK500V2: stk500v2_loadaddr(-2147379840)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x95 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x66 0x00 0x05 0x0e 0x06 0x80 0x01 0x95 0x80 0xe4 , 11)
avrdude: Send: . [1b] f [66] . [00] . [05] . [0e] . [06] . [80] . [01] . [95] . [80] . [e4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: f [66] 
0x66 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: w [77] 
0x77 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x67 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x43 , 10)
avrdude: Send: . [1b] g [67] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] C [43] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: g [67] 
0x67 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,207872,256)
block_size at addr 207872 is 256
STK500V2: stk500v2_loadaddr(-2147379712)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x96 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x68 0x00 0x05 0x0e 0x06 0x80 0x01 0x96 0x00 0x69 , 11)
avrdude: Send: . [1b] h [68] . [00] . [05] . [0e] . [06] . [80] . [01] . [96] . [00] i [69] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: h [68] 
0x68 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: y [79] 
0x79 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x69 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4d , 10)
avrdude: Send: . [1b] i [69] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] M [4d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: i [69] 
0x69 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: j [6a] 
0x6a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,208128,256)
block_size at addr 208128 is 256
STK500V2: stk500v2_loadaddr(-2147379584)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x96 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x6a 0x00 0x05 0x0e 0x06 0x80 0x01 0x96 0x80 0xeb , 11)
avrdude: Send: . [1b] j [6a] . [00] . [05] . [0e] . [06] . [80] . [01] . [96] . [80] . [eb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: j [6a] 
0x6a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: { [7b] 
0x7b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4f , 10)
avrdude: Send: . [1b] k [6b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] O [4f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: k [6b] 
0x6b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: h [68] 
0x68 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,208384,256)
block_size at addr 208384 is 256
STK500V2: stk500v2_loadaddr(-2147379456)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x97 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x6c 0x00 0x05 0x0e 0x06 0x80 0x01 0x97 0x00 0x6c , 11)
avrdude: Send: . [1b] l [6c] . [00] . [05] . [0e] . [06] . [80] . [01] . [97] . [00] l [6c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: l [6c] 
0x6c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: } [7d] 
0x7d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x49 , 10)
avrdude: Send: . [1b] m [6d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] I [49] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: m [6d] 
0x6d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: n [6e] 
0x6e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,208640,256)
block_size at addr 208640 is 256
STK500V2: stk500v2_loadaddr(-2147379328)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x97 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x6e 0x00 0x05 0x0e 0x06 0x80 0x01 0x97 0x80 0xee , 11)
avrdude: Send: . [1b] n [6e] . [00] . [05] . [0e] . [06] . [80] . [01] . [97] . [80] . [ee] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: n [6e] 
0x6e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [7f] 
0x7f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4b , 10)
avrdude: Send: . [1b] o [6f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] K [4b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: o [6f] 
0x6f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: l [6c] 
0x6c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,208896,256)
block_size at addr 208896 is 256
STK500V2: stk500v2_loadaddr(-2147379200)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x98 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x70 0x00 0x05 0x0e 0x06 0x80 0x01 0x98 0x00 0x7f , 11)
avrdude: Send: . [1b] p [70] . [00] . [05] . [0e] . [06] . [80] . [01] . [98] . [00] . [7f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: p [70] 
0x70 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: a [61] 
0x61 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x71 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x55 , 10)
avrdude: Send: . [1b] q [71] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] U [55] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: q [71] 
0x71 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: r [72] 
0x72 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,209152,256)
block_size at addr 209152 is 256
STK500V2: stk500v2_loadaddr(-2147379072)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x98 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x72 0x00 0x05 0x0e 0x06 0x80 0x01 0x98 0x80 0xfd , 11)
avrdude: Send: . [1b] r [72] . [00] . [05] . [0e] . [06] . [80] . [01] . [98] . [80] . [fd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: r [72] 
0x72 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: c [63] 
0x63 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x73 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x57 , 10)
avrdude: Send: . [1b] s [73] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] W [57] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: s [73] 
0x73 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,209408,256)
block_size at addr 209408 is 256
STK500V2: stk500v2_loadaddr(-2147378944)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x99 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x74 0x00 0x05 0x0e 0x06 0x80 0x01 0x99 0x00 0x7a , 11)
avrdude: Send: . [1b] t [74] . [00] . [05] . [0e] . [06] . [80] . [01] . [99] . [00] z [7a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: t [74] 
0x74 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: e [65] 
0x65 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x75 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x51 , 10)
avrdude: Send: . [1b] u [75] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] Q [51] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: u [75] 
0x75 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: v [76] 
0x76 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,209664,256)
block_size at addr 209664 is 256
STK500V2: stk500v2_loadaddr(-2147378816)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x99 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x76 0x00 0x05 0x0e 0x06 0x80 0x01 0x99 0x80 0xf8 , 11)
avrdude: Send: . [1b] v [76] . [00] . [05] . [0e] . [06] . [80] . [01] . [99] . [80] . [f8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: v [76] 
0x76 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: g [67] 
0x67 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x77 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x53 , 10)
avrdude: Send: . [1b] w [77] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] S [53] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: w [77] 
0x77 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: t [74] 
0x74 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,209920,256)
block_size at addr 209920 is 256
STK500V2: stk500v2_loadaddr(-2147378688)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x9a 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x78 0x00 0x05 0x0e 0x06 0x80 0x01 0x9a 0x00 0x75 , 11)
avrdude: Send: . [1b] x [78] . [00] . [05] . [0e] . [06] . [80] . [01] . [9a] . [00] u [75] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: x [78] 
0x78 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: i [69] 
0x69 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x79 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5d , 10)
avrdude: Send: . [1b] y [79] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ] [5d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: y [79] 
0x79 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: z [7a] 
0x7a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,210176,256)
block_size at addr 210176 is 256
STK500V2: stk500v2_loadaddr(-2147378560)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x9a 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x7a 0x00 0x05 0x0e 0x06 0x80 0x01 0x9a 0x80 0xf7 , 11)
avrdude: Send: . [1b] z [7a] . [00] . [05] . [0e] . [06] . [80] . [01] . [9a] . [80] . [f7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: z [7a] 
0x7a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: k [6b] 
0x6b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5f , 10)
avrdude: Send: . [1b] { [7b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] _ [5f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: { [7b] 
0x7b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: x [78] 
0x78 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,210432,256)
block_size at addr 210432 is 256
STK500V2: stk500v2_loadaddr(-2147378432)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x9b 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x7c 0x00 0x05 0x0e 0x06 0x80 0x01 0x9b 0x00 0x70 , 11)
avrdude: Send: . [1b] | [7c] . [00] . [05] . [0e] . [06] . [80] . [01] . [9b] . [00] p [70] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: | [7c] 
0x7c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: m [6d] 
0x6d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x59 , 10)
avrdude: Send: . [1b] } [7d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] Y [59] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: } [7d] 
0x7d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: ~ [7e] 
0x7e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,210688,256)
block_size at addr 210688 is 256
STK500V2: stk500v2_loadaddr(-2147378304)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x9b 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x7e 0x00 0x05 0x0e 0x06 0x80 0x01 0x9b 0x80 0xf2 , 11)
avrdude: Send: . [1b] ~ [7e] . [00] . [05] . [0e] . [06] . [80] . [01] . [9b] . [80] . [f2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ~ [7e] 
0x7e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: o [6f] 
0x6f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5b , 10)
avrdude: Send: . [1b] . [7f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] [ [5b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [7f] 
0x7f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: | [7c] 
0x7c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,210944,256)
block_size at addr 210944 is 256
STK500V2: stk500v2_loadaddr(-2147378176)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x9c 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x80 0x00 0x05 0x0e 0x06 0x80 0x01 0x9c 0x00 0x8b , 11)
avrdude: Send: . [1b] . [80] . [00] . [05] . [0e] . [06] . [80] . [01] . [9c] . [00] . [8b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [80] 
0x80 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x81 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa5 , 10)
avrdude: Send: . [1b] . [81] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [81] 
0x81 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,211200,256)
block_size at addr 211200 is 256
STK500V2: stk500v2_loadaddr(-2147378048)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x9c 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x82 0x00 0x05 0x0e 0x06 0x80 0x01 0x9c 0x80 0x09 , 11)
avrdude: Send: . [1b] . [82] . [00] . [05] . [0e] . [06] . [80] . [01] . [9c] . [80] . [09] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [82] 
0x82 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x83 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa7 , 10)
avrdude: Send: . [1b] . [83] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [83] 
0x83 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,211456,256)
block_size at addr 211456 is 256
STK500V2: stk500v2_loadaddr(-2147377920)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x9d 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x84 0x00 0x05 0x0e 0x06 0x80 0x01 0x9d 0x00 0x8e , 11)
avrdude: Send: . [1b] . [84] . [00] . [05] . [0e] . [06] . [80] . [01] . [9d] . [00] . [8e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [84] 
0x84 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [95] 
0x95 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x85 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa1 , 10)
avrdude: Send: . [1b] . [85] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [85] 
0x85 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,211712,256)
block_size at addr 211712 is 256
STK500V2: stk500v2_loadaddr(-2147377792)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x9d 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x86 0x00 0x05 0x0e 0x06 0x80 0x01 0x9d 0x80 0x0c , 11)
avrdude: Send: . [1b] . [86] . [00] . [05] . [0e] . [06] . [80] . [01] . [9d] . [80] . [0c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [86] 
0x86 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x87 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa3 , 10)
avrdude: Send: . [1b] . [87] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [87] 
0x87 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [84] 
0x84 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,211968,256)
block_size at addr 211968 is 256
STK500V2: stk500v2_loadaddr(-2147377664)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x9e 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x88 0x00 0x05 0x0e 0x06 0x80 0x01 0x9e 0x00 0x81 , 11)
avrdude: Send: . [1b] . [88] . [00] . [05] . [0e] . [06] . [80] . [01] . [9e] . [00] . [81] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [88] 
0x88 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [99] 
0x99 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x89 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xad , 10)
avrdude: Send: . [1b] . [89] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ad] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [89] 
0x89 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8a] 
0x8a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,212224,256)
block_size at addr 212224 is 256
STK500V2: stk500v2_loadaddr(-2147377536)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x9e 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x8a 0x00 0x05 0x0e 0x06 0x80 0x01 0x9e 0x80 0x03 , 11)
avrdude: Send: . [1b] . [8a] . [00] . [05] . [0e] . [06] . [80] . [01] . [9e] . [80] . [03] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8a] 
0x8a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9b] 
0x9b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xaf , 10)
avrdude: Send: . [1b] . [8b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [af] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8b] 
0x8b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,212480,256)
block_size at addr 212480 is 256
STK500V2: stk500v2_loadaddr(-2147377408)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x9f 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x8c 0x00 0x05 0x0e 0x06 0x80 0x01 0x9f 0x00 0x84 , 11)
avrdude: Send: . [1b] . [8c] . [00] . [05] . [0e] . [06] . [80] . [01] . [9f] . [00] . [84] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8c] 
0x8c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9d] 
0x9d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa9 , 10)
avrdude: Send: . [1b] . [8d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8d] 
0x8d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8e] 
0x8e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,212736,256)
block_size at addr 212736 is 256
STK500V2: stk500v2_loadaddr(-2147377280)
STK500V2: stk500v2_command(0x06 0x80 0x01 0x9f 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x8e 0x00 0x05 0x0e 0x06 0x80 0x01 0x9f 0x80 0x06 , 11)
avrdude: Send: . [1b] . [8e] . [00] . [05] . [0e] . [06] . [80] . [01] . [9f] . [80] . [06] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8e] 
0x8e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xab , 10)
avrdude: Send: . [1b] . [8f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ab] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8f] 
0x8f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8c] 
0x8c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,212992,256)
block_size at addr 212992 is 256
STK500V2: stk500v2_loadaddr(-2147377152)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xa0 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x90 0x00 0x05 0x0e 0x06 0x80 0x01 0xa0 0x00 0xa7 , 11)
avrdude: Send: . [1b] . [90] . [00] . [05] . [0e] . [06] . [80] . [01] . [a0] . [00] . [a7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [90] 
0x90 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x91 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb5 , 10)
avrdude: Send: . [1b] . [91] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [91] 
0x91 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [92] 
0x92 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,213248,256)
block_size at addr 213248 is 256
STK500V2: stk500v2_loadaddr(-2147377024)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xa0 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x92 0x00 0x05 0x0e 0x06 0x80 0x01 0xa0 0x80 0x25 , 11)
avrdude: Send: . [1b] . [92] . [00] . [05] . [0e] . [06] . [80] . [01] . [a0] . [80] % [25] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [92] 
0x92 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [83] 
0x83 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x93 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb7 , 10)
avrdude: Send: . [1b] . [93] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [93] 
0x93 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,213504,256)
block_size at addr 213504 is 256
STK500V2: stk500v2_loadaddr(-2147376896)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xa1 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x94 0x00 0x05 0x0e 0x06 0x80 0x01 0xa1 0x00 0xa2 , 11)
avrdude: Send: . [1b] . [94] . [00] . [05] . [0e] . [06] . [80] . [01] . [a1] . [00] . [a2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [94] 
0x94 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [85] 
0x85 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x95 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb1 , 10)
avrdude: Send: . [1b] . [95] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [95] 
0x95 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [96] 
0x96 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,213760,256)
block_size at addr 213760 is 256
STK500V2: stk500v2_loadaddr(-2147376768)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xa1 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x96 0x00 0x05 0x0e 0x06 0x80 0x01 0xa1 0x80 0x20 , 11)
avrdude: Send: . [1b] . [96] . [00] . [05] . [0e] . [06] . [80] . [01] . [a1] . [80]   [20] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [96] 
0x96 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x97 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb3 , 10)
avrdude: Send: . [1b] . [97] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [97] 
0x97 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [94] 
0x94 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,214016,256)
block_size at addr 214016 is 256
STK500V2: stk500v2_loadaddr(-2147376640)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xa2 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x98 0x00 0x05 0x0e 0x06 0x80 0x01 0xa2 0x00 0xad , 11)
avrdude: Send: . [1b] . [98] . [00] . [05] . [0e] . [06] . [80] . [01] . [a2] . [00] . [ad] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [98] 
0x98 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [89] 
0x89 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x99 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbd , 10)
avrdude: Send: . [1b] . [99] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [99] 
0x99 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9a] 
0x9a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,214272,256)
block_size at addr 214272 is 256
STK500V2: stk500v2_loadaddr(-2147376512)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xa2 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x9a 0x00 0x05 0x0e 0x06 0x80 0x01 0xa2 0x80 0x2f , 11)
avrdude: Send: . [1b] . [9a] . [00] . [05] . [0e] . [06] . [80] . [01] . [a2] . [80] / [2f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9a] 
0x9a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8b] 
0x8b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbf , 10)
avrdude: Send: . [1b] . [9b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9b] 
0x9b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [98] 
0x98 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,214528,256)
block_size at addr 214528 is 256
STK500V2: stk500v2_loadaddr(-2147376384)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xa3 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x9c 0x00 0x05 0x0e 0x06 0x80 0x01 0xa3 0x00 0xa8 , 11)
avrdude: Send: . [1b] . [9c] . [00] . [05] . [0e] . [06] . [80] . [01] . [a3] . [00] . [a8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9c] 
0x9c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb9 , 10)
avrdude: Send: . [1b] . [9d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9d] 
0x9d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9e] 
0x9e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,214784,256)
block_size at addr 214784 is 256
STK500V2: stk500v2_loadaddr(-2147376256)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xa3 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x9e 0x00 0x05 0x0e 0x06 0x80 0x01 0xa3 0x80 0x2a , 11)
avrdude: Send: . [1b] . [9e] . [00] . [05] . [0e] . [06] . [80] . [01] . [a3] . [80] * [2a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9e] 
0x9e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbb , 10)
avrdude: Send: . [1b] . [9f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9f] 
0x9f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9c] 
0x9c 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,215040,256)
block_size at addr 215040 is 256
STK500V2: stk500v2_loadaddr(-2147376128)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xa4 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa0 0x00 0x05 0x0e 0x06 0x80 0x01 0xa4 0x00 0x93 , 11)
avrdude: Send: . [1b] . [a0] . [00] . [05] . [0e] . [06] . [80] . [01] . [a4] . [00] . [93] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a0] 
0xa0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b1] 
0xb1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x85 , 10)
avrdude: Send: . [1b] . [a1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [85] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a1] 
0xa1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a2] 
0xa2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,215296,256)
block_size at addr 215296 is 256
STK500V2: stk500v2_loadaddr(-2147376000)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xa4 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xa2 0x00 0x05 0x0e 0x06 0x80 0x01 0xa4 0x80 0x11 , 11)
avrdude: Send: . [1b] . [a2] . [00] . [05] . [0e] . [06] . [80] . [01] . [a4] . [80] . [11] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a2] 
0xa2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b3] 
0xb3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x87 , 10)
avrdude: Send: . [1b] . [a3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [87] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a3] 
0xa3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a0] 
0xa0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,215552,256)
block_size at addr 215552 is 256
STK500V2: stk500v2_loadaddr(-2147375872)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xa5 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa4 0x00 0x05 0x0e 0x06 0x80 0x01 0xa5 0x00 0x96 , 11)
avrdude: Send: . [1b] . [a4] . [00] . [05] . [0e] . [06] . [80] . [01] . [a5] . [00] . [96] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a4] 
0xa4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b5] 
0xb5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x81 , 10)
avrdude: Send: . [1b] . [a5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [81] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a5] 
0xa5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a6] 
0xa6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,215808,256)
block_size at addr 215808 is 256
STK500V2: stk500v2_loadaddr(-2147375744)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xa5 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xa6 0x00 0x05 0x0e 0x06 0x80 0x01 0xa5 0x80 0x14 , 11)
avrdude: Send: . [1b] . [a6] . [00] . [05] . [0e] . [06] . [80] . [01] . [a5] . [80] . [14] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a6] 
0xa6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b7] 
0xb7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x83 , 10)
avrdude: Send: . [1b] . [a7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [83] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a7] 
0xa7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a4] 
0xa4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,216064,256)
block_size at addr 216064 is 256
STK500V2: stk500v2_loadaddr(-2147375616)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xa6 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa8 0x00 0x05 0x0e 0x06 0x80 0x01 0xa6 0x00 0x99 , 11)
avrdude: Send: . [1b] . [a8] . [00] . [05] . [0e] . [06] . [80] . [01] . [a6] . [00] . [99] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a8] 
0xa8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b9] 
0xb9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8d , 10)
avrdude: Send: . [1b] . [a9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a9] 
0xa9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [aa] 
0xaa 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,216320,256)
block_size at addr 216320 is 256
STK500V2: stk500v2_loadaddr(-2147375488)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xa6 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xaa 0x00 0x05 0x0e 0x06 0x80 0x01 0xa6 0x80 0x1b , 11)
avrdude: Send: . [1b] . [aa] . [00] . [05] . [0e] . [06] . [80] . [01] . [a6] . [80] . [1b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [aa] 
0xaa hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bb] 
0xbb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xab 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8f , 10)
avrdude: Send: . [1b] . [ab] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ab] 
0xab hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a8] 
0xa8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,216576,256)
block_size at addr 216576 is 256
STK500V2: stk500v2_loadaddr(-2147375360)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xa7 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xac 0x00 0x05 0x0e 0x06 0x80 0x01 0xa7 0x00 0x9c , 11)
avrdude: Send: . [1b] . [ac] . [00] . [05] . [0e] . [06] . [80] . [01] . [a7] . [00] . [9c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ac] 
0xac hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bd] 
0xbd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xad 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x89 , 10)
avrdude: Send: . [1b] . [ad] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [89] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ad] 
0xad hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ae] 
0xae 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,216832,256)
block_size at addr 216832 is 256
STK500V2: stk500v2_loadaddr(-2147375232)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xa7 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xae 0x00 0x05 0x0e 0x06 0x80 0x01 0xa7 0x80 0x1e , 11)
avrdude: Send: . [1b] . [ae] . [00] . [05] . [0e] . [06] . [80] . [01] . [a7] . [80] . [1e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ae] 
0xae hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bf] 
0xbf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xaf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8b , 10)
avrdude: Send: . [1b] . [af] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [af] 
0xaf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ac] 
0xac 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,217088,256)
block_size at addr 217088 is 256
STK500V2: stk500v2_loadaddr(-2147375104)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xa8 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb0 0x00 0x05 0x0e 0x06 0x80 0x01 0xa8 0x00 0x8f , 11)
avrdude: Send: . [1b] . [b0] . [00] . [05] . [0e] . [06] . [80] . [01] . [a8] . [00] . [8f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b0] 
0xb0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a1] 
0xa1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x95 , 10)
avrdude: Send: . [1b] . [b1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [95] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b1] 
0xb1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b2] 
0xb2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,217344,256)
block_size at addr 217344 is 256
STK500V2: stk500v2_loadaddr(-2147374976)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xa8 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xb2 0x00 0x05 0x0e 0x06 0x80 0x01 0xa8 0x80 0x0d , 11)
avrdude: Send: . [1b] . [b2] . [00] . [05] . [0e] . [06] . [80] . [01] . [a8] . [80] . [0d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b2] 
0xb2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a3] 
0xa3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x97 , 10)
avrdude: Send: . [1b] . [b3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [97] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b3] 
0xb3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b0] 
0xb0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,217600,256)
block_size at addr 217600 is 256
STK500V2: stk500v2_loadaddr(-2147374848)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xa9 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb4 0x00 0x05 0x0e 0x06 0x80 0x01 0xa9 0x00 0x8a , 11)
avrdude: Send: . [1b] . [b4] . [00] . [05] . [0e] . [06] . [80] . [01] . [a9] . [00] . [8a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b4] 
0xb4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a5] 
0xa5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x91 , 10)
avrdude: Send: . [1b] . [b5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [91] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b5] 
0xb5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b6] 
0xb6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,217856,256)
block_size at addr 217856 is 256
STK500V2: stk500v2_loadaddr(-2147374720)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xa9 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xb6 0x00 0x05 0x0e 0x06 0x80 0x01 0xa9 0x80 0x08 , 11)
avrdude: Send: . [1b] . [b6] . [00] . [05] . [0e] . [06] . [80] . [01] . [a9] . [80] . [08] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b6] 
0xb6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a7] 
0xa7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x93 , 10)
avrdude: Send: . [1b] . [b7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [93] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b7] 
0xb7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b4] 
0xb4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,218112,256)
block_size at addr 218112 is 256
STK500V2: stk500v2_loadaddr(-2147374592)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xaa 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb8 0x00 0x05 0x0e 0x06 0x80 0x01 0xaa 0x00 0x85 , 11)
avrdude: Send: . [1b] . [b8] . [00] . [05] . [0e] . [06] . [80] . [01] . [aa] . [00] . [85] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b8] 
0xb8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a9] 
0xa9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9d , 10)
avrdude: Send: . [1b] . [b9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b9] 
0xb9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ba] 
0xba 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,218368,256)
block_size at addr 218368 is 256
STK500V2: stk500v2_loadaddr(-2147374464)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xaa 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xba 0x00 0x05 0x0e 0x06 0x80 0x01 0xaa 0x80 0x07 , 11)
avrdude: Send: . [1b] . [ba] . [00] . [05] . [0e] . [06] . [80] . [01] . [aa] . [80] . [07] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ba] 
0xba hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ab] 
0xab 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9f , 10)
avrdude: Send: . [1b] . [bb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bb] 
0xbb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b8] 
0xb8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,218624,256)
block_size at addr 218624 is 256
STK500V2: stk500v2_loadaddr(-2147374336)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xab 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xbc 0x00 0x05 0x0e 0x06 0x80 0x01 0xab 0x00 0x80 , 11)
avrdude: Send: . [1b] . [bc] . [00] . [05] . [0e] . [06] . [80] . [01] . [ab] . [00] . [80] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bc] 
0xbc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ad] 
0xad 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x99 , 10)
avrdude: Send: . [1b] . [bd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [99] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bd] 
0xbd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [be] 
0xbe 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,218880,256)
block_size at addr 218880 is 256
STK500V2: stk500v2_loadaddr(-2147374208)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xab 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xbe 0x00 0x05 0x0e 0x06 0x80 0x01 0xab 0x80 0x02 , 11)
avrdude: Send: . [1b] . [be] . [00] . [05] . [0e] . [06] . [80] . [01] . [ab] . [80] . [02] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [be] 
0xbe hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [af] 
0xaf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9b , 10)
avrdude: Send: . [1b] . [bf] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bf] 
0xbf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bc] 
0xbc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,219136,256)
block_size at addr 219136 is 256
STK500V2: stk500v2_loadaddr(-2147374080)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xac 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc0 0x00 0x05 0x0e 0x06 0x80 0x01 0xac 0x00 0xfb , 11)
avrdude: Send: . [1b] . [c0] . [00] . [05] . [0e] . [06] . [80] . [01] . [ac] . [00] . [fb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c0] 
0xc0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d1] 
0xd1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe5 , 10)
avrdude: Send: . [1b] . [c1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c1] 
0xc1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c2] 
0xc2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,219392,256)
block_size at addr 219392 is 256
STK500V2: stk500v2_loadaddr(-2147373952)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xac 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xc2 0x00 0x05 0x0e 0x06 0x80 0x01 0xac 0x80 0x79 , 11)
avrdude: Send: . [1b] . [c2] . [00] . [05] . [0e] . [06] . [80] . [01] . [ac] . [80] y [79] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c2] 
0xc2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d3] 
0xd3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe7 , 10)
avrdude: Send: . [1b] . [c3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c3] 
0xc3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,219648,256)
block_size at addr 219648 is 256
STK500V2: stk500v2_loadaddr(-2147373824)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xad 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc4 0x00 0x05 0x0e 0x06 0x80 0x01 0xad 0x00 0xfe , 11)
avrdude: Send: . [1b] . [c4] . [00] . [05] . [0e] . [06] . [80] . [01] . [ad] . [00] . [fe] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c4] 
0xc4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d5] 
0xd5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe1 , 10)
avrdude: Send: . [1b] . [c5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c5] 
0xc5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c6] 
0xc6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,219904,256)
block_size at addr 219904 is 256
STK500V2: stk500v2_loadaddr(-2147373696)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xad 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xc6 0x00 0x05 0x0e 0x06 0x80 0x01 0xad 0x80 0x7c , 11)
avrdude: Send: . [1b] . [c6] . [00] . [05] . [0e] . [06] . [80] . [01] . [ad] . [80] | [7c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c6] 
0xc6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d7] 
0xd7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe3 , 10)
avrdude: Send: . [1b] . [c7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c7] 
0xc7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c4] 
0xc4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,220160,256)
block_size at addr 220160 is 256
STK500V2: stk500v2_loadaddr(-2147373568)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xae 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc8 0x00 0x05 0x0e 0x06 0x80 0x01 0xae 0x00 0xf1 , 11)
avrdude: Send: . [1b] . [c8] . [00] . [05] . [0e] . [06] . [80] . [01] . [ae] . [00] . [f1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c8] 
0xc8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d9] 
0xd9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xed , 10)
avrdude: Send: . [1b] . [c9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ed] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c9] 
0xc9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ca] 
0xca 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,220416,256)
block_size at addr 220416 is 256
STK500V2: stk500v2_loadaddr(-2147373440)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xae 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xca 0x00 0x05 0x0e 0x06 0x80 0x01 0xae 0x80 0x73 , 11)
avrdude: Send: . [1b] . [ca] . [00] . [05] . [0e] . [06] . [80] . [01] . [ae] . [80] s [73] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ca] 
0xca hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [db] 
0xdb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xef , 10)
avrdude: Send: . [1b] . [cb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ef] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cb] 
0xcb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,220672,256)
block_size at addr 220672 is 256
STK500V2: stk500v2_loadaddr(-2147373312)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xaf 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xcc 0x00 0x05 0x0e 0x06 0x80 0x01 0xaf 0x00 0xf4 , 11)
avrdude: Send: . [1b] . [cc] . [00] . [05] . [0e] . [06] . [80] . [01] . [af] . [00] . [f4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cc] 
0xcc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [dd] 
0xdd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe9 , 10)
avrdude: Send: . [1b] . [cd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cd] 
0xcd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ce] 
0xce 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,220928,256)
block_size at addr 220928 is 256
STK500V2: stk500v2_loadaddr(-2147373184)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xaf 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xce 0x00 0x05 0x0e 0x06 0x80 0x01 0xaf 0x80 0x76 , 11)
avrdude: Send: . [1b] . [ce] . [00] . [05] . [0e] . [06] . [80] . [01] . [af] . [80] v [76] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ce] 
0xce hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [df] 
0xdf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xeb , 10)
avrdude: Send: . [1b] . [cf] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [eb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cf] 
0xcf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cc] 
0xcc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,221184,256)
block_size at addr 221184 is 256
STK500V2: stk500v2_loadaddr(-2147373056)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xb0 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd0 0x00 0x05 0x0e 0x06 0x80 0x01 0xb0 0x00 0xf7 , 11)
avrdude: Send: . [1b] . [d0] . [00] . [05] . [0e] . [06] . [80] . [01] . [b0] . [00] . [f7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d0] 
0xd0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c1] 
0xc1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf5 , 10)
avrdude: Send: . [1b] . [d1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d1] 
0xd1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d2] 
0xd2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,221440,256)
block_size at addr 221440 is 256
STK500V2: stk500v2_loadaddr(-2147372928)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xb0 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xd2 0x00 0x05 0x0e 0x06 0x80 0x01 0xb0 0x80 0x75 , 11)
avrdude: Send: . [1b] . [d2] . [00] . [05] . [0e] . [06] . [80] . [01] . [b0] . [80] u [75] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d2] 
0xd2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c3] 
0xc3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf7 , 10)
avrdude: Send: . [1b] . [d3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d3] 
0xd3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d0] 
0xd0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,221696,256)
block_size at addr 221696 is 256
STK500V2: stk500v2_loadaddr(-2147372800)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xb1 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd4 0x00 0x05 0x0e 0x06 0x80 0x01 0xb1 0x00 0xf2 , 11)
avrdude: Send: . [1b] . [d4] . [00] . [05] . [0e] . [06] . [80] . [01] . [b1] . [00] . [f2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d4] 
0xd4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c5] 
0xc5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf1 , 10)
avrdude: Send: . [1b] . [d5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d5] 
0xd5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d6] 
0xd6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,221952,256)
block_size at addr 221952 is 256
STK500V2: stk500v2_loadaddr(-2147372672)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xb1 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xd6 0x00 0x05 0x0e 0x06 0x80 0x01 0xb1 0x80 0x70 , 11)
avrdude: Send: . [1b] . [d6] . [00] . [05] . [0e] . [06] . [80] . [01] . [b1] . [80] p [70] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d6] 
0xd6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c7] 
0xc7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf3 , 10)
avrdude: Send: . [1b] . [d7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d7] 
0xd7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d4] 
0xd4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,222208,256)
block_size at addr 222208 is 256
STK500V2: stk500v2_loadaddr(-2147372544)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xb2 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd8 0x00 0x05 0x0e 0x06 0x80 0x01 0xb2 0x00 0xfd , 11)
avrdude: Send: . [1b] . [d8] . [00] . [05] . [0e] . [06] . [80] . [01] . [b2] . [00] . [fd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d8] 
0xd8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c9] 
0xc9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xfd , 10)
avrdude: Send: . [1b] . [d9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [fd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d9] 
0xd9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [da] 
0xda 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,222464,256)
block_size at addr 222464 is 256
STK500V2: stk500v2_loadaddr(-2147372416)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xb2 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xda 0x00 0x05 0x0e 0x06 0x80 0x01 0xb2 0x80 0x7f , 11)
avrdude: Send: . [1b] . [da] . [00] . [05] . [0e] . [06] . [80] . [01] . [b2] . [80] . [7f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [da] 
0xda hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cb] 
0xcb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xff , 10)
avrdude: Send: . [1b] . [db] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ff] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [db] 
0xdb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d8] 
0xd8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,222720,256)
block_size at addr 222720 is 256
STK500V2: stk500v2_loadaddr(-2147372288)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xb3 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xdc 0x00 0x05 0x0e 0x06 0x80 0x01 0xb3 0x00 0xf8 , 11)
avrdude: Send: . [1b] . [dc] . [00] . [05] . [0e] . [06] . [80] . [01] . [b3] . [00] . [f8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [dc] 
0xdc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cd] 
0xcd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf9 , 10)
avrdude: Send: . [1b] . [dd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [dd] 
0xdd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [de] 
0xde 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,222976,256)
block_size at addr 222976 is 256
STK500V2: stk500v2_loadaddr(-2147372160)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xb3 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xde 0x00 0x05 0x0e 0x06 0x80 0x01 0xb3 0x80 0x7a , 11)
avrdude: Send: . [1b] . [de] . [00] . [05] . [0e] . [06] . [80] . [01] . [b3] . [80] z [7a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [de] 
0xde hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cf] 
0xcf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xfb , 10)
avrdude: Send: . [1b] . [df] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [fb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [df] 
0xdf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [dc] 
0xdc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,223232,256)
block_size at addr 223232 is 256
STK500V2: stk500v2_loadaddr(-2147372032)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xb4 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe0 0x00 0x05 0x0e 0x06 0x80 0x01 0xb4 0x00 0xc3 , 11)
avrdude: Send: . [1b] . [e0] . [00] . [05] . [0e] . [06] . [80] . [01] . [b4] . [00] . [c3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e0] 
0xe0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f1] 
0xf1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc5 , 10)
avrdude: Send: . [1b] . [e1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e1] 
0xe1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e2] 
0xe2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,223488,256)
block_size at addr 223488 is 256
STK500V2: stk500v2_loadaddr(-2147371904)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xb4 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xe2 0x00 0x05 0x0e 0x06 0x80 0x01 0xb4 0x80 0x41 , 11)
avrdude: Send: . [1b] . [e2] . [00] . [05] . [0e] . [06] . [80] . [01] . [b4] . [80] A [41] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e2] 
0xe2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f3] 
0xf3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc7 , 10)
avrdude: Send: . [1b] . [e3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e3] 
0xe3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,223744,256)
block_size at addr 223744 is 256
STK500V2: stk500v2_loadaddr(-2147371776)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xb5 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe4 0x00 0x05 0x0e 0x06 0x80 0x01 0xb5 0x00 0xc6 , 11)
avrdude: Send: . [1b] . [e4] . [00] . [05] . [0e] . [06] . [80] . [01] . [b5] . [00] . [c6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e4] 
0xe4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f5] 
0xf5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc1 , 10)
avrdude: Send: . [1b] . [e5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e5] 
0xe5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e6] 
0xe6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,224000,256)
block_size at addr 224000 is 256
STK500V2: stk500v2_loadaddr(-2147371648)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xb5 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xe6 0x00 0x05 0x0e 0x06 0x80 0x01 0xb5 0x80 0x44 , 11)
avrdude: Send: . [1b] . [e6] . [00] . [05] . [0e] . [06] . [80] . [01] . [b5] . [80] D [44] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e6] 
0xe6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f7] 
0xf7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc3 , 10)
avrdude: Send: . [1b] . [e7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e7] 
0xe7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e4] 
0xe4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,224256,256)
block_size at addr 224256 is 256
STK500V2: stk500v2_loadaddr(-2147371520)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xb6 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe8 0x00 0x05 0x0e 0x06 0x80 0x01 0xb6 0x00 0xc9 , 11)
avrdude: Send: . [1b] . [e8] . [00] . [05] . [0e] . [06] . [80] . [01] . [b6] . [00] . [c9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e8] 
0xe8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f9] 
0xf9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcd , 10)
avrdude: Send: . [1b] . [e9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e9] 
0xe9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ea] 
0xea 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,224512,256)
block_size at addr 224512 is 256
STK500V2: stk500v2_loadaddr(-2147371392)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xb6 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xea 0x00 0x05 0x0e 0x06 0x80 0x01 0xb6 0x80 0x4b , 11)
avrdude: Send: . [1b] . [ea] . [00] . [05] . [0e] . [06] . [80] . [01] . [b6] . [80] K [4b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ea] 
0xea hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fb] 
0xfb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xeb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcf , 10)
avrdude: Send: . [1b] . [eb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [eb] 
0xeb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e8] 
0xe8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,224768,256)
block_size at addr 224768 is 256
STK500V2: stk500v2_loadaddr(-2147371264)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xb7 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xec 0x00 0x05 0x0e 0x06 0x80 0x01 0xb7 0x00 0xcc , 11)
avrdude: Send: . [1b] . [ec] . [00] . [05] . [0e] . [06] . [80] . [01] . [b7] . [00] . [cc] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ec] 
0xec hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fd] 
0xfd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xed 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc9 , 10)
avrdude: Send: . [1b] . [ed] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ed] 
0xed hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ee] 
0xee 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,225024,256)
block_size at addr 225024 is 256
STK500V2: stk500v2_loadaddr(-2147371136)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xb7 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xee 0x00 0x05 0x0e 0x06 0x80 0x01 0xb7 0x80 0x4e , 11)
avrdude: Send: . [1b] . [ee] . [00] . [05] . [0e] . [06] . [80] . [01] . [b7] . [80] N [4e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ee] 
0xee hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xef 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcb , 10)
avrdude: Send: . [1b] . [ef] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ef] 
0xef hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ec] 
0xec 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,225280,256)
block_size at addr 225280 is 256
STK500V2: stk500v2_loadaddr(-2147371008)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xb8 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf0 0x00 0x05 0x0e 0x06 0x80 0x01 0xb8 0x00 0xdf , 11)
avrdude: Send: . [1b] . [f0] . [00] . [05] . [0e] . [06] . [80] . [01] . [b8] . [00] . [df] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f0] 
0xf0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e1] 
0xe1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd5 , 10)
avrdude: Send: . [1b] . [f1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f1] 
0xf1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f2] 
0xf2 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,225536,256)
block_size at addr 225536 is 256
STK500V2: stk500v2_loadaddr(-2147370880)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xb8 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xf2 0x00 0x05 0x0e 0x06 0x80 0x01 0xb8 0x80 0x5d , 11)
avrdude: Send: . [1b] . [f2] . [00] . [05] . [0e] . [06] . [80] . [01] . [b8] . [80] ] [5d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f2] 
0xf2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e3] 
0xe3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd7 , 10)
avrdude: Send: . [1b] . [f3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f3] 
0xf3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f0] 
0xf0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,225792,256)
block_size at addr 225792 is 256
STK500V2: stk500v2_loadaddr(-2147370752)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xb9 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf4 0x00 0x05 0x0e 0x06 0x80 0x01 0xb9 0x00 0xda , 11)
avrdude: Send: . [1b] . [f4] . [00] . [05] . [0e] . [06] . [80] . [01] . [b9] . [00] . [da] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f4] 
0xf4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e5] 
0xe5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd1 , 10)
avrdude: Send: . [1b] . [f5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f5] 
0xf5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f6] 
0xf6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,226048,256)
block_size at addr 226048 is 256
STK500V2: stk500v2_loadaddr(-2147370624)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xb9 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xf6 0x00 0x05 0x0e 0x06 0x80 0x01 0xb9 0x80 0x58 , 11)
avrdude: Send: . [1b] . [f6] . [00] . [05] . [0e] . [06] . [80] . [01] . [b9] . [80] X [58] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f6] 
0xf6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e7] 
0xe7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd3 , 10)
avrdude: Send: . [1b] . [f7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f7] 
0xf7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f4] 
0xf4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,226304,256)
block_size at addr 226304 is 256
STK500V2: stk500v2_loadaddr(-2147370496)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xba 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf8 0x00 0x05 0x0e 0x06 0x80 0x01 0xba 0x00 0xd5 , 11)
avrdude: Send: . [1b] . [f8] . [00] . [05] . [0e] . [06] . [80] . [01] . [ba] . [00] . [d5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f8] 
0xf8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e9] 
0xe9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdd , 10)
avrdude: Send: . [1b] . [f9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [dd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f9] 
0xf9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fa] 
0xfa 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,226560,256)
block_size at addr 226560 is 256
STK500V2: stk500v2_loadaddr(-2147370368)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xba 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xfa 0x00 0x05 0x0e 0x06 0x80 0x01 0xba 0x80 0x57 , 11)
avrdude: Send: . [1b] . [fa] . [00] . [05] . [0e] . [06] . [80] . [01] . [ba] . [80] W [57] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fa] 
0xfa hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [eb] 
0xeb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xfb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdf , 10)
avrdude: Send: . [1b] . [fb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [df] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fb] 
0xfb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,226816,256)
block_size at addr 226816 is 256
STK500V2: stk500v2_loadaddr(-2147370240)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xbb 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xfc 0x00 0x05 0x0e 0x06 0x80 0x01 0xbb 0x00 0xd0 , 11)
avrdude: Send: . [1b] . [fc] . [00] . [05] . [0e] . [06] . [80] . [01] . [bb] . [00] . [d0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fc] 
0xfc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ed] 
0xed 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xfd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd9 , 10)
avrdude: Send: . [1b] . [fd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fd] 
0xfd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fe] 
0xfe 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,227072,256)
block_size at addr 227072 is 256
STK500V2: stk500v2_loadaddr(-2147370112)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xbb 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xfe 0x00 0x05 0x0e 0x06 0x80 0x01 0xbb 0x80 0x52 , 11)
avrdude: Send: . [1b] . [fe] . [00] . [05] . [0e] . [06] . [80] . [01] . [bb] . [80] R [52] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fe] 
0xfe hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ef] 
0xef 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xff 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdb , 10)
avrdude: Send: . [1b] . [ff] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [db] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ff] 
0xff hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fc] 
0xfc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,227328,256)
block_size at addr 227328 is 256
STK500V2: stk500v2_loadaddr(-2147369984)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xbc 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x00 0x00 0x05 0x0e 0x06 0x80 0x01 0xbc 0x00 0x2b , 11)
avrdude: Send: . [1b] . [00] . [00] . [05] . [0e] . [06] . [80] . [01] . [bc] . [00] + [2b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [00] 
0x00 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x01 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x25 , 10)
avrdude: Send: . [1b] . [01] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] % [25] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [01] 
0x01 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [02] 
0x02 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,227584,256)
block_size at addr 227584 is 256
STK500V2: stk500v2_loadaddr(-2147369856)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xbc 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x02 0x00 0x05 0x0e 0x06 0x80 0x01 0xbc 0x80 0xa9 , 11)
avrdude: Send: . [1b] . [02] . [00] . [05] . [0e] . [06] . [80] . [01] . [bc] . [80] . [a9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [02] 
0x02 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [13] 
0x13 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x03 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x27 , 10)
avrdude: Send: . [1b] . [03] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ' [27] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [03] 
0x03 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,227840,256)
block_size at addr 227840 is 256
STK500V2: stk500v2_loadaddr(-2147369728)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xbd 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x04 0x00 0x05 0x0e 0x06 0x80 0x01 0xbd 0x00 0x2e , 11)
avrdude: Send: . [1b] . [04] . [00] . [05] . [0e] . [06] . [80] . [01] . [bd] . [00] . [2e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [04] 
0x04 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [15] 
0x15 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x05 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x21 , 10)
avrdude: Send: . [1b] . [05] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ! [21] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [05] 
0x05 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [06] 
0x06 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,228096,256)
block_size at addr 228096 is 256
STK500V2: stk500v2_loadaddr(-2147369600)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xbd 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x06 0x00 0x05 0x0e 0x06 0x80 0x01 0xbd 0x80 0xac , 11)
avrdude: Send: . [1b] . [06] . [00] . [05] . [0e] . [06] . [80] . [01] . [bd] . [80] . [ac] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [06] 
0x06 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [17] 
0x17 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x07 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x23 , 10)
avrdude: Send: . [1b] . [07] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] # [23] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [07] 
0x07 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [04] 
0x04 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,228352,256)
block_size at addr 228352 is 256
STK500V2: stk500v2_loadaddr(-2147369472)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xbe 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x08 0x00 0x05 0x0e 0x06 0x80 0x01 0xbe 0x00 0x21 , 11)
avrdude: Send: . [1b] . [08] . [00] . [05] . [0e] . [06] . [80] . [01] . [be] . [00] ! [21] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [08] 
0x08 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [19] 
0x19 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x09 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2d , 10)
avrdude: Send: . [1b] . [09] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] - [2d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [09] 
0x09 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0a] 
0x0a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,228608,256)
block_size at addr 228608 is 256
STK500V2: stk500v2_loadaddr(-2147369344)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xbe 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x0a 0x00 0x05 0x0e 0x06 0x80 0x01 0xbe 0x80 0xa3 , 11)
avrdude: Send: . [1b] . [0a] . [00] . [05] . [0e] . [06] . [80] . [01] . [be] . [80] . [a3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0a] 
0x0a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1b] 
0x1b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2f , 10)
avrdude: Send: . [1b] . [0b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] / [2f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0b] 
0x0b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,228864,256)
block_size at addr 228864 is 256
STK500V2: stk500v2_loadaddr(-2147369216)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xbf 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x0c 0x00 0x05 0x0e 0x06 0x80 0x01 0xbf 0x00 0x24 , 11)
avrdude: Send: . [1b] . [0c] . [00] . [05] . [0e] . [06] . [80] . [01] . [bf] . [00] $ [24] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0c] 
0x0c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1d] 
0x1d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x29 , 10)
avrdude: Send: . [1b] . [0d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ) [29] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0d] 
0x0d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,229120,256)
block_size at addr 229120 is 256
STK500V2: stk500v2_loadaddr(-2147369088)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xbf 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x0e 0x00 0x05 0x0e 0x06 0x80 0x01 0xbf 0x80 0xa6 , 11)
avrdude: Send: . [1b] . [0e] . [00] . [05] . [0e] . [06] . [80] . [01] . [bf] . [80] . [a6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0e] 
0x0e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1f] 
0x1f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2b , 10)
avrdude: Send: . [1b] . [0f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] + [2b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0f] 
0x0f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,229376,256)
block_size at addr 229376 is 256
STK500V2: stk500v2_loadaddr(-2147368960)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xc0 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x10 0x00 0x05 0x0e 0x06 0x80 0x01 0xc0 0x00 0x47 , 11)
avrdude: Send: . [1b] . [10] . [00] . [05] . [0e] . [06] . [80] . [01] . [c0] . [00] G [47] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [10] 
0x10 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [01] 
0x01 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x11 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x35 , 10)
avrdude: Send: . [1b] . [11] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 5 [35] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [11] 
0x11 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [12] 
0x12 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,229632,256)
block_size at addr 229632 is 256
STK500V2: stk500v2_loadaddr(-2147368832)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xc0 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x12 0x00 0x05 0x0e 0x06 0x80 0x01 0xc0 0x80 0xc5 , 11)
avrdude: Send: . [1b] . [12] . [00] . [05] . [0e] . [06] . [80] . [01] . [c0] . [80] . [c5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [12] 
0x12 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [03] 
0x03 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x13 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x37 , 10)
avrdude: Send: . [1b] . [13] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 7 [37] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [13] 
0x13 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,229888,256)
block_size at addr 229888 is 256
STK500V2: stk500v2_loadaddr(-2147368704)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xc1 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x14 0x00 0x05 0x0e 0x06 0x80 0x01 0xc1 0x00 0x42 , 11)
avrdude: Send: . [1b] . [14] . [00] . [05] . [0e] . [06] . [80] . [01] . [c1] . [00] B [42] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [14] 
0x14 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [05] 
0x05 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x15 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x31 , 10)
avrdude: Send: . [1b] . [15] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 1 [31] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [15] 
0x15 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [16] 
0x16 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,230144,256)
block_size at addr 230144 is 256
STK500V2: stk500v2_loadaddr(-2147368576)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xc1 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x16 0x00 0x05 0x0e 0x06 0x80 0x01 0xc1 0x80 0xc0 , 11)
avrdude: Send: . [1b] . [16] . [00] . [05] . [0e] . [06] . [80] . [01] . [c1] . [80] . [c0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [16] 
0x16 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [07] 
0x07 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x17 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x33 , 10)
avrdude: Send: . [1b] . [17] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 3 [33] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [17] 
0x17 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [14] 
0x14 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,230400,256)
block_size at addr 230400 is 256
STK500V2: stk500v2_loadaddr(-2147368448)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xc2 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x18 0x00 0x05 0x0e 0x06 0x80 0x01 0xc2 0x00 0x4d , 11)
avrdude: Send: . [1b] . [18] . [00] . [05] . [0e] . [06] . [80] . [01] . [c2] . [00] M [4d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [18] 
0x18 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [09] 
0x09 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x19 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3d , 10)
avrdude: Send: . [1b] . [19] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] = [3d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [19] 
0x19 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1a] 
0x1a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,230656,256)
block_size at addr 230656 is 256
STK500V2: stk500v2_loadaddr(-2147368320)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xc2 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x1a 0x00 0x05 0x0e 0x06 0x80 0x01 0xc2 0x80 0xcf , 11)
avrdude: Send: . [1b] . [1a] . [00] . [05] . [0e] . [06] . [80] . [01] . [c2] . [80] . [cf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1a] 
0x1a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0b] 
0x0b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3f , 10)
avrdude: Send: . [1b] . [1b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ? [3f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1b] 
0x1b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [18] 
0x18 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,230912,256)
block_size at addr 230912 is 256
STK500V2: stk500v2_loadaddr(-2147368192)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xc3 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x1c 0x00 0x05 0x0e 0x06 0x80 0x01 0xc3 0x00 0x48 , 11)
avrdude: Send: . [1b] . [1c] . [00] . [05] . [0e] . [06] . [80] . [01] . [c3] . [00] H [48] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1c] 
0x1c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0d] 
0x0d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x39 , 10)
avrdude: Send: . [1b] . [1d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] 9 [39] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1d] 
0x1d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1e] 
0x1e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,231168,256)
block_size at addr 231168 is 256
STK500V2: stk500v2_loadaddr(-2147368064)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xc3 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x1e 0x00 0x05 0x0e 0x06 0x80 0x01 0xc3 0x80 0xca , 11)
avrdude: Send: . [1b] . [1e] . [00] . [05] . [0e] . [06] . [80] . [01] . [c3] . [80] . [ca] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1e] 
0x1e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x1f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x3b , 10)
avrdude: Send: . [1b] . [1f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ; [3b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [1f] 
0x1f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1c] 
0x1c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,231424,256)
block_size at addr 231424 is 256
STK500V2: stk500v2_loadaddr(-2147367936)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xc4 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x20 0x00 0x05 0x0e 0x06 0x80 0x01 0xc4 0x00 0x73 , 11)
avrdude: Send: . [1b]   [20] . [00] . [05] . [0e] . [06] . [80] . [01] . [c4] . [00] s [73] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv:   [20] 
0x20 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 1 [31] 
0x31 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x21 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x05 , 10)
avrdude: Send: . [1b] ! [21] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [05] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ! [21] 
0x21 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: " [22] 
0x22 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,231680,256)
block_size at addr 231680 is 256
STK500V2: stk500v2_loadaddr(-2147367808)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xc4 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x22 0x00 0x05 0x0e 0x06 0x80 0x01 0xc4 0x80 0xf1 , 11)
avrdude: Send: . [1b] " [22] . [00] . [05] . [0e] . [06] . [80] . [01] . [c4] . [80] . [f1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: " [22] 
0x22 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 3 [33] 
0x33 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x23 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x07 , 10)
avrdude: Send: . [1b] # [23] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [07] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: # [23] 
0x23 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,231936,256)
block_size at addr 231936 is 256
STK500V2: stk500v2_loadaddr(-2147367680)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xc5 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x24 0x00 0x05 0x0e 0x06 0x80 0x01 0xc5 0x00 0x76 , 11)
avrdude: Send: . [1b] $ [24] . [00] . [05] . [0e] . [06] . [80] . [01] . [c5] . [00] v [76] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: $ [24] 
0x24 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 5 [35] 
0x35 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x25 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x01 , 10)
avrdude: Send: . [1b] % [25] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [01] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: % [25] 
0x25 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: & [26] 
0x26 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,232192,256)
block_size at addr 232192 is 256
STK500V2: stk500v2_loadaddr(-2147367552)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xc5 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x26 0x00 0x05 0x0e 0x06 0x80 0x01 0xc5 0x80 0xf4 , 11)
avrdude: Send: . [1b] & [26] . [00] . [05] . [0e] . [06] . [80] . [01] . [c5] . [80] . [f4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: & [26] 
0x26 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 7 [37] 
0x37 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x27 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x03 , 10)
avrdude: Send: . [1b] ' [27] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [03] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ' [27] 
0x27 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: $ [24] 
0x24 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,232448,256)
block_size at addr 232448 is 256
STK500V2: stk500v2_loadaddr(-2147367424)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xc6 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x28 0x00 0x05 0x0e 0x06 0x80 0x01 0xc6 0x00 0x79 , 11)
avrdude: Send: . [1b] ( [28] . [00] . [05] . [0e] . [06] . [80] . [01] . [c6] . [00] y [79] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ( [28] 
0x28 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 9 [39] 
0x39 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x29 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0d , 10)
avrdude: Send: . [1b] ) [29] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ) [29] 
0x29 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: * [2a] 
0x2a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,232704,256)
block_size at addr 232704 is 256
STK500V2: stk500v2_loadaddr(-2147367296)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xc6 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x2a 0x00 0x05 0x0e 0x06 0x80 0x01 0xc6 0x80 0xfb , 11)
avrdude: Send: . [1b] * [2a] . [00] . [05] . [0e] . [06] . [80] . [01] . [c6] . [80] . [fb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: * [2a] 
0x2a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ; [3b] 
0x3b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0f , 10)
avrdude: Send: . [1b] + [2b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: + [2b] 
0x2b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: ( [28] 
0x28 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,232960,256)
block_size at addr 232960 is 256
STK500V2: stk500v2_loadaddr(-2147367168)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xc7 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x2c 0x00 0x05 0x0e 0x06 0x80 0x01 0xc7 0x00 0x7c , 11)
avrdude: Send: . [1b] , [2c] . [00] . [05] . [0e] . [06] . [80] . [01] . [c7] . [00] | [7c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: , [2c] 
0x2c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: = [3d] 
0x3d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x09 , 10)
avrdude: Send: . [1b] - [2d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [09] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: - [2d] 
0x2d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [2e] 
0x2e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,233216,256)
block_size at addr 233216 is 256
STK500V2: stk500v2_loadaddr(-2147367040)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xc7 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x2e 0x00 0x05 0x0e 0x06 0x80 0x01 0xc7 0x80 0xfe , 11)
avrdude: Send: . [1b] . [2e] . [00] . [05] . [0e] . [06] . [80] . [01] . [c7] . [80] . [fe] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [2e] 
0x2e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ? [3f] 
0x3f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x2f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x0b , 10)
avrdude: Send: . [1b] / [2f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [0b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: / [2f] 
0x2f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: , [2c] 
0x2c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,233472,256)
block_size at addr 233472 is 256
STK500V2: stk500v2_loadaddr(-2147366912)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xc8 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x30 0x00 0x05 0x0e 0x06 0x80 0x01 0xc8 0x00 0x6f , 11)
avrdude: Send: . [1b] 0 [30] . [00] . [05] . [0e] . [06] . [80] . [01] . [c8] . [00] o [6f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 0 [30] 
0x30 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ! [21] 
0x21 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x31 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x15 , 10)
avrdude: Send: . [1b] 1 [31] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [15] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 1 [31] 
0x31 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: 2 [32] 
0x32 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,233728,256)
block_size at addr 233728 is 256
STK500V2: stk500v2_loadaddr(-2147366784)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xc8 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x32 0x00 0x05 0x0e 0x06 0x80 0x01 0xc8 0x80 0xed , 11)
avrdude: Send: . [1b] 2 [32] . [00] . [05] . [0e] . [06] . [80] . [01] . [c8] . [80] . [ed] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 2 [32] 
0x32 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: # [23] 
0x23 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x33 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x17 , 10)
avrdude: Send: . [1b] 3 [33] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [17] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 3 [33] 
0x33 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: 0 [30] 
0x30 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,233984,256)
block_size at addr 233984 is 256
STK500V2: stk500v2_loadaddr(-2147366656)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xc9 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x34 0x00 0x05 0x0e 0x06 0x80 0x01 0xc9 0x00 0x6a , 11)
avrdude: Send: . [1b] 4 [34] . [00] . [05] . [0e] . [06] . [80] . [01] . [c9] . [00] j [6a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 4 [34] 
0x34 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: % [25] 
0x25 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x35 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x11 , 10)
avrdude: Send: . [1b] 5 [35] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [11] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 5 [35] 
0x35 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: 6 [36] 
0x36 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,234240,256)
block_size at addr 234240 is 256
STK500V2: stk500v2_loadaddr(-2147366528)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xc9 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x36 0x00 0x05 0x0e 0x06 0x80 0x01 0xc9 0x80 0xe8 , 11)
avrdude: Send: . [1b] 6 [36] . [00] . [05] . [0e] . [06] . [80] . [01] . [c9] . [80] . [e8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 6 [36] 
0x36 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ' [27] 
0x27 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x37 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x13 , 10)
avrdude: Send: . [1b] 7 [37] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [13] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 7 [37] 
0x37 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: 4 [34] 
0x34 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,234496,256)
block_size at addr 234496 is 256
STK500V2: stk500v2_loadaddr(-2147366400)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xca 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x38 0x00 0x05 0x0e 0x06 0x80 0x01 0xca 0x00 0x65 , 11)
avrdude: Send: . [1b] 8 [38] . [00] . [05] . [0e] . [06] . [80] . [01] . [ca] . [00] e [65] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 8 [38] 
0x38 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ) [29] 
0x29 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x39 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1d , 10)
avrdude: Send: . [1b] 9 [39] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: 9 [39] 
0x39 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: : [3a] 
0x3a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,234752,256)
block_size at addr 234752 is 256
STK500V2: stk500v2_loadaddr(-2147366272)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xca 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x3a 0x00 0x05 0x0e 0x06 0x80 0x01 0xca 0x80 0xe7 , 11)
avrdude: Send: . [1b] : [3a] . [00] . [05] . [0e] . [06] . [80] . [01] . [ca] . [80] . [e7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: : [3a] 
0x3a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: + [2b] 
0x2b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1f , 10)
avrdude: Send: . [1b] ; [3b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ; [3b] 
0x3b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: 8 [38] 
0x38 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,235008,256)
block_size at addr 235008 is 256
STK500V2: stk500v2_loadaddr(-2147366144)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xcb 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x3c 0x00 0x05 0x0e 0x06 0x80 0x01 0xcb 0x00 0x60 , 11)
avrdude: Send: . [1b] < [3c] . [00] . [05] . [0e] . [06] . [80] . [01] . [cb] . [00] ` [60] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: < [3c] 
0x3c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: - [2d] 
0x2d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x19 , 10)
avrdude: Send: . [1b] = [3d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [19] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: = [3d] 
0x3d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: > [3e] 
0x3e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,235264,256)
block_size at addr 235264 is 256
STK500V2: stk500v2_loadaddr(-2147366016)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xcb 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x3e 0x00 0x05 0x0e 0x06 0x80 0x01 0xcb 0x80 0xe2 , 11)
avrdude: Send: . [1b] > [3e] . [00] . [05] . [0e] . [06] . [80] . [01] . [cb] . [80] . [e2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: > [3e] 
0x3e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: / [2f] 
0x2f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x3f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x1b , 10)
avrdude: Send: . [1b] ? [3f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [1b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ? [3f] 
0x3f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: < [3c] 
0x3c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,235520,256)
block_size at addr 235520 is 256
STK500V2: stk500v2_loadaddr(-2147365888)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xcc 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x40 0x00 0x05 0x0e 0x06 0x80 0x01 0xcc 0x00 0x1b , 11)
avrdude: Send: . [1b] @ [40] . [00] . [05] . [0e] . [06] . [80] . [01] . [cc] . [00] . [1b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: @ [40] 
0x40 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Q [51] 
0x51 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x41 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x65 , 10)
avrdude: Send: . [1b] A [41] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] e [65] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: A [41] 
0x41 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: B [42] 
0x42 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,235776,256)
block_size at addr 235776 is 256
STK500V2: stk500v2_loadaddr(-2147365760)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xcc 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x42 0x00 0x05 0x0e 0x06 0x80 0x01 0xcc 0x80 0x99 , 11)
avrdude: Send: . [1b] B [42] . [00] . [05] . [0e] . [06] . [80] . [01] . [cc] . [80] . [99] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: B [42] 
0x42 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: S [53] 
0x53 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x43 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x67 , 10)
avrdude: Send: . [1b] C [43] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] g [67] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: C [43] 
0x43 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,236032,256)
block_size at addr 236032 is 256
STK500V2: stk500v2_loadaddr(-2147365632)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xcd 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x44 0x00 0x05 0x0e 0x06 0x80 0x01 0xcd 0x00 0x1e , 11)
avrdude: Send: . [1b] D [44] . [00] . [05] . [0e] . [06] . [80] . [01] . [cd] . [00] . [1e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: D [44] 
0x44 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: U [55] 
0x55 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x45 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x61 , 10)
avrdude: Send: . [1b] E [45] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] a [61] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: E [45] 
0x45 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: F [46] 
0x46 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,236288,256)
block_size at addr 236288 is 256
STK500V2: stk500v2_loadaddr(-2147365504)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xcd 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x46 0x00 0x05 0x0e 0x06 0x80 0x01 0xcd 0x80 0x9c , 11)
avrdude: Send: . [1b] F [46] . [00] . [05] . [0e] . [06] . [80] . [01] . [cd] . [80] . [9c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: F [46] 
0x46 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: W [57] 
0x57 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x47 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x63 , 10)
avrdude: Send: . [1b] G [47] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] c [63] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: G [47] 
0x47 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: D [44] 
0x44 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,236544,256)
block_size at addr 236544 is 256
STK500V2: stk500v2_loadaddr(-2147365376)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xce 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x48 0x00 0x05 0x0e 0x06 0x80 0x01 0xce 0x00 0x11 , 11)
avrdude: Send: . [1b] H [48] . [00] . [05] . [0e] . [06] . [80] . [01] . [ce] . [00] . [11] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: H [48] 
0x48 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Y [59] 
0x59 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x49 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6d , 10)
avrdude: Send: . [1b] I [49] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] m [6d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: I [49] 
0x49 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: J [4a] 
0x4a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,236800,256)
block_size at addr 236800 is 256
STK500V2: stk500v2_loadaddr(-2147365248)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xce 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x4a 0x00 0x05 0x0e 0x06 0x80 0x01 0xce 0x80 0x93 , 11)
avrdude: Send: . [1b] J [4a] . [00] . [05] . [0e] . [06] . [80] . [01] . [ce] . [80] . [93] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: J [4a] 
0x4a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: [ [5b] 
0x5b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6f , 10)
avrdude: Send: . [1b] K [4b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] o [6f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: K [4b] 
0x4b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,237056,256)
block_size at addr 237056 is 256
STK500V2: stk500v2_loadaddr(-2147365120)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xcf 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x4c 0x00 0x05 0x0e 0x06 0x80 0x01 0xcf 0x00 0x14 , 11)
avrdude: Send: . [1b] L [4c] . [00] . [05] . [0e] . [06] . [80] . [01] . [cf] . [00] . [14] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: L [4c] 
0x4c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ] [5d] 
0x5d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x69 , 10)
avrdude: Send: . [1b] M [4d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] i [69] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: M [4d] 
0x4d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: N [4e] 
0x4e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,237312,256)
block_size at addr 237312 is 256
STK500V2: stk500v2_loadaddr(-2147364992)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xcf 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x4e 0x00 0x05 0x0e 0x06 0x80 0x01 0xcf 0x80 0x96 , 11)
avrdude: Send: . [1b] N [4e] . [00] . [05] . [0e] . [06] . [80] . [01] . [cf] . [80] . [96] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: N [4e] 
0x4e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: _ [5f] 
0x5f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x4f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x6b , 10)
avrdude: Send: . [1b] O [4f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] k [6b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: O [4f] 
0x4f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: L [4c] 
0x4c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,237568,256)
block_size at addr 237568 is 256
STK500V2: stk500v2_loadaddr(-2147364864)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xd0 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x50 0x00 0x05 0x0e 0x06 0x80 0x01 0xd0 0x00 0x17 , 11)
avrdude: Send: . [1b] P [50] . [00] . [05] . [0e] . [06] . [80] . [01] . [d0] . [00] . [17] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: P [50] 
0x50 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x51 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x75 , 10)
avrdude: Send: . [1b] Q [51] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] u [75] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Q [51] 
0x51 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,237824,256)
block_size at addr 237824 is 256
STK500V2: stk500v2_loadaddr(-2147364736)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xd0 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x52 0x00 0x05 0x0e 0x06 0x80 0x01 0xd0 0x80 0x95 , 11)
avrdude: Send: . [1b] R [52] . [00] . [05] . [0e] . [06] . [80] . [01] . [d0] . [80] . [95] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: R [52] 
0x52 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: C [43] 
0x43 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x53 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x77 , 10)
avrdude: Send: . [1b] S [53] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] w [77] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: S [53] 
0x53 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,238080,256)
block_size at addr 238080 is 256
STK500V2: stk500v2_loadaddr(-2147364608)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xd1 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x54 0x00 0x05 0x0e 0x06 0x80 0x01 0xd1 0x00 0x12 , 11)
avrdude: Send: . [1b] T [54] . [00] . [05] . [0e] . [06] . [80] . [01] . [d1] . [00] . [12] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: T [54] 
0x54 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x55 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x71 , 10)
avrdude: Send: . [1b] U [55] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] q [71] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: U [55] 
0x55 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,238336,256)
block_size at addr 238336 is 256
STK500V2: stk500v2_loadaddr(-2147364480)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xd1 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x56 0x00 0x05 0x0e 0x06 0x80 0x01 0xd1 0x80 0x90 , 11)
avrdude: Send: . [1b] V [56] . [00] . [05] . [0e] . [06] . [80] . [01] . [d1] . [80] . [90] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: V [56] 
0x56 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: G [47] 
0x47 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x57 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x73 , 10)
avrdude: Send: . [1b] W [57] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] s [73] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: W [57] 
0x57 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: T [54] 
0x54 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,238592,256)
block_size at addr 238592 is 256
STK500V2: stk500v2_loadaddr(-2147364352)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xd2 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x58 0x00 0x05 0x0e 0x06 0x80 0x01 0xd2 0x00 0x1d , 11)
avrdude: Send: . [1b] X [58] . [00] . [05] . [0e] . [06] . [80] . [01] . [d2] . [00] . [1d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: X [58] 
0x58 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: I [49] 
0x49 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x59 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7d , 10)
avrdude: Send: . [1b] Y [59] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] } [7d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Y [59] 
0x59 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: Z [5a] 
0x5a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,238848,256)
block_size at addr 238848 is 256
STK500V2: stk500v2_loadaddr(-2147364224)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xd2 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x5a 0x00 0x05 0x0e 0x06 0x80 0x01 0xd2 0x80 0x9f , 11)
avrdude: Send: . [1b] Z [5a] . [00] . [05] . [0e] . [06] . [80] . [01] . [d2] . [80] . [9f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: Z [5a] 
0x5a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: K [4b] 
0x4b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7f , 10)
avrdude: Send: . [1b] [ [5b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [7f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: [ [5b] 
0x5b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: X [58] 
0x58 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,239104,256)
block_size at addr 239104 is 256
STK500V2: stk500v2_loadaddr(-2147364096)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xd3 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x5c 0x00 0x05 0x0e 0x06 0x80 0x01 0xd3 0x00 0x18 , 11)
avrdude: Send: . [1b] \ [5c] . [00] . [05] . [0e] . [06] . [80] . [01] . [d3] . [00] . [18] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: \ [5c] 
0x5c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x79 , 10)
avrdude: Send: . [1b] ] [5d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] y [79] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ] [5d] 
0x5d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: ^ [5e] 
0x5e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,239360,256)
block_size at addr 239360 is 256
STK500V2: stk500v2_loadaddr(-2147363968)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xd3 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x5e 0x00 0x05 0x0e 0x06 0x80 0x01 0xd3 0x80 0x9a , 11)
avrdude: Send: . [1b] ^ [5e] . [00] . [05] . [0e] . [06] . [80] . [01] . [d3] . [80] . [9a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ^ [5e] 
0x5e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: O [4f] 
0x4f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x5f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x7b , 10)
avrdude: Send: . [1b] _ [5f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] { [7b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: _ [5f] 
0x5f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: \ [5c] 
0x5c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,239616,256)
block_size at addr 239616 is 256
STK500V2: stk500v2_loadaddr(-2147363840)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xd4 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x60 0x00 0x05 0x0e 0x06 0x80 0x01 0xd4 0x00 0x23 , 11)
avrdude: Send: . [1b] ` [60] . [00] . [05] . [0e] . [06] . [80] . [01] . [d4] . [00] # [23] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ` [60] 
0x60 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: q [71] 
0x71 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x61 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x45 , 10)
avrdude: Send: . [1b] a [61] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] E [45] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: a [61] 
0x61 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: b [62] 
0x62 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,239872,256)
block_size at addr 239872 is 256
STK500V2: stk500v2_loadaddr(-2147363712)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xd4 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x62 0x00 0x05 0x0e 0x06 0x80 0x01 0xd4 0x80 0xa1 , 11)
avrdude: Send: . [1b] b [62] . [00] . [05] . [0e] . [06] . [80] . [01] . [d4] . [80] . [a1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: b [62] 
0x62 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: s [73] 
0x73 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x63 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x47 , 10)
avrdude: Send: . [1b] c [63] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] G [47] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: c [63] 
0x63 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: ` [60] 
0x60 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,240128,256)
block_size at addr 240128 is 256
STK500V2: stk500v2_loadaddr(-2147363584)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xd5 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x64 0x00 0x05 0x0e 0x06 0x80 0x01 0xd5 0x00 0x26 , 11)
avrdude: Send: . [1b] d [64] . [00] . [05] . [0e] . [06] . [80] . [01] . [d5] . [00] & [26] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: d [64] 
0x64 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: u [75] 
0x75 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x65 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x41 , 10)
avrdude: Send: . [1b] e [65] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] A [41] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: e [65] 
0x65 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: f [66] 
0x66 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,240384,256)
block_size at addr 240384 is 256
STK500V2: stk500v2_loadaddr(-2147363456)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xd5 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x66 0x00 0x05 0x0e 0x06 0x80 0x01 0xd5 0x80 0xa4 , 11)
avrdude: Send: . [1b] f [66] . [00] . [05] . [0e] . [06] . [80] . [01] . [d5] . [80] . [a4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: f [66] 
0x66 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: w [77] 
0x77 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x67 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x43 , 10)
avrdude: Send: . [1b] g [67] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] C [43] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: g [67] 
0x67 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: d [64] 
0x64 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,240640,256)
block_size at addr 240640 is 256
STK500V2: stk500v2_loadaddr(-2147363328)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xd6 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x68 0x00 0x05 0x0e 0x06 0x80 0x01 0xd6 0x00 0x29 , 11)
avrdude: Send: . [1b] h [68] . [00] . [05] . [0e] . [06] . [80] . [01] . [d6] . [00] ) [29] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: h [68] 
0x68 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: y [79] 
0x79 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x69 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4d , 10)
avrdude: Send: . [1b] i [69] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] M [4d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: i [69] 
0x69 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: j [6a] 
0x6a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,240896,256)
block_size at addr 240896 is 256
STK500V2: stk500v2_loadaddr(-2147363200)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xd6 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x6a 0x00 0x05 0x0e 0x06 0x80 0x01 0xd6 0x80 0xab , 11)
avrdude: Send: . [1b] j [6a] . [00] . [05] . [0e] . [06] . [80] . [01] . [d6] . [80] . [ab] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: j [6a] 
0x6a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: { [7b] 
0x7b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4f , 10)
avrdude: Send: . [1b] k [6b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] O [4f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: k [6b] 
0x6b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: h [68] 
0x68 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,241152,256)
block_size at addr 241152 is 256
STK500V2: stk500v2_loadaddr(-2147363072)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xd7 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x6c 0x00 0x05 0x0e 0x06 0x80 0x01 0xd7 0x00 0x2c , 11)
avrdude: Send: . [1b] l [6c] . [00] . [05] . [0e] . [06] . [80] . [01] . [d7] . [00] , [2c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: l [6c] 
0x6c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: } [7d] 
0x7d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x49 , 10)
avrdude: Send: . [1b] m [6d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] I [49] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: m [6d] 
0x6d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: n [6e] 
0x6e 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,241408,256)
block_size at addr 241408 is 256
STK500V2: stk500v2_loadaddr(-2147362944)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xd7 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x6e 0x00 0x05 0x0e 0x06 0x80 0x01 0xd7 0x80 0xae , 11)
avrdude: Send: . [1b] n [6e] . [00] . [05] . [0e] . [06] . [80] . [01] . [d7] . [80] . [ae] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: n [6e] 
0x6e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [7f] 
0x7f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x6f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x4b , 10)
avrdude: Send: . [1b] o [6f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] K [4b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: o [6f] 
0x6f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: l [6c] 
0x6c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,241664,256)
block_size at addr 241664 is 256
STK500V2: stk500v2_loadaddr(-2147362816)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xd8 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x70 0x00 0x05 0x0e 0x06 0x80 0x01 0xd8 0x00 0x3f , 11)
avrdude: Send: . [1b] p [70] . [00] . [05] . [0e] . [06] . [80] . [01] . [d8] . [00] ? [3f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: p [70] 
0x70 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: a [61] 
0x61 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x71 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x55 , 10)
avrdude: Send: . [1b] q [71] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] U [55] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: q [71] 
0x71 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: r [72] 
0x72 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,241920,256)
block_size at addr 241920 is 256
STK500V2: stk500v2_loadaddr(-2147362688)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xd8 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x72 0x00 0x05 0x0e 0x06 0x80 0x01 0xd8 0x80 0xbd , 11)
avrdude: Send: . [1b] r [72] . [00] . [05] . [0e] . [06] . [80] . [01] . [d8] . [80] . [bd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: r [72] 
0x72 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: c [63] 
0x63 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x73 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x57 , 10)
avrdude: Send: . [1b] s [73] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] W [57] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: s [73] 
0x73 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,242176,256)
block_size at addr 242176 is 256
STK500V2: stk500v2_loadaddr(-2147362560)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xd9 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x74 0x00 0x05 0x0e 0x06 0x80 0x01 0xd9 0x00 0x3a , 11)
avrdude: Send: . [1b] t [74] . [00] . [05] . [0e] . [06] . [80] . [01] . [d9] . [00] : [3a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: t [74] 
0x74 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: e [65] 
0x65 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x75 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x51 , 10)
avrdude: Send: . [1b] u [75] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] Q [51] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: u [75] 
0x75 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: v [76] 
0x76 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,242432,256)
block_size at addr 242432 is 256
STK500V2: stk500v2_loadaddr(-2147362432)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xd9 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x76 0x00 0x05 0x0e 0x06 0x80 0x01 0xd9 0x80 0xb8 , 11)
avrdude: Send: . [1b] v [76] . [00] . [05] . [0e] . [06] . [80] . [01] . [d9] . [80] . [b8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: v [76] 
0x76 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: g [67] 
0x67 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x77 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x53 , 10)
avrdude: Send: . [1b] w [77] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] S [53] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: w [77] 
0x77 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: t [74] 
0x74 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,242688,256)
block_size at addr 242688 is 256
STK500V2: stk500v2_loadaddr(-2147362304)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xda 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x78 0x00 0x05 0x0e 0x06 0x80 0x01 0xda 0x00 0x35 , 11)
avrdude: Send: . [1b] x [78] . [00] . [05] . [0e] . [06] . [80] . [01] . [da] . [00] 5 [35] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: x [78] 
0x78 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: i [69] 
0x69 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x79 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5d , 10)
avrdude: Send: . [1b] y [79] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ] [5d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: y [79] 
0x79 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: z [7a] 
0x7a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,242944,256)
block_size at addr 242944 is 256
STK500V2: stk500v2_loadaddr(-2147362176)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xda 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x7a 0x00 0x05 0x0e 0x06 0x80 0x01 0xda 0x80 0xb7 , 11)
avrdude: Send: . [1b] z [7a] . [00] . [05] . [0e] . [06] . [80] . [01] . [da] . [80] . [b7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: z [7a] 
0x7a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: k [6b] 
0x6b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5f , 10)
avrdude: Send: . [1b] { [7b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] _ [5f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: { [7b] 
0x7b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: x [78] 
0x78 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,243200,256)
block_size at addr 243200 is 256
STK500V2: stk500v2_loadaddr(-2147362048)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xdb 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x7c 0x00 0x05 0x0e 0x06 0x80 0x01 0xdb 0x00 0x30 , 11)
avrdude: Send: . [1b] | [7c] . [00] . [05] . [0e] . [06] . [80] . [01] . [db] . [00] 0 [30] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: | [7c] 
0x7c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: m [6d] 
0x6d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x59 , 10)
avrdude: Send: . [1b] } [7d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] Y [59] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: } [7d] 
0x7d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: ~ [7e] 
0x7e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,243456,256)
block_size at addr 243456 is 256
STK500V2: stk500v2_loadaddr(-2147361920)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xdb 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x7e 0x00 0x05 0x0e 0x06 0x80 0x01 0xdb 0x80 0xb2 , 11)
avrdude: Send: . [1b] ~ [7e] . [00] . [05] . [0e] . [06] . [80] . [01] . [db] . [80] . [b2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: ~ [7e] 
0x7e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: o [6f] 
0x6f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x7f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x5b , 10)
avrdude: Send: . [1b] . [7f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] [ [5b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [7f] 
0x7f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: | [7c] 
0x7c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,243712,256)
block_size at addr 243712 is 256
STK500V2: stk500v2_loadaddr(-2147361792)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xdc 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x80 0x00 0x05 0x0e 0x06 0x80 0x01 0xdc 0x00 0xcb , 11)
avrdude: Send: . [1b] . [80] . [00] . [05] . [0e] . [06] . [80] . [01] . [dc] . [00] . [cb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [80] 
0x80 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x81 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa5 , 10)
avrdude: Send: . [1b] . [81] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [81] 
0x81 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,243968,256)
block_size at addr 243968 is 256
STK500V2: stk500v2_loadaddr(-2147361664)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xdc 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x82 0x00 0x05 0x0e 0x06 0x80 0x01 0xdc 0x80 0x49 , 11)
avrdude: Send: . [1b] . [82] . [00] . [05] . [0e] . [06] . [80] . [01] . [dc] . [80] I [49] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [82] 
0x82 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x83 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa7 , 10)
avrdude: Send: . [1b] . [83] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [83] 
0x83 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,244224,256)
block_size at addr 244224 is 256
STK500V2: stk500v2_loadaddr(-2147361536)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xdd 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x84 0x00 0x05 0x0e 0x06 0x80 0x01 0xdd 0x00 0xce , 11)
avrdude: Send: . [1b] . [84] . [00] . [05] . [0e] . [06] . [80] . [01] . [dd] . [00] . [ce] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [84] 
0x84 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [95] 
0x95 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x85 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa1 , 10)
avrdude: Send: . [1b] . [85] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [85] 
0x85 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,244480,256)
block_size at addr 244480 is 256
STK500V2: stk500v2_loadaddr(-2147361408)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xdd 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x86 0x00 0x05 0x0e 0x06 0x80 0x01 0xdd 0x80 0x4c , 11)
avrdude: Send: . [1b] . [86] . [00] . [05] . [0e] . [06] . [80] . [01] . [dd] . [80] L [4c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [86] 
0x86 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [97] 
0x97 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x87 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa3 , 10)
avrdude: Send: . [1b] . [87] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [87] 
0x87 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [84] 
0x84 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,244736,256)
block_size at addr 244736 is 256
STK500V2: stk500v2_loadaddr(-2147361280)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xde 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x88 0x00 0x05 0x0e 0x06 0x80 0x01 0xde 0x00 0xc1 , 11)
avrdude: Send: . [1b] . [88] . [00] . [05] . [0e] . [06] . [80] . [01] . [de] . [00] . [c1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [88] 
0x88 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [99] 
0x99 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x89 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xad , 10)
avrdude: Send: . [1b] . [89] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ad] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [89] 
0x89 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8a] 
0x8a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,244992,256)
block_size at addr 244992 is 256
STK500V2: stk500v2_loadaddr(-2147361152)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xde 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x8a 0x00 0x05 0x0e 0x06 0x80 0x01 0xde 0x80 0x43 , 11)
avrdude: Send: . [1b] . [8a] . [00] . [05] . [0e] . [06] . [80] . [01] . [de] . [80] C [43] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8a] 
0x8a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9b] 
0x9b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xaf , 10)
avrdude: Send: . [1b] . [8b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [af] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8b] 
0x8b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,245248,256)
block_size at addr 245248 is 256
STK500V2: stk500v2_loadaddr(-2147361024)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xdf 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x8c 0x00 0x05 0x0e 0x06 0x80 0x01 0xdf 0x00 0xc4 , 11)
avrdude: Send: . [1b] . [8c] . [00] . [05] . [0e] . [06] . [80] . [01] . [df] . [00] . [c4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8c] 
0x8c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9d] 
0x9d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xa9 , 10)
avrdude: Send: . [1b] . [8d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [a9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8d] 
0x8d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8e] 
0x8e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,245504,256)
block_size at addr 245504 is 256
STK500V2: stk500v2_loadaddr(-2147360896)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xdf 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x8e 0x00 0x05 0x0e 0x06 0x80 0x01 0xdf 0x80 0x46 , 11)
avrdude: Send: . [1b] . [8e] . [00] . [05] . [0e] . [06] . [80] . [01] . [df] . [80] F [46] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8e] 
0x8e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9f] 
0x9f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x8f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xab , 10)
avrdude: Send: . [1b] . [8f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ab] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [8f] 
0x8f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8c] 
0x8c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,245760,256)
block_size at addr 245760 is 256
STK500V2: stk500v2_loadaddr(-2147360768)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xe0 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x90 0x00 0x05 0x0e 0x06 0x80 0x01 0xe0 0x00 0xe7 , 11)
avrdude: Send: . [1b] . [90] . [00] . [05] . [0e] . [06] . [80] . [01] . [e0] . [00] . [e7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [90] 
0x90 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x91 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb5 , 10)
avrdude: Send: . [1b] . [91] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [91] 
0x91 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [92] 
0x92 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,246016,256)
block_size at addr 246016 is 256
STK500V2: stk500v2_loadaddr(-2147360640)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xe0 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x92 0x00 0x05 0x0e 0x06 0x80 0x01 0xe0 0x80 0x65 , 11)
avrdude: Send: . [1b] . [92] . [00] . [05] . [0e] . [06] . [80] . [01] . [e0] . [80] e [65] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [92] 
0x92 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [83] 
0x83 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x93 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb7 , 10)
avrdude: Send: . [1b] . [93] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [93] 
0x93 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,246272,256)
block_size at addr 246272 is 256
STK500V2: stk500v2_loadaddr(-2147360512)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xe1 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x94 0x00 0x05 0x0e 0x06 0x80 0x01 0xe1 0x00 0xe2 , 11)
avrdude: Send: . [1b] . [94] . [00] . [05] . [0e] . [06] . [80] . [01] . [e1] . [00] . [e2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [94] 
0x94 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [85] 
0x85 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x95 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb1 , 10)
avrdude: Send: . [1b] . [95] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [95] 
0x95 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [96] 
0x96 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,246528,256)
block_size at addr 246528 is 256
STK500V2: stk500v2_loadaddr(-2147360384)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xe1 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x96 0x00 0x05 0x0e 0x06 0x80 0x01 0xe1 0x80 0x60 , 11)
avrdude: Send: . [1b] . [96] . [00] . [05] . [0e] . [06] . [80] . [01] . [e1] . [80] ` [60] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [96] 
0x96 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x97 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb3 , 10)
avrdude: Send: . [1b] . [97] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [97] 
0x97 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [94] 
0x94 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,246784,256)
block_size at addr 246784 is 256
STK500V2: stk500v2_loadaddr(-2147360256)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xe2 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x98 0x00 0x05 0x0e 0x06 0x80 0x01 0xe2 0x00 0xed , 11)
avrdude: Send: . [1b] . [98] . [00] . [05] . [0e] . [06] . [80] . [01] . [e2] . [00] . [ed] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [98] 
0x98 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [89] 
0x89 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x99 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbd , 10)
avrdude: Send: . [1b] . [99] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [99] 
0x99 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9a] 
0x9a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,247040,256)
block_size at addr 247040 is 256
STK500V2: stk500v2_loadaddr(-2147360128)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xe2 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x9a 0x00 0x05 0x0e 0x06 0x80 0x01 0xe2 0x80 0x6f , 11)
avrdude: Send: . [1b] . [9a] . [00] . [05] . [0e] . [06] . [80] . [01] . [e2] . [80] o [6f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9a] 
0x9a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8b] 
0x8b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbf , 10)
avrdude: Send: . [1b] . [9b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9b] 
0x9b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [98] 
0x98 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,247296,256)
block_size at addr 247296 is 256
STK500V2: stk500v2_loadaddr(-2147360000)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xe3 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x9c 0x00 0x05 0x0e 0x06 0x80 0x01 0xe3 0x00 0xe8 , 11)
avrdude: Send: . [1b] . [9c] . [00] . [05] . [0e] . [06] . [80] . [01] . [e3] . [00] . [e8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9c] 
0x9c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xb9 , 10)
avrdude: Send: . [1b] . [9d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [b9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9d] 
0x9d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9e] 
0x9e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,247552,256)
block_size at addr 247552 is 256
STK500V2: stk500v2_loadaddr(-2147359872)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xe3 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x9e 0x00 0x05 0x0e 0x06 0x80 0x01 0xe3 0x80 0x6a , 11)
avrdude: Send: . [1b] . [9e] . [00] . [05] . [0e] . [06] . [80] . [01] . [e3] . [80] j [6a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9e] 
0x9e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x9f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xbb , 10)
avrdude: Send: . [1b] . [9f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [bb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [9f] 
0x9f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9c] 
0x9c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,247808,256)
block_size at addr 247808 is 256
STK500V2: stk500v2_loadaddr(-2147359744)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xe4 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa0 0x00 0x05 0x0e 0x06 0x80 0x01 0xe4 0x00 0xd3 , 11)
avrdude: Send: . [1b] . [a0] . [00] . [05] . [0e] . [06] . [80] . [01] . [e4] . [00] . [d3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a0] 
0xa0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b1] 
0xb1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x85 , 10)
avrdude: Send: . [1b] . [a1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [85] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a1] 
0xa1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a2] 
0xa2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,248064,256)
block_size at addr 248064 is 256
STK500V2: stk500v2_loadaddr(-2147359616)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xe4 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xa2 0x00 0x05 0x0e 0x06 0x80 0x01 0xe4 0x80 0x51 , 11)
avrdude: Send: . [1b] . [a2] . [00] . [05] . [0e] . [06] . [80] . [01] . [e4] . [80] Q [51] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a2] 
0xa2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b3] 
0xb3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x87 , 10)
avrdude: Send: . [1b] . [a3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [87] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a3] 
0xa3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a0] 
0xa0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,248320,256)
block_size at addr 248320 is 256
STK500V2: stk500v2_loadaddr(-2147359488)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xe5 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa4 0x00 0x05 0x0e 0x06 0x80 0x01 0xe5 0x00 0xd6 , 11)
avrdude: Send: . [1b] . [a4] . [00] . [05] . [0e] . [06] . [80] . [01] . [e5] . [00] . [d6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a4] 
0xa4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b5] 
0xb5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x81 , 10)
avrdude: Send: . [1b] . [a5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [81] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a5] 
0xa5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a6] 
0xa6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,248576,256)
block_size at addr 248576 is 256
STK500V2: stk500v2_loadaddr(-2147359360)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xe5 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xa6 0x00 0x05 0x0e 0x06 0x80 0x01 0xe5 0x80 0x54 , 11)
avrdude: Send: . [1b] . [a6] . [00] . [05] . [0e] . [06] . [80] . [01] . [e5] . [80] T [54] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a6] 
0xa6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b7] 
0xb7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x83 , 10)
avrdude: Send: . [1b] . [a7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [83] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a7] 
0xa7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a4] 
0xa4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,248832,256)
block_size at addr 248832 is 256
STK500V2: stk500v2_loadaddr(-2147359232)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xe6 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xa8 0x00 0x05 0x0e 0x06 0x80 0x01 0xe6 0x00 0xd9 , 11)
avrdude: Send: . [1b] . [a8] . [00] . [05] . [0e] . [06] . [80] . [01] . [e6] . [00] . [d9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a8] 
0xa8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b9] 
0xb9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xa9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8d , 10)
avrdude: Send: . [1b] . [a9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [a9] 
0xa9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [aa] 
0xaa 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,249088,256)
block_size at addr 249088 is 256
STK500V2: stk500v2_loadaddr(-2147359104)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xe6 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xaa 0x00 0x05 0x0e 0x06 0x80 0x01 0xe6 0x80 0x5b , 11)
avrdude: Send: . [1b] . [aa] . [00] . [05] . [0e] . [06] . [80] . [01] . [e6] . [80] [ [5b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [aa] 
0xaa hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bb] 
0xbb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xab 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8f , 10)
avrdude: Send: . [1b] . [ab] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ab] 
0xab hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a8] 
0xa8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,249344,256)
block_size at addr 249344 is 256
STK500V2: stk500v2_loadaddr(-2147358976)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xe7 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xac 0x00 0x05 0x0e 0x06 0x80 0x01 0xe7 0x00 0xdc , 11)
avrdude: Send: . [1b] . [ac] . [00] . [05] . [0e] . [06] . [80] . [01] . [e7] . [00] . [dc] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ac] 
0xac hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bd] 
0xbd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xad 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x89 , 10)
avrdude: Send: . [1b] . [ad] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [89] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ad] 
0xad hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ae] 
0xae 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,249600,256)
block_size at addr 249600 is 256
STK500V2: stk500v2_loadaddr(-2147358848)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xe7 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xae 0x00 0x05 0x0e 0x06 0x80 0x01 0xe7 0x80 0x5e , 11)
avrdude: Send: . [1b] . [ae] . [00] . [05] . [0e] . [06] . [80] . [01] . [e7] . [80] ^ [5e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ae] 
0xae hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bf] 
0xbf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xaf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x8b , 10)
avrdude: Send: . [1b] . [af] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [8b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [af] 
0xaf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ac] 
0xac 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,249856,256)
block_size at addr 249856 is 256
STK500V2: stk500v2_loadaddr(-2147358720)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xe8 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb0 0x00 0x05 0x0e 0x06 0x80 0x01 0xe8 0x00 0xcf , 11)
avrdude: Send: . [1b] . [b0] . [00] . [05] . [0e] . [06] . [80] . [01] . [e8] . [00] . [cf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b0] 
0xb0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a1] 
0xa1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x95 , 10)
avrdude: Send: . [1b] . [b1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [95] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b1] 
0xb1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b2] 
0xb2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,250112,256)
block_size at addr 250112 is 256
STK500V2: stk500v2_loadaddr(-2147358592)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xe8 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xb2 0x00 0x05 0x0e 0x06 0x80 0x01 0xe8 0x80 0x4d , 11)
avrdude: Send: . [1b] . [b2] . [00] . [05] . [0e] . [06] . [80] . [01] . [e8] . [80] M [4d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b2] 
0xb2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a3] 
0xa3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x97 , 10)
avrdude: Send: . [1b] . [b3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [97] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b3] 
0xb3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b0] 
0xb0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,250368,256)
block_size at addr 250368 is 256
STK500V2: stk500v2_loadaddr(-2147358464)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xe9 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb4 0x00 0x05 0x0e 0x06 0x80 0x01 0xe9 0x00 0xca , 11)
avrdude: Send: . [1b] . [b4] . [00] . [05] . [0e] . [06] . [80] . [01] . [e9] . [00] . [ca] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b4] 
0xb4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a5] 
0xa5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x91 , 10)
avrdude: Send: . [1b] . [b5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [91] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b5] 
0xb5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b6] 
0xb6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,250624,256)
block_size at addr 250624 is 256
STK500V2: stk500v2_loadaddr(-2147358336)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xe9 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xb6 0x00 0x05 0x0e 0x06 0x80 0x01 0xe9 0x80 0x48 , 11)
avrdude: Send: . [1b] . [b6] . [00] . [05] . [0e] . [06] . [80] . [01] . [e9] . [80] H [48] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b6] 
0xb6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a7] 
0xa7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x93 , 10)
avrdude: Send: . [1b] . [b7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [93] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b7] 
0xb7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b4] 
0xb4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,250880,256)
block_size at addr 250880 is 256
STK500V2: stk500v2_loadaddr(-2147358208)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xea 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xb8 0x00 0x05 0x0e 0x06 0x80 0x01 0xea 0x00 0xc5 , 11)
avrdude: Send: . [1b] . [b8] . [00] . [05] . [0e] . [06] . [80] . [01] . [ea] . [00] . [c5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b8] 
0xb8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a9] 
0xa9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xb9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9d , 10)
avrdude: Send: . [1b] . [b9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [b9] 
0xb9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ba] 
0xba 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,251136,256)
block_size at addr 251136 is 256
STK500V2: stk500v2_loadaddr(-2147358080)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xea 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xba 0x00 0x05 0x0e 0x06 0x80 0x01 0xea 0x80 0x47 , 11)
avrdude: Send: . [1b] . [ba] . [00] . [05] . [0e] . [06] . [80] . [01] . [ea] . [80] G [47] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ba] 
0xba hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ab] 
0xab 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9f , 10)
avrdude: Send: . [1b] . [bb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bb] 
0xbb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [b8] 
0xb8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,251392,256)
block_size at addr 251392 is 256
STK500V2: stk500v2_loadaddr(-2147357952)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xeb 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xbc 0x00 0x05 0x0e 0x06 0x80 0x01 0xeb 0x00 0xc0 , 11)
avrdude: Send: . [1b] . [bc] . [00] . [05] . [0e] . [06] . [80] . [01] . [eb] . [00] . [c0] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bc] 
0xbc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ad] 
0xad 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x99 , 10)
avrdude: Send: . [1b] . [bd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [99] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bd] 
0xbd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [be] 
0xbe 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,251648,256)
block_size at addr 251648 is 256
STK500V2: stk500v2_loadaddr(-2147357824)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xeb 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xbe 0x00 0x05 0x0e 0x06 0x80 0x01 0xeb 0x80 0x42 , 11)
avrdude: Send: . [1b] . [be] . [00] . [05] . [0e] . [06] . [80] . [01] . [eb] . [80] B [42] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [be] 
0xbe hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [af] 
0xaf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xbf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x9b , 10)
avrdude: Send: . [1b] . [bf] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [9b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [bf] 
0xbf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bc] 
0xbc 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,251904,256)
block_size at addr 251904 is 256
STK500V2: stk500v2_loadaddr(-2147357696)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xec 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc0 0x00 0x05 0x0e 0x06 0x80 0x01 0xec 0x00 0xbb , 11)
avrdude: Send: . [1b] . [c0] . [00] . [05] . [0e] . [06] . [80] . [01] . [ec] . [00] . [bb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c0] 
0xc0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d1] 
0xd1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe5 , 10)
avrdude: Send: . [1b] . [c1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c1] 
0xc1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c2] 
0xc2 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,252160,256)
block_size at addr 252160 is 256
STK500V2: stk500v2_loadaddr(-2147357568)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xec 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xc2 0x00 0x05 0x0e 0x06 0x80 0x01 0xec 0x80 0x39 , 11)
avrdude: Send: . [1b] . [c2] . [00] . [05] . [0e] . [06] . [80] . [01] . [ec] . [80] 9 [39] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c2] 
0xc2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d3] 
0xd3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe7 , 10)
avrdude: Send: . [1b] . [c3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c3] 
0xc3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,252416,256)
block_size at addr 252416 is 256
STK500V2: stk500v2_loadaddr(-2147357440)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xed 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc4 0x00 0x05 0x0e 0x06 0x80 0x01 0xed 0x00 0xbe , 11)
avrdude: Send: . [1b] . [c4] . [00] . [05] . [0e] . [06] . [80] . [01] . [ed] . [00] . [be] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c4] 
0xc4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d5] 
0xd5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe1 , 10)
avrdude: Send: . [1b] . [c5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c5] 
0xc5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c6] 
0xc6 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,252672,256)
block_size at addr 252672 is 256
STK500V2: stk500v2_loadaddr(-2147357312)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xed 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xc6 0x00 0x05 0x0e 0x06 0x80 0x01 0xed 0x80 0x3c , 11)
avrdude: Send: . [1b] . [c6] . [00] . [05] . [0e] . [06] . [80] . [01] . [ed] . [80] < [3c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c6] 
0xc6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d7] 
0xd7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe3 , 10)
avrdude: Send: . [1b] . [c7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c7] 
0xc7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c4] 
0xc4 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,252928,256)
block_size at addr 252928 is 256
STK500V2: stk500v2_loadaddr(-2147357184)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xee 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xc8 0x00 0x05 0x0e 0x06 0x80 0x01 0xee 0x00 0xb1 , 11)
avrdude: Send: . [1b] . [c8] . [00] . [05] . [0e] . [06] . [80] . [01] . [ee] . [00] . [b1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c8] 
0xc8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d9] 
0xd9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xc9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xed , 10)
avrdude: Send: . [1b] . [c9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ed] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [c9] 
0xc9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ca] 
0xca 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,253184,256)
block_size at addr 253184 is 256
STK500V2: stk500v2_loadaddr(-2147357056)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xee 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xca 0x00 0x05 0x0e 0x06 0x80 0x01 0xee 0x80 0x33 , 11)
avrdude: Send: . [1b] . [ca] . [00] . [05] . [0e] . [06] . [80] . [01] . [ee] . [80] 3 [33] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ca] 
0xca hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [db] 
0xdb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xef , 10)
avrdude: Send: . [1b] . [cb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ef] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cb] 
0xcb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c8] 
0xc8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,253440,256)
block_size at addr 253440 is 256
STK500V2: stk500v2_loadaddr(-2147356928)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xef 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xcc 0x00 0x05 0x0e 0x06 0x80 0x01 0xef 0x00 0xb4 , 11)
avrdude: Send: . [1b] . [cc] . [00] . [05] . [0e] . [06] . [80] . [01] . [ef] . [00] . [b4] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cc] 
0xcc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [dd] 
0xdd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xe9 , 10)
avrdude: Send: . [1b] . [cd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [e9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cd] 
0xcd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ce] 
0xce 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,253696,256)
block_size at addr 253696 is 256
STK500V2: stk500v2_loadaddr(-2147356800)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xef 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xce 0x00 0x05 0x0e 0x06 0x80 0x01 0xef 0x80 0x36 , 11)
avrdude: Send: . [1b] . [ce] . [00] . [05] . [0e] . [06] . [80] . [01] . [ef] . [80] 6 [36] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ce] 
0xce hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [df] 
0xdf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xcf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xeb , 10)
avrdude: Send: . [1b] . [cf] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [eb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [cf] 
0xcf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cc] 
0xcc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,253952,256)
block_size at addr 253952 is 256
STK500V2: stk500v2_loadaddr(-2147356672)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xf0 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd0 0x00 0x05 0x0e 0x06 0x80 0x01 0xf0 0x00 0xb7 , 11)
avrdude: Send: . [1b] . [d0] . [00] . [05] . [0e] . [06] . [80] . [01] . [f0] . [00] . [b7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d0] 
0xd0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c1] 
0xc1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf5 , 10)
avrdude: Send: . [1b] . [d1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d1] 
0xd1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: A [41] 
0x41 avrdude: Recv: T [54] 
0x54 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: e [65] 
0x65 avrdude: Recv: g [67] 
0x67 avrdude: Recv: a [61] 
0x61 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 avrdude: Recv: r [72] 
0x72 avrdude: Recv: d [64] 
0x64 avrdude: Recv: u [75] 
0x75 avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: o [6f] 
0x6f avrdude: Recv:   [20] 
0x20 avrdude: Recv: e [65] 
0x65 avrdude: Recv: x [78] 
0x78 avrdude: Recv: p [70] 
0x70 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: o [6f] 
0x6f avrdude: Recv: r [72] 
0x72 avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: h [68] 
0x68 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,254208,256)
block_size at addr 254208 is 256
STK500V2: stk500v2_loadaddr(-2147356544)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xf0 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xd2 0x00 0x05 0x0e 0x06 0x80 0x01 0xf0 0x80 0x35 , 11)
avrdude: Send: . [1b] . [d2] . [00] . [05] . [0e] . [06] . [80] . [01] . [f0] . [80] 5 [35] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d2] 
0xd2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c3] 
0xc3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf7 , 10)
avrdude: Send: . [1b] . [d3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d3] 
0xd3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: s [73] 
0x73 avrdude: Recv: t [74] 
0x74 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: V [56] 
0x56 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv:   [20] 
0x20 avrdude: Recv: b [62] 
0x62 avrdude: Recv: y [79] 
0x79 avrdude: Recv:   [20] 
0x20 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: L [4c] 
0x4c avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [00] 
0x00 avrdude: Recv: B [42] 
0x42 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: o [6f] 
0x6f avrdude: Recv: t [74] 
0x74 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: o [6f] 
0x6f avrdude: Recv: a [61] 
0x61 avrdude: Recv: d [64] 
0x64 avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv: > [3e] 
0x3e avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: u [75] 
0x75 avrdude: Recv: h [68] 
0x68 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [00] 
0x00 avrdude: Recv: C [43] 
0x43 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: m [6d] 
0x6d avrdude: Recv: p [70] 
0x70 avrdude: Recv: i [69] 
0x69 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: e [65] 
0x65 avrdude: Recv: d [64] 
0x64 avrdude: Recv:   [20] 
0x20 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: n [6e] 
0x6e avrdude: Recv:   [20] 
0x20 avrdude: Recv: = [3d] 
0x3d avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: C [43] 
0x43 avrdude: Recv: P [50] 
0x50 avrdude: Recv: U [55] 
0x55 avrdude: Recv:   [20] 
0x20 avrdude: Recv: T [54] 
0x54 avrdude: Recv: y [79] 
0x79 avrdude: Recv: p [70] 
0x70 avrdude: Recv: e [65] 
0x65 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: = [3d] 
0x3d avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: A [41] 
0x41 avrdude: Recv: V [56] 
0x56 avrdude: Recv: R [52] 
0x52 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: A [41] 
0x41 avrdude: Recv: R [52] 
0x52 avrdude: Recv: C [43] 
0x43 avrdude: Recv: H [48] 
0x48 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: = [3d] 
0x3d avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: A [41] 
0x41 avrdude: Recv: V [56] 
0x56 avrdude: Recv: R [52] 
0x52 avrdude: Recv:   [20] 
0x20 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: i [69] 
0x69 avrdude: Recv: b [62] 
0x62 avrdude: Recv: C [43] 
0x43 avrdude: Recv:   [20] 
0x20 avrdude: Recv: V [56] 
0x56 avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv: = [3d] 
0x3d avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: G [47] 
0x47 avrdude: Recv: C [43] 
0x43 avrdude: Recv: C [43] 
0x43 avrdude: Recv:   [20] 
0x20 avrdude: Recv: V [56] 
0x56 avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv: s [73] 
0x73 avrdude: Recv: i [69] 
0x69 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: n [6e] 
0x6e avrdude: Recv:   [20] 
0x20 avrdude: Recv: = [3d] 
0x3d avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: C [43] 
0x43 avrdude: Recv: P [50] 
0x50 avrdude: Recv: U [55] 
0x55 avrdude: Recv:   [20] 
0x20 avrdude: Recv: I [49] 
0x49 avrdude: Recv: D [44] 
0x44 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: = [3d] 
0x3d avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: o [6f] 
0x6f avrdude: Recv: w [77] 
0x77 avrdude: Recv:   [20] 
0x20 avrdude: Recv: f [66] 
0x66 avrdude: Recv: u [75] 
0x75 avrdude: Recv: s [73] 
0x73 avrdude: Recv: e [65] 
0x65 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: = [3d] 
0x3d avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: i [69] 
0x69 avrdude: Recv: g [67] 
0x67 avrdude: Recv: h [68] 
0x68 avrdude: Recv:   [20] 
0x20 avrdude: Recv: f [66] 
0x66 avrdude: Recv: u [75] 
0x75 avrdude: Recv: s [73] 
0x73 avrdude: Recv: e [65] 
0x65 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: = [3d] 
0x3d avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 avrdude: Recv: x [78] 
0x78 avrdude: Recv: t [74] 
0x74 avrdude: Recv:   [20] 
0x20 avrdude: Recv: f [66] 
0x66 avrdude: Recv: u [75] 
0x75 avrdude: Recv: s [73] 
0x73 avrdude: Recv: e [65] 
0x65 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: = [3d] 
0x3d avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: o [6f] 
0x6f avrdude: Recv: c [63] 
0x63 avrdude: Recv: k [6b] 
0x6b avrdude: Recv:   [20] 
0x20 avrdude: Recv: f [66] 
0x66 avrdude: Recv: u [75] 
0x75 avrdude: Recv: s [73] 
0x73 avrdude: Recv: e [65] 
0x65 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: = [3d] 
0x3d avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: a [61] 
0x61 avrdude: Recv: r [72] 
0x72 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv:   [20] 
0x20 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: # [23] 
0x23 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: A [41] 
0x41 avrdude: Recv: D [44] 
0x44 avrdude: Recv: D [44] 
0x44 avrdude: Recv: R [52] 
0x52 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: p [70] 
0x70 avrdude: Recv:   [20] 
0x20 avrdude: Recv: c [63] 
0x63 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: d [64] 
0x64 avrdude: Recv: e [65] 
0x65 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: s [73] 
0x73 avrdude: Recv: t [74] 
0x74 avrdude: Recv: r [72] 
0x72 avrdude: Recv: u [75] 
0x75 avrdude: Recv: c [63] 
0x63 avrdude: Recv: t [74] 
0x74 avrdude: Recv: i [69] 
0x69 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: n [6e] 
0x6e avrdude: Recv:   [20] 
0x20 avrdude: Recv: a [61] 
0x61 avrdude: Recv: d [64] 
0x64 avrdude: Recv: d [64] 
0x64 avrdude: Recv: r [72] 
0x72 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: I [49] 
0x49 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: t [74] 
0x74 avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [bc] 
0xbc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,254464,256)
block_size at addr 254464 is 256
STK500V2: stk500v2_loadaddr(-2147356416)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xf1 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd4 0x00 0x05 0x0e 0x06 0x80 0x01 0xf1 0x00 0xb2 , 11)
avrdude: Send: . [1b] . [d4] . [00] . [05] . [0e] . [06] . [80] . [01] . [f1] . [00] . [b2] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d4] 
0xd4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c5] 
0xc5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf1 , 10)
avrdude: Send: . [1b] . [d5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d5] 
0xd5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: u [75] 
0x75 avrdude: Recv: p [70] 
0x70 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [00] 
0x00 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: o [6f] 
0x6f avrdude: Recv:   [20] 
0x20 avrdude: Recv: v [76] 
0x76 avrdude: Recv: e [65] 
0x65 avrdude: Recv: c [63] 
0x63 avrdude: Recv: t [74] 
0x74 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [00] 
0x00 avrdude: Recv: r [72] 
0x72 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: m [6d] 
0x6d avrdude: Recv: p [70] 
0x70 avrdude: Recv:   [20] 
0x20 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: m [6d] 
0x6d avrdude: Recv: p [70] 
0x70 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: W [57] 
0x57 avrdude: Recv: h [68] 
0x68 avrdude: Recv: a [61] 
0x61 avrdude: Recv: t [74] 
0x74 avrdude: Recv:   [20] 
0x20 avrdude: Recv: p [70] 
0x70 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: r [72] 
0x72 avrdude: Recv: t [74] 
0x74 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: r [72] 
0x72 avrdude: Recv: t [74] 
0x74 avrdude: Recv:   [20] 
0x20 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: o [6f] 
0x6f avrdude: Recv: t [74] 
0x74 avrdude: Recv:   [20] 
0x20 avrdude: Recv: s [73] 
0x73 avrdude: Recv: u [75] 
0x75 avrdude: Recv: p [70] 
0x70 avrdude: Recv: p [70] 
0x70 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: r [72] 
0x72 avrdude: Recv: t [74] 
0x74 avrdude: Recv: e [65] 
0x65 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [00] 
0x00 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: u [75] 
0x75 avrdude: Recv: s [73] 
0x73 avrdude: Recv: t [74] 
0x74 avrdude: Recv:   [20] 
0x20 avrdude: Recv: b [62] 
0x62 avrdude: Recv: e [65] 
0x65 avrdude: Recv:   [20] 
0x20 avrdude: Recv: a [61] 
0x61 avrdude: Recv:   [20] 
0x20 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: e [65] 
0x65 avrdude: Recv: t [74] 
0x74 avrdude: Recv: t [74] 
0x74 avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [00] 
0x00 avrdude: Recv: W [57] 
0x57 avrdude: Recv: r [72] 
0x72 avrdude: Recv: i [69] 
0x69 avrdude: Recv: t [74] 
0x74 avrdude: Recv: t [74] 
0x74 avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: g [67] 
0x67 avrdude: Recv:   [20] 
0x20 avrdude: Recv: E [45] 
0x45 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: e [65] 
0x65 avrdude: Recv: a [61] 
0x61 avrdude: Recv: d [64] 
0x64 avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: g [67] 
0x67 avrdude: Recv:   [20] 
0x20 avrdude: Recv: E [45] 
0x45 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 avrdude: Recv: E [45] 
0x45 avrdude: Recv:   [20] 
0x20 avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv: r [72] 
0x72 avrdude: Recv:   [20] 
0x20 avrdude: Recv: c [63] 
0x63 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: t [74] 
0x74 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: R [52] 
0x52 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv: o [6f] 
0x6f avrdude: Recv:   [20] 
0x20 avrdude: Recv: a [61] 
0x61 avrdude: Recv: d [64] 
0x64 avrdude: Recv: d [64] 
0x64 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: = [3d] 
0x3d avrdude: Recv: C [43] 
0x43 avrdude: Recv: P [50] 
0x50 avrdude: Recv: U [55] 
0x55 avrdude: Recv:   [20] 
0x20 avrdude: Recv: s [73] 
0x73 avrdude: Recv: t [74] 
0x74 avrdude: Recv: a [61] 
0x61 avrdude: Recv: t [74] 
0x74 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [00] 
0x00 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: E [45] 
0x45 avrdude: Recv: E [45] 
0x45 avrdude: Recv: P [50] 
0x50 avrdude: Recv: R [52] 
0x52 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: M [4d] 
0x4d avrdude: Recv:   [20] 
0x20 avrdude: Recv: t [74] 
0x74 avrdude: Recv: e [65] 
0x65 avrdude: Recv: s [73] 
0x73 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [00] 
0x00 avrdude: Recv: B [42] 
0x42 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: B [42] 
0x42 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: k [6b] 
0x6b avrdude: Recv:   [20] 
0x20 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: E [45] 
0x45 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [00] 
0x00 avrdude: Recv: E [45] 
0x45 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: D [44] 
0x44 avrdude: Recv: u [75] 
0x75 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: p [70] 
0x70 avrdude: Recv:   [20] 
0x20 avrdude: Recv: E [45] 
0x45 avrdude: Recv: E [45] 
0x45 avrdude: Recv: P [50] 
0x50 avrdude: Recv: R [52] 
0x52 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [00] 
0x00 avrdude: Recv: F [46] 
0x46 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: D [44] 
0x44 avrdude: Recv: u [75] 
0x75 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: p [70] 
0x70 avrdude: Recv:   [20] 
0x20 avrdude: Recv: F [46] 
0x46 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: A [41] 
0x41 avrdude: Recv: S [53] 
0x53 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [00] 
0x00 avrdude: Recv: H [48] 
0x48 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: H [48] 
0x48 avrdude: Recv: e [65] 
0x65 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [00] 
0x00 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: = [3d] 
0x3d avrdude: Recv: L [4c] 
0x4c avrdude: Recv: i [69] 
0x69 avrdude: Recv: s [73] 
0x73 avrdude: Recv: t [74] 
0x74 avrdude: Recv:   [20] 
0x20 avrdude: Recv: I [49] 
0x49 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: O [4f] 
0x4f avrdude: Recv:   [20] 
0x20 avrdude: Recv: P [50] 
0x50 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: r [72] 
0x72 avrdude: Recv: t [74] 
0x74 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: Q [51] 
0x51 avrdude: Recv: u [75] 
0x75 avrdude: Recv: i [69] 
0x69 avrdude: Recv: t [74] 
0x74 avrdude: Recv: . [00] 
0x00 avrdude: Recv: R [52] 
0x52 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: D [44] 
0x44 avrdude: Recv: u [75] 
0x75 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: p [70] 
0x70 avrdude: Recv:   [20] 
0x20 avrdude: Recv: R [52] 
0x52 avrdude: Recv: A [41] 
0x41 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [00] 
0x00 avrdude: Recv: V [56] 
0x56 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: s [73] 
0x73 avrdude: Recv: h [68] 
0x68 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: w [77] 
0x77 avrdude: Recv:   [20] 
0x20 avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: t [74] 
0x74 avrdude: Recv: e [65] 
0x65 avrdude: Recv: r [72] 
0x72 avrdude: Recv: r [72] 
0x72 avrdude: Recv: u [75] 
0x75 avrdude: Recv: p [70] 
0x70 avrdude: Recv: t [74] 
0x74 avrdude: Recv:   [20] 
0x20 avrdude: Recv: V [56] 
0x56 avrdude: Recv: e [65] 
0x65 avrdude: Recv: c [63] 
0x63 avrdude: Recv: t [74] 
0x74 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ce] 
0xce 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,254720,256)
block_size at addr 254720 is 256
STK500V2: stk500v2_loadaddr(-2147356288)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xf1 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xd6 0x00 0x05 0x0e 0x06 0x80 0x01 0xf1 0x80 0x30 , 11)
avrdude: Send: . [1b] . [d6] . [00] . [05] . [0e] . [06] . [80] . [01] . [f1] . [80] 0 [30] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d6] 
0xd6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c7] 
0xc7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf3 , 10)
avrdude: Send: . [1b] . [d7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d7] 
0xd7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: r [72] 
0x72 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [00] 
0x00 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: = [3d] 
0x3d avrdude: Recv: P [50] 
0x50 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: r [72] 
0x72 avrdude: Recv: t [74] 
0x74 avrdude: Recv:   [20] 
0x20 avrdude: Recv: b [62] 
0x62 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: i [69] 
0x69 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [00] 
0x00 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ae] 
0xae avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ed] 
0xed avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [01] 
0x01 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: F [46] 
0x46 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,254976,256)
block_size at addr 254976 is 256
STK500V2: stk500v2_loadaddr(-2147356160)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xf2 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xd8 0x00 0x05 0x0e 0x06 0x80 0x01 0xf2 0x00 0xbd , 11)
avrdude: Send: . [1b] . [d8] . [00] . [05] . [0e] . [06] . [80] . [01] . [f2] . [00] . [bd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d8] 
0xd8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c9] 
0xc9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xd9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xfd , 10)
avrdude: Send: . [1b] . [d9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [fd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [d9] 
0xd9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [99] 
0x99 avrdude: Recv: # [23] 
0x23 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [89] 
0x89 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [80] 
0x80 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [9a] 
0x9a avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [99] 
0x99 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [85] 
0x85 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: c [63] 
0x63 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [fe] 
0xfe avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [b4] 
0xb4 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [fe] 
0xfe avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [fe] 
0xfe avrdude: Recv: ` [60] 
0x60 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [18] 
0x18 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: n [6e] 
0x6e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,255232,256)
block_size at addr 255232 is 256
STK500V2: stk500v2_loadaddr(-2147356032)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xf2 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xda 0x00 0x05 0x0e 0x06 0x80 0x01 0xf2 0x80 0x3f , 11)
avrdude: Send: . [1b] . [da] . [00] . [05] . [0e] . [06] . [80] . [01] . [f2] . [80] ? [3f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [da] 
0xda hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cb] 
0xcb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xff , 10)
avrdude: Send: . [1b] . [db] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [ff] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [db] 
0xdb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [01] 
0x01 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [01] 
0x01 avrdude: Recv: w [77] 
0x77 avrdude: Recv: $ [24] 
0x24 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [94] 
0x94 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [06] 
0x06 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [ad] 
0xad avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [9c] 
0x9c avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [8b] 
0x8b avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [01] 
0x01 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [88] 
0x88 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [99] 
0x99 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [16] 
0x16 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [16] 
0x16 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [16] 
0x16 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [18] 
0x18 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,255488,256)
block_size at addr 255488 is 256
STK500V2: stk500v2_loadaddr(-2147355904)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xf3 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xdc 0x00 0x05 0x0e 0x06 0x80 0x01 0xf3 0x00 0xb8 , 11)
avrdude: Send: . [1b] . [dc] . [00] . [05] . [0e] . [06] . [80] . [01] . [f3] . [00] . [b8] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [dc] 
0xdc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cd] 
0xcd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xf9 , 10)
avrdude: Send: . [1b] . [dd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [f9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [dd] 
0xdd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [87] 
0x87 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [80] 
0x80 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ef] 
0xef avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: 5 [35] 
0x35 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [94] 
0x94 avrdude: Recv: f [66] 
0x66 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: r [72] 
0x72 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [90] 
0x90 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [90] 
0x90 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [90] 
0x90 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [90] 
0x90 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [92] 
0x92 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [92] 
0x92 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [92] 
0x92 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [92] 
0x92 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ca] 
0xca 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,255744,256)
block_size at addr 255744 is 256
STK500V2: stk500v2_loadaddr(-2147355776)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xf3 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xde 0x00 0x05 0x0e 0x06 0x80 0x01 0xf3 0x80 0x3a , 11)
avrdude: Send: . [1b] . [de] . [00] . [05] . [0e] . [06] . [80] . [01] . [f3] . [80] : [3a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [de] 
0xde hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cf] 
0xcf 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xdf 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xfb , 10)
avrdude: Send: . [1b] . [df] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [fb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [df] 
0xdf hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [00] 
0x00 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [95] 
0x95 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [82] 
0x82 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ee] 
0xee avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [ff] 
0xff avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [01] 
0x01 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [cc] 
0xcc avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: $ [24] 
0x24 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [06] 
0x06 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [07] 
0x07 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [ec] 
0xec avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [15] 
0x15 avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [83] 
0x83 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ce] 
0xce avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ce] 
0xce avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [88] 
0x88 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [99] 
0x99 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [00] 
0x00 avrdude: Recv: J [4a] 
0x4a 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,256000,256)
block_size at addr 256000 is 256
STK500V2: stk500v2_loadaddr(-2147355648)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xf4 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe0 0x00 0x05 0x0e 0x06 0x80 0x01 0xf4 0x00 0x83 , 11)
avrdude: Send: . [1b] . [e0] . [00] . [05] . [0e] . [06] . [80] . [01] . [f4] . [00] . [83] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e0] 
0xe0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f1] 
0xf1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc5 , 10)
avrdude: Send: . [1b] . [e1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e1] 
0xe1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ce] 
0xce avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ee] 
0xee avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [ff] 
0xff avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ce] 
0xce avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ce] 
0xce avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ! [21] 
0x21 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ef] 
0xef avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [ff] 
0xff avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [ff] 
0xff avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [94] 
0x94 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [cf] 
0xcf avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [81] 
0x81 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [83] 
0x83 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: c [63] 
0x63 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ) [29] 
0x29 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [05] 
0x05 avrdude: Recv: y [79] 
0x79 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: N [4e] 
0x4e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,256256,256)
block_size at addr 256256 is 256
STK500V2: stk500v2_loadaddr(-2147355520)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xf4 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xe2 0x00 0x05 0x0e 0x06 0x80 0x01 0xf4 0x80 0x01 , 11)
avrdude: Send: . [1b] . [e2] . [00] . [05] . [0e] . [06] . [80] . [01] . [f4] . [80] . [01] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e2] 
0xe2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f3] 
0xf3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc7 , 10)
avrdude: Send: . [1b] . [e3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e3] 
0xe3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [05] 
0x05 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [98] 
0x98 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [99] 
0x99 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [96] 
0x96 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [d7] 
0xd7 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [96] 
0x96 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: E [45] 
0x45 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [99] 
0x99 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: g [67] 
0x67 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,256512,256)
block_size at addr 256512 is 256
STK500V2: stk500v2_loadaddr(-2147355392)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xf5 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe4 0x00 0x05 0x0e 0x06 0x80 0x01 0xf5 0x00 0x86 , 11)
avrdude: Send: . [1b] . [e4] . [00] . [05] . [0e] . [06] . [80] . [01] . [f5] . [00] . [86] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e4] 
0xe4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f5] 
0xf5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc1 , 10)
avrdude: Send: . [1b] . [e5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e5] 
0xe5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [13] 
0x13 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [95] 
0x95 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,256768,256)
block_size at addr 256768 is 256
STK500V2: stk500v2_loadaddr(-2147355264)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xf5 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xe6 0x00 0x05 0x0e 0x06 0x80 0x01 0xf5 0x80 0x04 , 11)
avrdude: Send: . [1b] . [e6] . [00] . [05] . [0e] . [06] . [80] . [01] . [f5] . [80] . [04] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e6] 
0xe6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f7] 
0xf7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc3 , 10)
avrdude: Send: . [1b] . [e7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e7] 
0xe7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: o [6f] 
0x6f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [ff] 
0xff avrdude: Recv:   [20] 
0x20 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [16] 
0x16 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ec] 
0xec 
 = 265
#STK500V2: stk500v2_paged_load(..,flash,256,257024,256)
block_size at addr 257024 is 256
STK500V2: stk500v2_loadaddr(-2147355136)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xf6 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xe8 0x00 0x05 0x0e 0x06 0x80 0x01 0xf6 0x00 0x89 , 11)
avrdude: Send: . [1b] . [e8] . [00] . [05] . [0e] . [06] . [80] . [01] . [f6] . [00] . [89] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e8] 
0xe8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f9] 
0xf9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xe9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcd , 10)
avrdude: Send: . [1b] . [e9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [e9] 
0xe9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [16] 
0x16 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [02] 
0x02 avrdude: Recv: x [78] 
0x78 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [e6] 
0xe6 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [02] 
0x02 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [02] 
0x02 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [af] 
0xaf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [90] 
0x90 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [00] 
0x00 avrdude: Recv: " [22] 
0x22 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,257280,256)
block_size at addr 257280 is 256
STK500V2: stk500v2_loadaddr(-2147355008)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xf6 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xea 0x00 0x05 0x0e 0x06 0x80 0x01 0xf6 0x80 0x0b , 11)
avrdude: Send: . [1b] . [ea] . [00] . [05] . [0e] . [06] . [80] . [01] . [f6] . [80] . [0b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ea] 
0xea hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fb] 
0xfb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xeb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcf , 10)
avrdude: Send: . [1b] . [eb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cf] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [eb] 
0xeb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a4] 
0xa4 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [02] 
0x02 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [02] 
0x02 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [02] 
0x02 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [af] 
0xaf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e7] 
0xe7 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e1] 
0xe1 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,257536,256)
block_size at addr 257536 is 256
STK500V2: stk500v2_loadaddr(-2147354880)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xf7 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xec 0x00 0x05 0x0e 0x06 0x80 0x01 0xf7 0x00 0x8c , 11)
avrdude: Send: . [1b] . [ec] . [00] . [05] . [0e] . [06] . [80] . [01] . [f7] . [00] . [8c] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ec] 
0xec hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fd] 
0xfd 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xed 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xc9 , 10)
avrdude: Send: . [1b] . [ed] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [c9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ed] 
0xed hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: w [77] 
0x77 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [88] 
0x88 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [99] 
0x99 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [02] 
0x02 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [02] 
0x02 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [02] 
0x02 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [80] 
0x80 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [af] 
0xaf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [bf] 
0xbf avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [02] 
0x02 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: f [66] 
0x66 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: w [77] 
0x77 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [d4] 
0xd4 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ca] 
0xca avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [01] 
0x01 avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: | [7c] 
0x7c 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,257792,256)
block_size at addr 257792 is 256
STK500V2: stk500v2_loadaddr(-2147354752)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xf7 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xee 0x00 0x05 0x0e 0x06 0x80 0x01 0xf7 0x80 0x0e , 11)
avrdude: Send: . [1b] . [ee] . [00] . [05] . [0e] . [06] . [80] . [01] . [f7] . [80] . [0e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ee] 
0xee hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xef 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xcb , 10)
avrdude: Send: . [1b] . [ef] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [cb] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ef] 
0xef hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ca] 
0xca avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [ca] 
0xca avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ca] 
0xca avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [bb] 
0xbb avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [dd] 
0xdd avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [94] 
0x94 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [91] 
0x91 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: D [44] 
0x44 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: U [55] 
0x55 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [94] 
0x94 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [94] 
0x94 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [01] 
0x01 avrdude: Recv: G [47] 
0x47 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ) [29] 
0x29 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,258048,256)
block_size at addr 258048 is 256
STK500V2: stk500v2_loadaddr(-2147354624)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xf8 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf0 0x00 0x05 0x0e 0x06 0x80 0x01 0xf8 0x00 0x9f , 11)
avrdude: Send: . [1b] . [f0] . [00] . [05] . [0e] . [06] . [80] . [01] . [f8] . [00] . [9f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f0] 
0xf0 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e1] 
0xe1 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf1 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd5 , 10)
avrdude: Send: . [1b] . [f1] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d5] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f1] 
0xf1 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [0a] 
0x0a avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [af] 
0xaf avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [1a] 
0x1a avrdude: Recv: / [2f] 
0x2f avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [14] 
0x14 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [03] 
0x03 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ee] 
0xee avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ca] 
0xca avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [07] 
0x07 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [90] 
0x90 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [80] 
0x80 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [90] 
0x90 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [ef] 
0xef avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,258304,256)
block_size at addr 258304 is 256
STK500V2: stk500v2_loadaddr(-2147354496)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xf8 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xf2 0x00 0x05 0x0e 0x06 0x80 0x01 0xf8 0x80 0x1d , 11)
avrdude: Send: . [1b] . [f2] . [00] . [05] . [0e] . [06] . [80] . [01] . [f8] . [80] . [1d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f2] 
0xf2 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e3] 
0xe3 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf3 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd7 , 10)
avrdude: Send: . [1b] . [f3] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d7] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f3] 
0xf3 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [04] 
0x04 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [15] 
0x15 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [ca] 
0xca avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ca] 
0xca avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ff] 
0xff avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [0f] 
0x0f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [fe] 
0xfe avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ee] 
0xee avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [eb] 
0xeb avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [d6] 
0xd6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [81] 
0x81 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [90] 
0x90 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [1f] 
0x1f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [ef] 
0xef avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: " [22] 
0x22 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [1c] 
0x1c avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e8] 
0xe8 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,258560,256)
block_size at addr 258560 is 256
STK500V2: stk500v2_loadaddr(-2147354368)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xf9 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf4 0x00 0x05 0x0e 0x06 0x80 0x01 0xf9 0x00 0x9a , 11)
avrdude: Send: . [1b] . [f4] . [00] . [05] . [0e] . [06] . [80] . [01] . [f9] . [00] . [9a] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f4] 
0xf4 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e5] 
0xe5 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf5 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd1 , 10)
avrdude: Send: . [1b] . [f5] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d1] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f5] 
0xf5 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: " [22] 
0x22 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: " [22] 
0x22 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: " [22] 
0x22 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: " [22] 
0x22 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [01] 
0x01 avrdude: Recv: h [68] 
0x68 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [cc] 
0xcc avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [dd] 
0xdd avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [8f] 
0x8f avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ae] 
0xae avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [ad] 
0xad avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [9c] 
0x9c avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [8b] 
0x8b avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [cc] 
0xcc avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: M [4d] 
0x4d avrdude: Recv: . [cb] 
0xcb avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [01] 
0x01 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: . [11] 
0x11 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: n [6e] 
0x6e avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [f2] 
0xf2 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [ee] 
0xee avrdude: Recv: b [62] 
0x62 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1f] 
0x1f 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,258816,256)
block_size at addr 258816 is 256
STK500V2: stk500v2_loadaddr(-2147354240)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xf9 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xf6 0x00 0x05 0x0e 0x06 0x80 0x01 0xf9 0x80 0x18 , 11)
avrdude: Send: . [1b] . [f6] . [00] . [05] . [0e] . [06] . [80] . [01] . [f9] . [80] . [18] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f6] 
0xf6 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e7] 
0xe7 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf7 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd3 , 10)
avrdude: Send: . [1b] . [f7] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f7] 
0xf7 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [81] 
0x81 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [81] 
0x81 avrdude: Recv: T [54] 
0x54 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [16] 
0x16 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [13] 
0x13 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [14] 
0x14 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [11] 
0x11 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [12] 
0x12 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [14] 
0x14 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [15] 
0x15 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [17] 
0x17 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [18] 
0x18 avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d2] 
0xd2 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: 4 [34] 
0x34 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [d9] 
0xd9 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [cc] 
0xcc 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,259072,256)
block_size at addr 259072 is 256
STK500V2: stk500v2_loadaddr(-2147354112)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xfa 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xf8 0x00 0x05 0x0e 0x06 0x80 0x01 0xfa 0x00 0x95 , 11)
avrdude: Send: . [1b] . [f8] . [00] . [05] . [0e] . [06] . [80] . [01] . [fa] . [00] . [95] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f8] 
0xf8 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e9] 
0xe9 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xf9 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdd , 10)
avrdude: Send: . [1b] . [f9] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [dd] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [f9] 
0xf9 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [ad] 
0xad avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [ba] 
0xba avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [01] 
0x01 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [00] 
0x00 avrdude: Recv: 3 [33] 
0x33 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,259328,256)
block_size at addr 259328 is 256
STK500V2: stk500v2_loadaddr(-2147353984)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xfa 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xfa 0x00 0x05 0x0e 0x06 0x80 0x01 0xfa 0x80 0x17 , 11)
avrdude: Send: . [1b] . [fa] . [00] . [05] . [0e] . [06] . [80] . [01] . [fa] . [80] . [17] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fa] 
0xfa hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [eb] 
0xeb 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xfb 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdf , 10)
avrdude: Send: . [1b] . [fb] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [df] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fb] 
0xfb hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [88] 
0x88 avrdude: Recv: < [3c] 
0x3c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ed] 
0xed avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ea] 
0xea avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [88] 
0x88 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [99] 
0x99 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [94] 
0x94 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [b8] 
0xb8 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [96] 
0x96 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: C [43] 
0x43 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: B [42] 
0x42 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: k [6b] 
0x6b avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: b [62] 
0x62 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [b2] 
0xb2 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: b [62] 
0x62 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 2 [32] 
0x32 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [82] 
0x82 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a8] 
0xa8 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: b [62] 
0x62 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: b [62] 
0x62 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [a9] 
0xa9 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,259584,256)
block_size at addr 259584 is 256
STK500V2: stk500v2_loadaddr(-2147353856)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xfb 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0xfc 0x00 0x05 0x0e 0x06 0x80 0x01 0xfb 0x00 0x90 , 11)
avrdude: Send: . [1b] . [fc] . [00] . [05] . [0e] . [06] . [80] . [01] . [fb] . [00] . [90] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fc] 
0xfc hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ed] 
0xed 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xfd 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xd9 , 10)
avrdude: Send: . [1b] . [fd] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [d9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fd] 
0xfd hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1f] 
0x1f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: b [62] 
0x62 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c3] 
0xc3 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: w [77] 
0x77 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [94] 
0x94 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [96] 
0x96 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [97] 
0x97 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [93] 
0x93 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [92] 
0x92 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [99] 
0x99 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [96] 
0x96 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [9d] 
0x9d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: . [16] 
0x16 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [80] 
0x80 avrdude: Recv: u [75] 
0x75 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [98] 
0x98 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,259840,256)
block_size at addr 259840 is 256
STK500V2: stk500v2_loadaddr(-2147353728)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xfb 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0xfe 0x00 0x05 0x0e 0x06 0x80 0x01 0xfb 0x80 0x12 , 11)
avrdude: Send: . [1b] . [fe] . [00] . [05] . [0e] . [06] . [80] . [01] . [fb] . [80] . [12] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [fe] 
0xfe hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ef] 
0xef 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0xff 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0xdb , 10)
avrdude: Send: . [1b] . [ff] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] . [db] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [ff] 
0xff hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [9e] 
0x9e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [82] 
0x82 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e5] 
0xe5 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [87] 
0x87 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: A [41] 
0x41 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8f] 
0x8f avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [03] 
0x03 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: w [77] 
0x77 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: s [73] 
0x73 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [88] 
0x88 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [e9] 
0xe9 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [82] 
0x82 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [80] 
0x80 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [88] 
0x88 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [e3] 
0xe3 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [84] 
0x84 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [83] 
0x83 avrdude: Recv: l [6c] 
0x6c avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [82] 
0x82 avrdude: Recv: # [23] 
0x23 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [ce] 
0xce avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,260096,256)
block_size at addr 260096 is 256
STK500V2: stk500v2_loadaddr(-2147353600)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xfc 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x00 0x00 0x05 0x0e 0x06 0x80 0x01 0xfc 0x00 0x6b , 11)
avrdude: Send: . [1b] . [00] . [00] . [05] . [0e] . [06] . [80] . [01] . [fc] . [00] k [6b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [00] 
0x00 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [11] 
0x11 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x01 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x25 , 10)
avrdude: Send: . [1b] . [01] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] % [25] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [01] 
0x01 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: X [58] 
0x58 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: D [44] 
0x44 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: " [22] 
0x22 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [dc] 
0xdc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: J [4a] 
0x4a avrdude: Recv: + [2b] 
0x2b avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: J [4a] 
0x4a avrdude: Recv: + [2b] 
0x2b avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ba] 
0xba avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [88] 
0x88 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: ( [28] 
0x28 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: + [2b] 
0x2b avrdude: Recv: J [4a] 
0x4a avrdude: Recv: + [2b] 
0x2b avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: + [2b] 
0x2b avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: 3 [33] 
0x33 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [83] 
0x83 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [83] 
0x83 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: : [3a] 
0x3a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: 8 [38] 
0x38 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [ca] 
0xca avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [dd] 
0xdd avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [ca] 
0xca avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [81] 
0x81 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c4] 
0xc4 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [93] 
0x93 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [80] 
0x80 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [90] 
0x90 avrdude: Recv: L [4c] 
0x4c avrdude: Recv: . [a3] 
0xa3 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [ce] 
0xce avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [93] 
0x93 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ce] 
0xce avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [81] 
0x81 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [81] 
0x81 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [00] 
0x00 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: / [2f] 
0x2f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [ce] 
0xce avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [83] 
0x83 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [83] 
0x83 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [d5] 
0xd5 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,260352,256)
block_size at addr 260352 is 256
STK500V2: stk500v2_loadaddr(-2147353472)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xfc 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x02 0x00 0x05 0x0e 0x06 0x80 0x01 0xfc 0x80 0xe9 , 11)
avrdude: Send: . [1b] . [02] . [00] . [05] . [0e] . [06] . [80] . [01] . [fc] . [80] . [e9] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [02] 
0x02 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [13] 
0x13 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x03 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x27 , 10)
avrdude: Send: . [1b] . [03] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ' [27] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [03] 
0x03 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c2] 
0xc2 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [81] 
0x81 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [81] 
0x81 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [81] 
0x81 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [de] 
0xde avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [96] 
0x96 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [96] 
0x96 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [12] 
0x12 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [9f] 
0x9f avrdude: Recv: + [2b] 
0x2b avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [00] 
0x00 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [11] 
0x11 avrdude: Recv: $ [24] 
0x24 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: o [6f] 
0x6f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [ef] 
0xef avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [ce] 
0xce avrdude: Recv: . [0c] 
0x0c avrdude: Recv: . [df] 
0xdf avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [81] 
0x81 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [81] 
0x81 avrdude: Recv: ; [3b] 
0x3b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [01] 
0x01 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [95] 
0x95 avrdude: Recv: 5 [35] 
0x35 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a7] 
0xa7 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [95] 
0x95 avrdude: Recv: | [7c] 
0x7c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ab] 
0xab avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: , [2c] 
0x2c avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [d5] 
0xd5 avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: . [91] 
0x91 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [01] 
0x01 avrdude: Recv: P [50] 
0x50 avrdude: Recv: . [10] 
0x10 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [01] 
0x01 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: D [44] 
0x44 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: U [55] 
0x55 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [00] 
0x00 avrdude: Recv: p [70] 
0x70 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,260608,256)
block_size at addr 260608 is 256
STK500V2: stk500v2_loadaddr(-2147353344)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xfd 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x04 0x00 0x05 0x0e 0x06 0x80 0x01 0xfd 0x00 0x6e , 11)
avrdude: Send: . [1b] . [04] . [00] . [05] . [0e] . [06] . [80] . [01] . [fd] . [00] n [6e] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [04] 
0x04 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [15] 
0x15 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x05 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x21 , 10)
avrdude: Send: . [1b] . [05] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ! [21] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [05] 
0x05 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: N [4e] 
0x4e avrdude: Recv: . [0d] 
0x0d avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [1d] 
0x1d avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: q [71] 
0x71 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: H [48] 
0x48 avrdude: Recv: . [83] 
0x83 avrdude: Recv: Y [59] 
0x59 avrdude: Recv: . [83] 
0x83 avrdude: Recv: j [6a] 
0x6a avrdude: Recv: . [83] 
0x83 avrdude: Recv: { [7b] 
0x7b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [c5] 
0xc5 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [cb] 
0xcb avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [18] 
0x18 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [ca] 
0xca avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c8] 
0xc8 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [dd] 
0xdd avrdude: Recv: $ [24] 
0x24 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: \ [5c] 
0x5c avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [19] 
0x19 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [ca] 
0xca avrdude: Recv: S [53] 
0x53 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: * [2a] 
0x2a avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [89] 
0x89 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: m [6d] 
0x6d avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [84] 
0x84 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [bf] 
0xbf avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [87] 
0x87 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8c] 
0x8c avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [9c] 
0x9c avrdude: Recv: . [93] 
0x93 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [d8] 
0xd8 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [c7] 
0xc7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [02] 
0x02 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: " [22] 
0x22 avrdude: Recv: P [50] 
0x50 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [81] 
0x81 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [81] 
0x81 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [81] 
0x81 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [08] 
0x08 avrdude: Recv: v [76] 
0x76 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [1c] 
0x1c avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [1d] 
0x1d avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [f3] 
0xf3 avrdude: Recv: . [1e] 
0x1e avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [15] 
0x15 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [bb] 
0xbb avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [a5] 
0xa5 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [94] 
0x94 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [83] 
0x83 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: / [2f] 
0x2f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [db] 
0xdb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [15] 
0x15 avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: . [05] 
0x05 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [07] 
0x07 avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [07] 
0x07 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: ^ [5e] 
0x5e avrdude: Recv: . [00] 
0x00 avrdude: Recv: ~ [7e] 
0x7e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,260864,256)
block_size at addr 260864 is 256
STK500V2: stk500v2_loadaddr(-2147353216)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xfd 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x06 0x00 0x05 0x0e 0x06 0x80 0x01 0xfd 0x80 0xec , 11)
avrdude: Send: . [1b] . [06] . [00] . [05] . [0e] . [06] . [80] . [01] . [fd] . [80] . [ec] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [06] 
0x06 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [17] 
0x17 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x07 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x23 , 10)
avrdude: Send: . [1b] . [07] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] # [23] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [07] 
0x07 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: ( [28] 
0x28 avrdude: Recv: . [83] 
0x83 avrdude: Recv: 9 [39] 
0x39 avrdude: Recv: . [83] 
0x83 avrdude: Recv: J [4a] 
0x4a avrdude: Recv: . [83] 
0x83 avrdude: Recv: [ [5b] 
0x5b avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [01] 
0x01 avrdude: Recv: - [2d] 
0x2d avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: ? [3f] 
0x3f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [82] 
0x82 avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [ec] 
0xec avrdude: Recv: . [8a] 
0x8a avrdude: Recv: . [83] 
0x83 avrdude: Recv: " [22] 
0x22 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [8b] 
0x8b avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: C [43] 
0x43 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [92] 
0x92 avrdude: Recv: / [2f] 
0x2f avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8e] 
0x8e avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: e [65] 
0x65 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: n [6e] 
0x6e avrdude: Recv: % [25] 
0x25 avrdude: Recv: i [69] 
0x69 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: d [64] 
0x64 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [01] 
0x01 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: i [69] 
0x69 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: P [50] 
0x50 avrdude: Recv: 0 [30] 
0x30 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: ! [21] 
0x21 avrdude: Recv: . [15] 
0x15 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [05] 
0x05 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c6] 
0xc6 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [86] 
0x86 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [fc] 
0xfc avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: d [64] 
0x64 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [b1] 
0xb1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: X [58] 
0x58 avrdude: Recv: . [85] 
0x85 avrdude: Recv: . [b9] 
0xb9 avrdude: Recv: w [77] 
0x77 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fb] 
0xfb 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,261120,256)
block_size at addr 261120 is 256
STK500V2: stk500v2_loadaddr(-2147353088)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xfe 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x08 0x00 0x05 0x0e 0x06 0x80 0x01 0xfe 0x00 0x61 , 11)
avrdude: Send: . [1b] . [08] . [00] . [05] . [0e] . [06] . [80] . [01] . [fe] . [00] a [61] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [08] 
0x08 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [19] 
0x19 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x09 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2d , 10)
avrdude: Send: . [1b] . [09] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] - [2d] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [09] 
0x09 hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [0f] 
0x0f avrdude: Recv: _ [5f] 
0x5f avrdude: Recv: . [c1] 
0xc1 avrdude: Recv: ] [5d] 
0x5d avrdude: Recv: . [de] 
0xde avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [83] 
0x83 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: R [52] 
0x52 avrdude: Recv: . [d1] 
0xd1 avrdude: Recv: @ [40] 
0x40 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [a0] 
0xa0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [b0] 
0xb0 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [98] 
0x98 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [98] 
0x98 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [ed] 
0xed avrdude: Recv: 7 [37] 
0x37 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [01] 
0x01 avrdude: Recv: 1 [31] 
0x31 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [f1] 
0xf1 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [84] 
0x84 avrdude: Recv: 6 [36] 
0x36 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [05] 
0x05 avrdude: Recv: . [c9] 
0xc9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [91] 
0x91 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [8d] 
0x8d avrdude: Recv: . [7f] 
0x7f avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [93] 
0x93 avrdude: Recv: W [57] 
0x57 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [e8] 
0xe8 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [ee] 
0xee avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [ff] 
0xff avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [e0] 
0xe0 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: . [97] 
0x97 avrdude: Recv: . [fb] 
0xfb avrdude: Recv: . [09] 
0x09 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [07] 
0x07 avrdude: Recv: & [26] 
0x26 avrdude: Recv: . [0a] 
0x0a avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [04] 
0x04 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [d0] 
0xd0 avrdude: Recv: . [00] 
0x00 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [f4] 
0xf4 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [95] 
0x95 avrdude: Recv: a [61] 
0x61 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [7f] 
0x7f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [f6] 
0xf6 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9f] 
0x9f avrdude: Recv: O [4f] 
0x4f avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a1] 
0xa1 avrdude: Recv: . [e2] 
0xe2 avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [2e] 
0x2e avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [fd] 
0xfd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [0d] 
0x0d avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ee] 
0xee avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [07] 
0x07 avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a2] 
0xa2 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [b3] 
0xb3 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [e4] 
0xe4 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [f5] 
0xf5 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: f [66] 
0x66 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: w [77] 
0x77 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [1a] 
0x1a avrdude: Recv: . [94] 
0x94 avrdude: Recv: i [69] 
0x69 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: ` [60] 
0x60 avrdude: Recv: . [95] 
0x95 avrdude: Recv: p [70] 
0x70 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [9b] 
0x9b avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [ac] 
0xac avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1b] 
0x1b avrdude: Recv: Q [51] 
0x51 avrdude: Recv: . [e1] 
0xe1 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [c0] 
0xc0 avrdude: Recv: . [aa] 
0xaa avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [bb] 
0xbb avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [17] 
0x17 avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [07] 
0x07 avrdude: Recv: . [10] 
0x10 avrdude: Recv: . [f0] 
0xf0 avrdude: Recv: . [a6] 
0xa6 avrdude: Recv: . [1b] 
0x1b avrdude: Recv: . [b7] 
0xb7 avrdude: Recv: . [0b] 
0x0b avrdude: Recv: . [88] 
0x88 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [1f] 
0x1f avrdude: Recv: Z [5a] 
0x5a avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [a9] 
0xa9 avrdude: Recv: . [f7] 
0xf7 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [90] 
0x90 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [bc] 
0xbc avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [cd] 
0xcd avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [99] 
0x99 avrdude: Recv: ' [27] 
0x27 avrdude: Recv: . [80] 
0x80 avrdude: Recv: . [b5] 
0xb5 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: & [26] 
0x26 avrdude: Recv: / [2f] 
0x2f avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [fa] 
0xfa 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,261376,256)
block_size at addr 261376 is 256
STK500V2: stk500v2_loadaddr(-2147352960)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xfe 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x0a 0x00 0x05 0x0e 0x06 0x80 0x01 0xfe 0x80 0xe3 , 11)
avrdude: Send: . [1b] . [0a] . [00] . [05] . [0e] . [06] . [80] . [01] . [fe] . [80] . [e3] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0a] 
0x0a hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1b] 
0x1b 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0b 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2f , 10)
avrdude: Send: . [1b] . [0b] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] / [2f] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0b] 
0x0b hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [99] 
0x99 avrdude: Recv: . [fe] 
0xfe avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [1f] 
0x1f avrdude: Recv: . [ba] 
0xba avrdude: Recv: . [92] 
0x92 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [81] 
0x81 avrdude: Recv: . [bd] 
0xbd avrdude: Recv:   [20] 
0x20 avrdude: Recv: . [bd] 
0xbd avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [b6] 
0xb6 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [fa] 
0xfa avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [f9] 
0xf9 avrdude: Recv: . [9a] 
0x9a avrdude: Recv: . [0f] 
0x0f avrdude: Recv: . [be] 
0xbe avrdude: Recv: . [01] 
0x01 avrdude: Recv: . [96] 
0x96 avrdude: Recv: . [08] 
0x08 avrdude: Recv: . [95] 
0x95 avrdude: Recv: . [f8] 
0xf8 avrdude: Recv: . [94] 
0x94 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [cf] 
0xcf avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: C [43] 
0x43 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,261632,256)
block_size at addr 261632 is 256
STK500V2: stk500v2_loadaddr(-2147352832)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xff 0x00 , 5)
STK500V2: stk500v2_send(0x1b 0x0c 0x00 0x05 0x0e 0x06 0x80 0x01 0xff 0x00 0x64 , 11)
avrdude: Send: . [1b] . [0c] . [00] . [05] . [0e] . [06] . [80] . [01] . [ff] . [00] d [64] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0c] 
0x0c hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1d] 
0x1d 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0d 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x29 , 10)
avrdude: Send: . [1b] . [0d] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] ) [29] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0d] 
0x0d hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0e] 
0x0e 
 = 265
STK500V2: stk500v2_paged_load(..,flash,256,261888,256)
block_size at addr 261888 is 256
STK500V2: stk500v2_loadaddr(-2147352704)
STK500V2: stk500v2_command(0x06 0x80 0x01 0xff 0x80 , 5)
STK500V2: stk500v2_send(0x1b 0x0e 0x00 0x05 0x0e 0x06 0x80 0x01 0xff 0x80 0xe6 , 11)
avrdude: Send: . [1b] . [0e] . [00] . [05] . [0e] . [06] . [80] . [01] . [ff] . [80] . [e6] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0e] 
0x0e hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [06] 
0x06 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [1f] 
0x1f 
 = 8
STK500V2: stk500v2_command(0x14 0x01 0x00 0x20 , 4)
STK500V2: stk500v2_send(0x1b 0x0f 0x00 0x04 0x0e 0x14 0x01 0x00 0x20 0x2b , 10)
avrdude: Send: . [1b] . [0f] . [00] . [04] . [0e] . [14] . [01] . [00]   [20] + [2b] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [0f] 
0x0f hoping for sequence...
got it, incrementing
avrdude: Recv: . [01] 
0x01 hoping for size LSB
avrdude: Recv: . [03] 
0x03 hoping for size MSB... msg is 259 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [14] 
0x14 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [ff] 
0xff avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [0c] 
0x0c 
 = 265
# | 100% 104.89s

avrdude: writing output file "flash.bin"
STK500V2: stk500v2_command(0x11 0x01 0x01 , 3)
STK500V2: stk500v2_send(0x1b 0x10 0x00 0x03 0x0e 0x11 0x01 0x01 0x17 , 9)
avrdude: Send: . [1b] . [10] . [00] . [03] . [0e] . [11] . [01] . [01] . [17] 
STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 
0x1b hoping for start token...got it
avrdude: Recv: . [10] 
0x10 hoping for sequence...
got it, incrementing
avrdude: Recv: . [00] 
0x00 hoping for size LSB
avrdude: Recv: . [02] 
0x02 hoping for size MSB... msg is 2 bytes
avrdude: Recv: . [0e] 
0x0e avrdude: Recv: . [11] 
0x11 avrdude: Recv: . [00] 
0x00 avrdude: Recv: . [16] 
0x16 
 = 8
STK500V2: stk500v2_close()

avrdude done.  Thank you.